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* GCC4.6: Squash warning in tegra2 board.cMarek Vasut2011-10-27-1/+1
| | | | | | | | | | board.c:43:2: warning: format '%08lX' expects type 'long unsigned int', but argument 2 has type 'u32' Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
* build: add missing $(AR)->$(cmd_link_o_target) updateMike Frysinger2011-10-22-1/+1
| | | | | | | | | Seems people fixed their files to use libfoo.o, but didn't actually update the creation targets to use $(cmd_link_o_target). Update the rest of the Makefile's found with grep. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Simon Glass <sjg@chromium.org>
* Move timestamp and version files into 'generated' subdirSimon Glass2011-10-17-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a rather subtle build problem where the build time stamp is not updated for out-of-tree builds if there exists an in-tree build which has a valid timestamp file. So if you do an in-tree build, then an out-of-tree build your timestamp will not change. The correct timestamp_autogenerated.h lives in the object tree, but it is not always found there. The source still lives in the source tree and when compiling version.h, it includes timestamp_autogenerated.h. Since the current directory is always searched first, this will come from the source tree rather than the object tree if it exists there. This affects dependency generation also, which means that common/cmd_version.o will not even be rebuilt if you have ever done an in-tree build. A similar problem exists with the version file. This change moves both files into the 'generated' subdir, which is already used for asm-offsets.h. Then timestamp.h and version.h are updated to include the files from there. There are other places where these generated files are included, but I cannot see why these don't just use the timestamp.h and version.h headers. So this change also tidies that up. I have tested this with in- and out-of-tree builds, but not SPL. I have looked at various other options for fixing this, including sed on the dep files, -I- and -include flags to gcc, but I don't think they can be made to work. Comments welcome. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* MX5: Clean up the output of "clocks" commandMarek Vasut2011-09-30-7/+9
| | | | | | | | | | | | | | | | The new output looks like this: > clocks PLL1 800 MHz PLL2 665 MHz PLL3 216 MHz AHB 133000 kHz IPG 66500 kHz IPG PERCLK 665000 kHz Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* MX5: Add AHB clock reporting and fix IPG clock reportingMarek Vasut2011-09-30-9/+27
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* MX5: Modify the PLL decoding algorithmMarek Vasut2011-09-30-10/+56
| | | | | | | | | | The PLL decoding algorithm didn't take into account many configuration bits. Adjust it according to Linux kernel. Also, add PLL4 for MX53. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Tested-by: Jason Liu <Jason.hui@linaro.org>
* omap3: Fix compile warningSanjeev Premi2011-09-30-1/+1
| | | | | | | | | | Building without option CONFIG_DISPLAY_CPUINFO leads to this warning: sys_info.c:50:14: warning: 'rev_s_37xx' defined but not used Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common: reorganize spl.cSimon Schwarz2011-09-30-177/+247
| | | | | | | | | | split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems with missing defines if a board does not use mmc or nand. This includes adding spl_ prefix to some functions which are now public. spl_image_t is now a public type. Added some of the common functions to omap-common.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: implement boot parameter savingSimon Schwarz2011-09-30-3/+12
| | | | | | | Implements the saving of boot params passed by OMAP3 ROM code. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: new SPL structure supportSimon Schwarz2011-09-30-0/+35
| | | | | | | | Support for the new spl structure. Using the interface defined by Aneesh V for OMAP4 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common: add nand spl supportSimon Schwarz2011-09-30-3/+93
| | | | | | | Add NAND support for the new SPL structure. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Configure RAM bank 0 if in SPLSimon Schwarz2011-09-30-1/+31
| | | | | | | | | | OMAP3 relied on the memory config done by X-loader or Configuration Header. This has to be reworked for the implementation of a SPL. This patch configures RAM bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000 are added to mem.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common/omap4: relocate early UART clock setupSimon Schwarz2011-09-30-1/+2
| | | | | | | | | | | | | | | Moves the early UART clock setup setup_clocks_for_console() from preloader_console_init() to s_init() of OMAP4. This is done to prepare for OMAP3 integration. This patch was posted seperatly to the mailinglist but I decidet - since it is a prereqesit for this patch to add it. Former port to ML: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: IO settingsAneesh V2011-09-13-25/+62
| | | | | | | | Tuning some IO settings for better performance and power. And consolidate all such IO settings at one place. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: make SDRAM init work for ES1.0 siliconAneesh V2011-09-13-51/+20
| | | | | | | | | | | | SDRAM init was not working on ES1.0 due to a programming error. A pointer that was passed by value to a function was set in function emif_get_device_details(), but the effect wouldn't be seen in the calling function. The issue came out while testing for ES1.0 because ES1.0 doesn't have any SDRAM chips connected to CS1 Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: gpio: generic changes after changing APISanjeev Premi2011-09-13-2/+3
| | | | | | | | This patch contains the generic changes required after change to generic API in the previous patch. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: gpio: Use generic APISanjeev Premi2011-09-13-31/+82
| | | | | | | | | | | | | | | Convert all OMAP specific functions to use the common API definitions in include/asm/gpio.h. In the process, made few additional changes: - Use -EINVAL consistently. -1 was used in many places. - Removed one-liner static functions that were used only once. Replaced the content as necessary. - Combines implementation of functions omap_get_gpio_dataout() and omap_get_gpio_datain(). To do so, new static function _get_gpio_direction() was added. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Add 37xx ESx revision numbers.Howard D. Gray2011-09-12-1/+12
| | | | | | | | OMAP3: Add 37xx ESx revision numbers. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP: Add function to get state of a GPIO outputJoel A Fernandes2011-09-12-0/+20
| | | | | | | | Read directly from OMAP_GPIO_DATAOUT to get the output state of the GPIO pin Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* tegra2: fix warning: "assert" redefinedWolfgang Denk2011-09-10-8/+0
| | | | | | | | | | | | Commit 21726a7 "Add assert() for debug assertions" caused build warnings for all tegra2 based boards: clock.c:36:1: warning: "assert" redefined In file included from clock.c:29: include/common.h:144:1: warning: this is the location of the previous definition Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org>
* Makefile : fix generation of cpu related asm-offsets.hStefano Babic2011-09-07-3/+1
| | | | | | | | | | | commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks building on a different directory with the O= parameter. The patch wil fix this issue, generating always asm-offsets.h before the other targets. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de> CC: Wolfgang Denk <wd@denx.de>
* dm3730: enable dpll5Eric Benard2011-09-04-0/+1
| | | | | | | | which is used to provide 120MHz to USB EHCI This allows EHCI to work on BeagleBoard XM Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3:clock: check cpu_family before enabling clks for IVA & CAMVaibhav Hiremath2011-09-04-4/+10
| | | | | | | | | | | In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and ISP-CAMERA modules have been removed. So add check for cpu_family before enabling clocks for these modules, else this impacts subsequent power consumption and system suspend/resume functionality. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3:clock: configure GFX clock to 200MHz for AM/DM37xVaibhav Hiremath2011-09-04-1/+1
| | | | | | | | | | | | AM/DM37x is another OMAP3 variant, where the GFX clock has been boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change. HW Errata: Due to dependency of TV out clock of 54MHz, it is not possible to configure GFX to 192MHz. So as per HW errats, the recommended GFX clock is 200MHz (=CORE_CLK/2). Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* armv7: cache: remove flush on un-aligned invalidateAneesh V2011-09-04-6/+8
| | | | | | | | | | Remove the flush of boundary cache-lines done as part of invalidate on a non cache-line boundary aligned buffer Also, print a warning when this situation is recognized. Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: stronger barrier for cache-maintenance operationsAneesh V2011-09-04-6/+6
| | | | | | | | set-way operations need a DSB after them to ensure the operation is complete. DMB may not be enough. Use DSB after all operations instead of DMB. Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: enable caches at system start-upAneesh V2011-09-04-0/+16
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* Tegra2: Use clock and pinmux functions to simplify codeSimon Glass2011-09-04-33/+14
| | | | Signed-off-by: Simon Glass <sjg@chromium.org>
* Tegra2: Add additional pin multiplexing featuresSimon Glass2011-09-04-1/+53
| | | | | | | This adds an enum for each pin and some functions for changing the pin muxing setup. Signed-off-by: Simon Glass <sjg@chromium.org>
* Tegra2: Add more clock supportSimon Glass2011-09-04-36/+176
| | | | | | This adds functions to enable/disable clocks and reset to on-chip peripherals. Signed-off-by: Simon Glass <sjg@chromium.org>
* Tegra2: Add microsecond timer functionSimon Glass2011-09-04-6/+12
| | | | | | | These functions provide access to the high resolution microsecond timer and tidy up a global variable in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* MX: MX35 / MX5: uniform clock command with powerpcStefano Babic2011-09-04-2/+2
| | | | | | | | | | | There was already a command to show the processor clocks for PowerPC (clocks). For i.MX, the "clockinfo" command was introduce. The patch sets the same command name used on PowerPC. A nasty and not needed newline is also dropped in the help for the command. Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: MX51: PLL errata workaroundDavid Jander2011-09-04-0/+38
| | | | | | | | | | | | | This is a port of the official PLL errata workaround from Freescale to mainline u-boot. The PLL's in the i.MX51 processor can go out of lock due to a metastable condition in an analog flip-flop when used at high frequencies. This workaround implements an undocumented feature in the PLL (dither mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. Signed-off-by: David Jander <david@protonic.nl>
* omap: fix gpio related build breaksAneesh V2011-09-04-3/+3
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* omap4: clock init support for omap4460Aneesh V2011-08-03-7/+54
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: support TPS programmingAneesh V2011-08-03-7/+62
| | | | | | | | | | | TPS62361 is the new power supply used in OMAP4460 that supplies vdd_mpu. VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies vdd_iva. VCORE3 is not used in OMAP4460. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: reuse omap3 gpio support in omap4Aneesh V2011-08-03-27/+42
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: sdram init changes for omap4460Aneesh V2011-08-03-17/+22
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add omap4460 revision detectionAneesh V2011-08-03-0/+3
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* mkimage: Add OMAP boot image supportJohn Rigby2011-08-03-0/+30
| | | | | | | | | | - Add mkimage support for OMAP boot image - Add support for OMAP boot image(MLO) generation in the new SPL framework Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: add MMC and FAT support to SPLAneesh V2011-08-03-2/+252
| | | | | | | | | | | | | | - Add MMC raw and FAT mode boot support for OMAP - Provide a means by which parameters passed by ROM-code can be saved in u-boot. - Save boot mode related information passed by OMAP4 ROM-code and use it to determine where to load the u-boot from - Assumes that the image has a mkimage header. Gets the payload size and load address from this header. If the header is not detected assume u-boot.bin as payload Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: add basic SPL supportAneesh V2011-08-03-2/+198
| | | | | | | | | | | | | - Provide alternate implementations of board_init_f() board_init_r() for OMAP spl. - Provide linker script - Initialize global data - Add serial console support - Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move it to board config header from config.mk Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* armv7: start.S: fixes and enhancements for SPLAneesh V2011-08-03-12/+39
| | | | | | | | | | | - Allow SPL to have .bss disjoint from rest of the image - Allow for .bss setup in CONFIG_SPL_BUILD case too. - Take care of the special case where relocation offset = 0. - Compile out exception handling code and install a simpler vector Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: automatic sdram detectionAneesh V2011-08-03-0/+238
| | | | | | | | | | | | | | | | | | | | | | | | | Identify SDRAM devices connected to EMIF automatically: LPDDR2 devices have some Mode Registers that provide details about the device such as the type, density, bus width etc. EMIF has the capability to read these registers. If there are no devices connected to a given chip-select reading mode registers will return junk values. After reading as many such registers as possible and matching with expected ranges of values the driver can identify if there is a device connected to the respective CS. If we identify that a device is connected the values read give us complete details about the device. This along with the base AC timings specified by JESD209-2 allows us to do a complete automatic initialization of SDRAM that works on all boards. Please note that the default AC timings specified by JESD209-2 will be safe for all devices but not necessarily optimal. However, for the Elpida devices used on Panda and SDP the default timings are both safe and optimal. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: calculate EMIF register valuesAneesh V2011-08-03-4/+953
| | | | | | | | | | | | | | Calculate EMIF register values based on AC timing parameters from the SDRAM datasheet and the DDR frequency rather than using the hard-coded values. For a new board the user doen't have to go through the tedious process of calculating the register values. Instead, just provide the AC timings from the device data sheet as input and the driver will automatically calculate the register values. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add sdram init supportAneesh V2011-08-03-3/+464
| | | | | | | Add support for the SDRAM controller (EMIF). Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add clock supportAneesh V2011-08-03-0/+811
| | | | | | | | | | | | | | Add support for: 1. DPLL locking 2. Initialization of clock domains and clock modules 3. Setting up the right voltage on voltage rails This work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add OMAP4430 revision checkAneesh V2011-08-03-0/+64
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: cleanup pin mux dataAneesh V2011-08-03-3/+126
| | | | | | | | | | | | | - separate mux settings into essential and non essential parts - essential part is board independent as of now(so move it to SoC directory). Will help in having single SPL for all boards. - Non-essential part(the pins not essential for u-boot to function) need to be phased out eventually. - Correct mux data by aligning to the latest settings in x-loader Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Include array definition only when it is usedSanjeev Premi2011-08-03-0/+3
| | | | | | | | | | | | The array of strings corresponding to cpu revision is used only when CONFIG_DISPLAY_CPUINFO is selected - in the function print_cpuinfo(). Enclose definition of this array in #ifdef...#endif for the same. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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