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* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-05-05-7/+7
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| * Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2015-05-05-1611/+285
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| * | ARM: cpu: Add ARMv7 barrier operations supportValentine Barshak2015-04-16-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables ARMv7 barrier operations support when march=armv7-a is enabled. Using CP15 barriers causes U-Boot bootm command crash when transferring control to the loaded image on Renesas R8A7794 Cortex A7 CPU. Using ARMv7 barrier operations instead of the deprecated CP15 barriers helps to avoid these issues. Signed-off-by: Valentine Barshak <valentine.barshak+renesas@cogentembedded.com> Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | | sunxi: usb: Protect phy-init and phy-power-on against multiple callsHans de Goede2015-05-04-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Once we add support for the ohci controller the phy-init and phy-power-on functions may be called twice (once by the ehci code and once by the ohci code) protect them against this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usb: Do not call phy_probe from hcd codeHans de Goede2015-05-04-49/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 2/3 usb-phys on the sunxi SoCs are really a single separate functional block, and are modelled as such in devicetree. So once we've moved all the sunxi usb code to the driver-model then phy_probe will be called once for the entire block from the driver-model enumeration code. Move to this now as this also avoids problems with phy_probe being called multiple times once we introduce ohci support. This also allows us to get rid of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed to be called only once. Since we're effectively rewriting the probe / remove functions, move them to the end of the file while we are at it, as that is the most logical place for them. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usb: Rename the usbc.? files to usb_phy.?Hans de Goede2015-05-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The usbc.? files now only contain usb-phy related code, rename them to make this clear. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usb: Rename sunxi_usbc_foo functions to sunxi_usb_phy_barHans de Goede2015-05-04-63/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the sunxi_usbc_foo functions to sunxi_usb_phy_bar to make it clear that these are usb-phy functions. Also change the verbs & nouns in the suffix to match the verbs & nouns used in the Linux kernels generic phy framework. This patch purely renames things, it contains no functional changes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usb: Remove sunxi_usbc_get_io_base functionHans de Goede2015-05-04-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the only function left in sunxi/usbc.c which is not phy related, so remove it. This is a preparation patch for turning the usbc.c code into a proper usb phy driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usb: Move setup of host controller clocks to the host controller driversHans de Goede2015-05-04-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi "usbc" code is mostly about phy setup, but currently also sets up the host controller clocks, which is something which really belongs in the host controller drivers, so move it there. This is a preparation patch for moving the sunxi ehci code to the driver model and for adding ohci support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: emac: Remove non driver-model codeHans de Goede2015-05-04-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | All sunxi boards now use the driver-model, so remove the non driver-model code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: emac: Add driver model supportHans de Goede2015-05-04-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Modify the sunxi-emac eth driver to support driver model. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
* | | sunxi: axp: Add support for i2c based PMICs to the pmic-bus helpersHans de Goede2015-05-04-8/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the axp152 and axp209 PMICs to the pmic register access helpers. This is a preparation patch for moving the axp gpio code to a separate gpio driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: axp: Move axp pmic register helpers to a separate fileHans de Goede2015-05-04-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the register helpers used to access the registers via p2wi resp. rsb bus on the otherwise identical axp221 and axp223 pmics to a separate file, so that they can be used by the upcoming standalone axp gpio driver too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usbc: Fix vbus gpio handling to work with the driver-modelHans de Goede2015-05-04-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi usbc properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: Add basic A33 basic supportVishnu Patekar2015-05-04-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Enable full support for the A33 SoC including display, otg-usb, etc. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: Add a33 dram init codeVishnu Patekar2015-05-04-0/+363
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Allwinner dram init code from the a33 bsp: https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by Hans de Goede. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: Add support for A33 PLL11 (second DRAM pll)Hans de Goede2015-05-04-0/+18
| | | | | | | | | | | | | | | | | | | | | Add support for the new second DRAM PLL found on the A33 SoC. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: s/sun8i/sun8i_a23/Hans de Goede2015-05-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | This is a preparation patch for adding A33 support, which will have a mach name of sun8i-a33. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig boolHans de Goede2015-05-04-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: usbc: Remove unused irq fieldHans de Goede2015-05-04-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | We do not use irqs in u-boot so remove the unused irq field, and all the #ifdef-ery around the irq initialization. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: Also set Auxiliary Ctl SMP bit in SPLHans de Goede2015-05-04-2/+3
| | | | | | | | | | | | | | | | | | | | | There is no reason not to and this make the #ifdef-ery easier to read. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sun7i: Remove duplicate call to psci_arch_initJan Kiszka2015-05-02-1/+0
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | This is already invoked a few cycles later in monitor mode by _secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers _secure_monitor via smc #0). Drop it here, it serves no purpose. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-29-1490/+0
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| * | ARM: zynq: move SoC sources to mach-zynqMasahiro Yamada2015-04-29-1497/+0
| | | | | | | | | | | | | | | | | | | | | Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/* Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: pass "-mfpu=neon" only to lowlevel_init.SMasahiro Yamada2015-04-29-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The comment line in arch/arm/cpu/armv7/zynq/config.mk says that the option "-mfpu=neon" is necessary for compiling lowlevel_init.S. We do not have to give it to all the source files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | zynq: timer: Fix wrong timer calculationSiva Durga Prasad Paladugu2015-04-29-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix wrong timer calculation in get_timer_masked incase of overflow. This fixes the issue of getting wrong time from get_timer() calls. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | zynq: slcr: Disable all level shiftersSiva Durga Prasad Paladugu2015-04-29-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable all level shifters before enabling the PS-to-PL level shifters as it would be good to disable all level shifters before enabling the PS-to-PL in order to ensure that it is in proper state Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: drop legacy ps7_init.c/h supportMasahiro Yamada2015-04-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are about to change the location for ps7_init files, breaking the current work-flows. It is good time to drop the legacy ps7_init.c/h support. Going forward, please use ps7_init_gpl.c/h all the time. If you are still using old Xilinx tools that are only able to generate ps7_init.c/h, rename them into ps7_init_gpl.c/h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | zynq: Add Zynq PicoZed board supportNathan Rossi2015-04-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PicoZed is a System-on-Module board which is marketed as part of the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000 processor. This patch adds support that covers all the variants of the PicoZed including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This patch set however only covers support for the System-on-Module and does not cover any extra components that are available on carrier boards (except those that are fanned out of the module itself). More information on this board, its variants and available carrier boards is available at: http://zedboard.org/product/picozed Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-04-28-47/+95
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| * | | arm: socfpga: spl: add board_init_f to SPLDinh Nguyen2015-04-21-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remap SDRAM to 0x0, and clear OCRAM's ECC in board_init_f(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: spl: Add SDRAM checkDinh Nguyen2015-04-21-0/+6
| | | | | | | | | | | | | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | | arm: socfpga: spl: Use common lowlevel_initDinh Nguyen2015-04-21-47/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For SoCFGPA, use the common ARMv7 lowlevel_init. Thus, we can delete the SoCFPGA lowlevel_init.S file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | | arm: socfpga: spl: printout sdram sizeDinh Nguyen2015-04-21-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: spl: add sdram init and calibrationDinh Nguyen2015-04-21-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add a call to checkboard along with sdram intilialization and calibration. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | | arm: socfpga: spl: allow bootrom to enable IOs after warm resetDinh Nguyen2015-04-21-0/+12
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: spl: Add call to timer_initDinh Nguyen2015-04-21-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | | arm: socfpga: spl: enable sdram, timer and uartDinh Nguyen2015-04-21-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the calls in the spl_board_init to enable SDRAM, timer, and UART. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: add functions to bring sdram, timer, and uart out of resetDinh Nguyen2015-04-21-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions will be needed for use by the SPL for enabling the console and sdram initialization. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-04-28-1/+6
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| * | | arm: mx6: ddr: add pd_fast_exit flag to system informationTim Harvey2015-04-22-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR3 has a special Precharge power-down mode: fast-exit vs slow-exit. In slow-exit mode the DLL is off but in some quiescent state that makes it easy to turn on again in tXPDLL cycles (about 10tCK) vs the full tDLLK (512tCK). In fast-exist mode the DLL is maintained such that it is ready again in about 3tCK. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-04-24-2/+2
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| * | | | driver/ifc: Add 64KB page supportJaiprakash Singh2015-04-23-2/+2
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and controls IFC generic functionality. RUNTIME registers are defined in PAGE1 and controls NAND and GPCM funcinality. FCM and RUNTIME structures defination is common for IFC version 1.4 and 2.0. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* | | | ARM: vf610: Enable cachesStefan Agner2015-04-23-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | | ARM: vf610: Add SoC and CPU type detectionSanchayan Maity2015-04-23-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | | fastboot: ARM: OMAP5: Enable reboot-bootloaderDileep Katta2015-04-23-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented fb_set_reboot_flag() for OMAP5 to set an environment variable 'dofastboot' when reboot-bootloader called. This environment variable will be checked in boot command and fastboot will be called if the variable is set. If the bootcmd env variable of OMAP5 common is overwritten with board-specific command, then these changes will not apply. This was originally intended for DRA7 platform, but now applies to all OMAP5. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=19da2e436e9806259cf1f4988b9e046ab256bf2c Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv() in that case] Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | ARM: DRA7: Set serial number environment variableDileep Katta2015-04-23-0/+17
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch populates serial number environment variable from die_id_0 and die_id_1 register values for DRA7xx boards. The function is added in omap common code so that this can be re-used. Serial# environment variable will be useful to show correct information in "fastboot devices" commands. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ahci: mmio_base is a virtual addressScott Wood2015-04-18-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't store it in a u32. Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")). Fixes crash on boot in MPC8641HPCN_36BIT target. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Vadim Bendebury <vbendeb@chromium.org> Acked-by: York Sun <yorksun@freescale.com>
* | | Kconfig: Move CONFIG_DESIGNWARE_ETH to KconfigSimon Glass2015-04-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move this to Kconfig and clean up board config files that use it. Also rename it to CONFIG_ETH_DESIGNWARE to fit with the naming that exists in drivers/net/Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Version 1: Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | ARM: rmobile: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+12
| | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-13 04:58:31 +0000