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* IGEP0146: Initial commitJose Miguel Sanchez Sanabria2018-06-12-1/+9
| | | | | | | | | Structure folders defconfig initial ram config only UART will be configured for basic printf Signed-off-by: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>
* Ethernet fixed to 100 MbpsJose Miguel Sanchez Sanabria2018-02-07-1/+0
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* Added support to igep0046Jose Miguel Sanchez Sanabria2018-01-12-0/+10
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* MA-9554[Android_6DL_SD]RTC: Sometimes the RTC reset to the initial time 1970 ↵n7.1.2_2.0.0-gaZhang Bo2017-09-07-0/+12
| | | | | | | | | | | | | | after softare reboot the first time. 40% RTC timer is default disabled after power off and bootup again. it will be enabled in kernel rtc driver init. But rtc time is shorter than system clock, so rtc time cannot update to system clock in rtc_hctosys(), and the sysfs file /sys/class/rtc/rtc0/hctosys cat result is 0. Android AlarmManagerService cannot work normally when hctosys is 0. Enable RTC in u-boot so the time in RTC timer is longer than system clock. Change-Id: Ie8b1c1b36e5ab48031efe44dd06468ac35ca3d3b Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
* MA-9409-3 Add base board support for android and android things.zhang sanshan2017-07-10-1/+28
| | | | | | | | | | | | | | | | | | * add board support for android and android things. mx6ul_nxpu_iopb, pico-6ul, pico-imx7d, aquila-6ul reorganize the Kconfig, and fix the redefine issue. * add android configure into configure-while * add a common file mx_android_common.h it will be included by android and android things. defconfig only include ANDROID_THINGS_SUPPORT or ANDROID_SUPPORT * move partition_table_valid into f_fastboot.c. it's a common code. * add invalidate_dcache_range in fixed order. It will have salt invalid issue if we do not add it in order * add display for pico-7d. Change-Id: I6f8a4876c2f8bbd098034d1e3f53033109300bca Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9375 [Android IMX] uboot: enable BCB and bootctrlzhang sanshan2017-06-21-139/+1
| | | | | | | | | * Add API to read\write MISC partition. * get the boot mode from BCB command when boot up. * get the boot up tactics from bootctrl. Change-Id: Icbba6340e10983dddc1b04804ecc012a3a3c57d0 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MLK-14994 mx7ulp: Update M4 image header version checkYe Li2017-06-20-1/+1
| | | | | | | | | The latest M4 image uses the version 0x41 not 0x40, have to update it when checking M4 image. Otherwise M4 image won't be loaded. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 4f421455c850226b9acec9a43b3997995929872e)
* MLK-14839-1 mx6: Fix wrong CPU frequencyYe Li2017-05-09-1/+1
| | | | | | Fix incorrect value for 696MHz CPU frequency on i.MX6UL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14831 mx6: Fix wrong bmode value used for usb bootYe Li2017-05-08-1/+1
| | | | | | | Wrong bmode value is used in community u-boot for usb reboot. And cause it failed. Fix this by using a reserved bootcfg value. Signed-off-by: Ye Li <ye.li@nxp.com>
* MXSCM-292-2 mx6sxscm: convert to enable OF_CONTROL and DM driversJuan Gutierrez2017-04-28-0/+9
| | | | | | | | | | | | | Update mx6sxscm boards code and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Update PMIC and LDO by-pass codes for DM PMIC 3. Add lpddr2 512MB size and eMMC options tolocal Kconfig 4. Update license with NXP 2017 5. Add defconfigs for EVB boards Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-290-2 mx6dqscm: convert to enable OF_CONTROL and DM driversJuan Gutierrez2017-04-28-0/+8
| | | | | | | | | | | | | | | Update mx6dqscm boards code and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Enable USB DM driver 3. Update PMIC and LDO by-pass codes for DM PMIC 4. Add spinor boot support 5. Add lpddr2 modes, sizes and boards on local Kconfig 6. Update license with NXP 2017 7. Add defconfigs for qwks boards Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MLK-14693 mx7ulp: Change PLL rate calculation to avoid div 0Ye Li2017-04-14-2/+8
| | | | | | | | | | | | | The new ROM patch will set DENOM and NUM of APLL and SPLL to 0 to workaround PLL issue. When DENOM is 0, the PLL rate calculation will divide 0 and raise a signal. raise: Signal # 8 caught To avoid such problem, we change our calculation. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit f28cf489e1b3864bac6bae4944d8a73bab30ec32)
* MLK-14689 mx7ulp: Workaround APLL PFD2 to 345.6MhzYe Li2017-04-14-2/+2
| | | | | | | | | | The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e931d534fd68e0e639082766de17a20e705fd908)
* MLK-13499 imx6sll: add epdc splash screen supportRobby Cai2017-04-06-1/+3
| | | | | | | | | add splash screen feature for epdc. it's tested on imx6sll arm2 board and evk board. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit c85c6f2a0f08dfc6c2859fe969b2021ab32b9370) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issueYe Li2017-04-05-2/+6
| | | | | | | | The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865)
* MLK-14417 imx: Enable ACTLR.SMP bit for all i.MX cortex-a7 platformsYe Li2017-04-05-7/+0
| | | | | | | | | | | | According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit is set to 1 before the caches and MMU are enabled, or any cache and TLB maintenance operations are performed". ROM sets this bit in normal boot flow, but when in serial download mode, it is not set. Here we add it in u-boot as a common flow for all i.MX cortex-a7 platforms, including mx7d, mx6ul/ull and mx7ulp. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 14990af03450f3e1898135c86fd8b93328007617)
* MA-9213 imx: mx7ulp-evk: Add android supportSanshan Zhang2017-04-05-0/+45
| | | | | | | | | | | Add android features on i.MX7ULP EVK board. Implement the code to get boot device and the serial number on mx7ulp. TODO: will add the code which check misc partition after porting BCB. Change-Id: I9d06fecba303fa4dfdcaf73da1b6246444697bba Signed-off-by: Sanshan Zhang <sanshan.zhang@nxp.com> (cherry picked from commit 4c60cba3a017b921aebb84dd1268c898e549c99a) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12527-2 android: Add FSL android fastboot supportYe Li2017-04-05-0/+173
| | | | | | | | | | | | | | | | | | | | | | Integrate the FSL android fastboot features into community's fastboot. 1. Use USB gadget g_dnl driver 2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and EFI partitions are not support by i.MX. 3. Add FDT support to community's android image. 4. Add a new boot command "boota" for android image boot. The boota implements to load ramdisk and fdt to their loading addresses specified in boot.img header, while bootm won't do it for android image. 5. Support the authentication of boot.img at the "load_addr" for both SD and NAND. 6. We use new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot with relevant header file "fsl_fastboot.h". While disabling the configuration, the community fastboot is used. 7. Overwrite the cmdline in boot.img by using bootargs saved in local environment. 8. Add recovery and reboot-bootloader support. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 23d63ff185929fff5e392efc853d69b606ba081a)
* MLK-14484-2 mx7ulp_arm2: Add 10x10 and 14x14 ARM2 codesYe Li2017-04-05-0/+9
| | | | | | | | | | | | | Copy the mx7ulp ARM2 codes from v2016.03 as the base for using OF_CONTROL and DM drivers. The 14x14 ARM2 LPDDR3 script is v1.5: - IMX7ULP1_LPDDR3_320MHz_512MB_32bit_V1.5.inc The 10x10 ARM2 LPDDR2 script is v1.1: - IMX7ULP1_LPDDR2_320MHz_1GB_32bit_V1.1.inc Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14312 mx7ulp: Fix incorrect DTB modification after using USBYe Li2017-04-05-3/+28
| | | | | | | | | | | | | | u-boot has feature that when booting for mfgtool, the u-boot will modify the DTB to disable SD 1.8v switch. But the judgement for mfgtool boot has a problem, it only checks whether the USB PHY power status is enabled. When a USB device (for example a USB ethernet) is used in u-boot, the power status is also enabled. So the u-boot incorrectly disable the SD 1.8v switch. The patch changes the get_boot_device to use the boot SW info provided by ROM. Only if it is a USB boot, we will start the DTB modification for SD. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1fb61cd80af59c39d1ca01d833f566628ba48f32)
* MLK-13929-5 mx7ulp: Update clock and SoC functions for videoYe Li2017-04-05-0/+85
| | | | | | | | | Add the clocks functions for enabling LCDIF and DSI clocks. Also add the arch_preboot_os to disable the video before enter into the kernel. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit a783799017a929f9918c9c5981fe3a7a25cd8125)
* MLK-14445-4 mx7ulp: Fix wrong i2c configuration nameYe Li2017-04-05-1/+1
| | | | | | | Wrong I2c driver configuration name is used in codes, so I2c driver is not built. Correct it. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14445-1 mx7ulp: Add CONFIG_MX7ULP to kconfigYe Li2017-04-05-0/+4
| | | | | | | Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13899 ARM: mx7ulp: Correct the clock index on imx7ulpBai Ping2017-04-05-1/+2
| | | | | | | | | On i.MX7ULP, value zero is reserved in SCG1 RCCR register, so the val should be decreased by 1 to get the correct clock source index. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 7c9a3573ec0191f1e0bea12956346a5eab2db43a)
* MLK-13761 board: imx7ulp: Fix system reset after a7 rtc alarm expired.Bai Ping2017-04-05-0/+3
| | | | | | | | | The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 5aa5974f487e0b4c2e963a86203161c5f05e2fdf)
* MLK-13645 mx7ulp: Modify FDT file to disable SD3.0 for mfgtoolYe Li2017-04-05-0/+38
| | | | | | | | | | Since the SD3.0 kernel driver needs M4 image support, this causes problem to mfgtool. To decouple the relationship, we modify the FDT file in u-boot to disable SD3.0 when booting for mfgtool. So the kernel won't depend on M4 image. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit 1826d6e4dc732521190c742f812193be95eea211)
* MLK-13450-7 mx7ulp: Add M4 core boot support when using single boot modeYe Li2017-04-05-0/+52
| | | | | | | | | | | | | | | | | | | The single boot mode in MX7ULP will only boot up A7, the M4 is running in ROM by checking entry from SIM0 GP register. In this patch, We bind M4 image with u-boot.bin by allocating a section for m4 image. So the whole image (included M4 image) will be loaded by A7 ROM into DDR. Then when u-boot is up, it will try to load M4 image into TCML and boot it there. Since M4 image will not be relocated in u-boot codes, we must load it during board_f. Current implementation put it in arch_cpu_init to get M4 booted as quick as possible. We requires the M4 image with IVT head and padding embedded, not a RAW binary. The image should be same as what is used for M4 QSPI boot in dual boot mode. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 04163dbd4f6190f310fff17b53b4bc7b8370ba89)
* imx: imx7ulp: add EVK board supportPeng Fan2017-04-05-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | Add EVK board support. Add the evk dts file. LOG: U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800) CPU: Freescale i.MX7ULP rev1.0 at 500 MHz Reset cause: POR Boot mode: Dual boot Model: NXP i.MX7ULP EVK DRAM: 1 GiB MMC: FSL_SDHC: 0 In: serial@402D0000 Out: serial@402D0000 Err: serial@402D0000 Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mx7ulp: Add HAB boot supportPeng Fan2017-04-05-0/+18
| | | | | | | | | | | | Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF size for HAB support boot on mx7ulp. Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build secure uboot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* serial: lpuart: restructure lpuart driverPeng Fan2017-04-05-0/+5
| | | | | | | | | | | | | | | | Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
* imx: mx7ulp: Implement the clock functions for i2c driverYe Li2017-04-05-0/+40
| | | | | | | | | Implement the i2c clock enable and get function for mx7ulp. These functions are required by imx_lpi2c driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add soc level initialization codes and functionsPeng Fan2017-04-05-1/+240
| | | | | | | | | | | | | | | Implement soc level functions to get cpu rev, reset cause, enable cache, etc. We will disable the wdog and init clocks in s_init at very early u-boot phase. Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev is hard coded to a fixed value. This may change in future. Reuse some code in imx-common. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add clock framework and functionsPeng Fan2017-04-05-1/+1688
| | | | | | | | | | | | | | | | | | Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set clock source, divider, clock rate and parent source. Users need to include pcc.h to use the APIs to for peripherals clock. Each peripheral clock is defined in enum pcc_clk type. SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD enablement and settings, and all SCG clock initialization. User need use enum scg_clk to access each clock source. In clock.c, we initialize necessary clocks at u-boot s_init and implement the clock functions used by driver modules to operate clocks dynamically. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1Peng Fan2017-04-05-0/+78
| | | | | | | | | | | | Add a new driver under ULP directory to support its IOMUXC controllers. The ULP has two IOMUXC, the IOMUXC0 is used for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as the default IOMUX in this driver. Any pins in IOMUXC0 needs to configure with IOMUX_CONFIG_MPORTS in its mux_mode field. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add mx7ulp to KconfigPeng Fan2017-04-05-1/+8
| | | | | | | | | | i.MX7ULP is a new series SoC which has different architecture from previous i.MX platforms. Create a new cpu folder for it, and add it to Kconfig. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* MLK-14419-3 imx: mx7d_arm2: add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 supportPeng Fan2017-04-05-0/+23
| | | | | | | | | Add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 board supports. Enable the OF_CONTROL and convert them to use DM driver. Since the DTB lacks the support for some modules. We have to use QSPI and FEC with non-DM driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14419-2 imx: mx7d_arm2: add 12x12 ddr3 arm2 board supportPeng Fan2017-04-05-0/+8
| | | | | | | | Add 12x12 ddr3 arm2 board support and convert it to use OF_CONTROL and DM drivers. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14419-1 imx: mx7d_arm2: add 12x12 lpddr3 arm2 supportPeng Fan2017-04-05-0/+8
| | | | | | | | Add mx7d 12x12 lpddr3 arm2 support, which has enabled the OF_CONTROL and DM drivers Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12425-6: mx7: add epdc qos settingsPeng Fan2017-04-05-1/+32
| | | | | | | | This EPDC/EPXP QoS setting is needed for EPDC stress test to pass. Signed-off-by: Robby Cai <r63905@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 1b32518d1c27f05eb84a4cb93594710354b2e343)
* MLK-14391-1 mx6sxarm2: Add mx6sx 14x14/17x17/19x19 arm2 board codesYe Li2017-04-05-0/+26
| | | | | | | | Copy the board codes and build configurations for i.MX6SX 14x14/17x17/19x19 ARM2 boards from v2016.03 as the base for converting to OF_CONTROL and DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14390-1 mx6sllarm2: Add mx6sll LPDDR2/3 ARM2 board codesYe Li2017-04-05-0/+8
| | | | | | | Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13602-1 mx6: Add i.MX6ULL fused modules checking supportYe Li2017-04-05-1/+40
| | | | | | | | Add the modules disable fuses mapping with FDT nodes and devices name. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit d033825f034467fa9c9aeff6fcf95a146c802cf1)
* MLK-12929 imx6ull: support splash screen for epdcRobby Cai2017-04-05-0/+29
| | | | | | | | add splash screen feature for epdc. it's tested on imx6ull arm2 board. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit bcdbe240bb2a97d38ba30dd244a51ece87662b06)
* MLK-14380-1 mx6ullarm2: Add mx6ull DDR3 ARM2 board codesYe Li2017-04-05-0/+8
| | | | | | | Move the mx6ull ddr3 arm2 board codes and defconfigs from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14382-1 mx6ularm2: Add DDR3 and LPDDR2 ARM2 board codesYe Li2017-04-05-0/+16
| | | | | | | Move the mx6ul DDR3/LPDDR2 ARM2 boards codes from v2016.03 u-boot as the base for OF_CONTROL enabling. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14375-1 mx6ullevk: Update board codes to align with v2016.03Ye Li2017-04-05-0/+7
| | | | | | | | | | | | | | | | | | Update mx6ull evk to add features from v2016.03. 1. Add support for NAND flash. 2. Add support for QSPI DM driver. 3. Add USB DM driver support. 4. Add two FEC support by using DM FEC driver 5. Update environments for various boot devices support: SD/NAND/eMMC/QSPI 6. Add MFGtool environments. 7. Add board codes for 9x9 EVK board For the DTS file, some changes are needed for using QSPI DM driver 1. Add spi0 alias for qspi node. Which is used for bus number 0. 2. Modify the n25q256a@0 compatible property to "spi-flash". 3. Modify spi4 (gpio_spi) node to spi5 Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12416-9: mx6qp: define CONFIG_MX6QPPeng Fan2017-04-05-0/+3
| | | | | | | | Define CONFIG_MX6QP which will also set CONFIG_MX6Q, otherwise plugin code will use wrong ddr script. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 901d9eb01736ab54822678a197fe1aeb281a81b9)
* MLK-12493-1 Add support for various boot deviceYe Li2017-04-05-0/+4
| | | | | | | | | | Add support for various boot devices like NAND, QSPINOR, SPINOR, eMMC, EIMNOR, SATA. Modify board level files to support the feature and add corresponding defconfig files Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 72c35e80b86f7f75a52db45959793882bb730793)
* MLK-12495 mx6: Add LDO bypass supportYe Li2017-04-05-2/+149
| | | | | | | | | | | | | | | | Port LDO bypass support from v2015 to support the features: 1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz, enable LDO bypass and setup PMIC voltages. LDO bypass is dependent on the flatten device tree file. 2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to reboot whole board, so split these code to independent function so that board file can call it freely. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5b87d04dba66fa45375d59648838ef89f559f75d)
* MLK-13307-7 imx: mx6sll: update soc settingsPeng Fan2017-04-05-2/+11
| | | | | | | Update soc settings for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit afa2d78f2b799337eae3dc67c0ed702d5520eee6)
generated by cgit v1.1 at 2024-07-15 20:48:06 +0000