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* imx: fix coding stylePeng Fan2015-09-24-1/+1
| | | | | | | Fix coding style. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7: discard unused global variablePeng Fan2015-09-24-2/+0
| | | | | | | Discard unused global variable. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7: drop select CPU_V7 for board targetPeng Fan2015-09-20-1/+0
| | | | | | | drop select CPU_V7 for board target, since ARCH_MX7 selects CPU_V7. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-15-630/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2015-09-13-1/+7
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| * arm: rmobile: Add Stout board supportVladimir Barinov2015-08-31-1/+7
| | | | | | | | | | | | | | | | | | | | Stout is an entry level development board based on R-Car H2 SoC (R8A7790) This commit supports the following peripherals: - SCIFA, I2C, Ethernet, QSPI, SDHI0/2, CPLD Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | imx: mx6 discard 'select CPU_V7' for different targetsPeng Fan2015-09-13-24/+0
| | | | | | | | | | | | | | | | Discard the 'select CPU_V7' from Kconfig in arch/arm/cpu/armv7/mx6 for different targets, because ARCH_MX6 selects CPU_V7. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | imx: mx6ul: support mx6ul 9x9 evk boardPeng Fan2015-09-13-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to support mx6ul_9x9_evk board based on mx6ul_14x14_evk, the difference between mx6ul 9x9 evk and mx6ul 14x14 evk are: 1. mx6ul 9x9 evk use pfuze3000, while mx6ul 14x14 evk use DCDC. 2. mx6ul 9x9 evk supports 256MB LPDDR2, while mx6ul 14x14 evk supports 512MB DDR3 3. mx6ul_9x9_evk use 9x9 package, while mx6ul_14x14_evk use 14x14 package. This patch add the following: 1. Discard PHYS_SDRAM_SIZE from header file, use imx_ddr_size() 2. Introduce a macro is_mx6ul_9x9_evk using CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) to avoid "#ifdef xxx" in non-SPL part. To SPL part, CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) can not work, so still use "#ifdef CONFIG_TARGET_MX6UL_9X9_EVK" to differentiate with mx6ul_14x14_evk. And we have no way to dymaically checking this chip is 9x9 or 14x14. 3. mx6ul_9x9_evk use pfuze3000, so enabled POWER related configurations. POWER related configurations also effect for mx6ul_14x14_evk. But power_init_board implementation using 'if (is_mx6ul_9x9_evk())' to do initialization for mx6ul_9x9_evk, and do nothing for mx6ul_14x14_evk. 4. mx6ul_9x9_evk use lpddr2 with size 256MB, so add related SPL DRAM configurations. 5. Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and setting dtb file according to board_rev and board_name. 6. Add TARGET_MX6UL_9X9_EVK Kconfig entry Boot Log: U-Boot SPL 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53) reading u-boot.img reading u-boot.img U-Boot 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 41C Reset cause: POR Board: MX6UL 9x9 EVK I2C: ready DRAM: 256 MiB PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11 MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: FEC1 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | Revert "imx: mx6: ddr correct tRFC and tXS"Peng Fan2015-09-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 059323fb6a8f21637bb617919715c2427f24777c. This commit 059323fb6a8f21637bb617919715c2427f24777c use JESD79-3E which is not the newest spec. Should use JESD79-3F in which tRFC is 260ns for 4Gb chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
* | imx: mx7dsabresd: Add support for MX7D SABRESD boardAdrian Alonso2015-09-13-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | * Add i.MX7D SABRESD target board support with enabled modules: UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX. Build target: mx7dsabresd_config Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* | imx: imx7d: add imx-common cpu support for imx7dAdrian Alonso2015-09-13-1/+10
| | | | | | | | | | | | | | | | | | Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | arm: imx-common: init: rework wdog settings for imx6/imx7Adrian Alonso2015-09-13-14/+0
| | | | | | | | | | | | Rework imx_set_wdog_powerdown to be reused by imx6 and imx7 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* | imx: imx7d: Add SoC system supportAdrian Alonso2015-09-13-0/+269
| | | | | | | | | | | | | | | | | | Add imx7d basic SoC system support Misc arch dependent functions for system bring up Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* | imx: imx7d: clock control module supportAdrian Alonso2015-09-13-0/+1884
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add Clock control module (CCM) support * iMX7D SoC introduces 3 main clock sysmtem abstraction for clock root frequency generation denominated clock slices. Core clock slice: hihg speed clock for ARM core Bus clock slice: for bus clocks IP clock slice: Peripheral clocks * At system boot ROM enables PLL_ARM, PLL_DDR, PLL_SYS, PLL_ENET In u-boot, we have to: - Configure PFD3- PFD7 for freq we needed in u-boot - Set clock root for peripherals (ip channel) Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* | arm: imx: imx-common: init: move arch init common setupAdrian Alonso2015-09-13-87/+0
| | | | | | | | | | | | | | | | Move common imx6 arch init setup, init.c can be extended and reused to support imx7 SoC keeping init arch common code. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* | arm: imx: common rework cache settings for imx6Adrian Alonso2015-09-13-95/+0
| | | | | | | | | | | | | | Rework cache settings for imx6, move cache configuration to imx-common/cache.c so it can be reused for newer SoC Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* | thermal: imx_thermal: rework driver to be reusedAdrian Alonso2015-09-13-1/+1
| | | | | | | | | | | | | | | | Rework imx_thermal driver to be used across i.MX processor that support thermal sensor Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | arm: Remove omap3_sdp3430 boardSimon Glass2015-09-11-4/+0
| | | | | | | | | | | | | | This board has not been converted to generic board by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: Remove omap3_mvblx boardSimon Glass2015-09-11-4/+0
| | | | | | | | | | | | | | This board has not been converted to generic board by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: Remove dig297 boardSimon Glass2015-09-11-4/+0
| | | | | | | | | | | | | | This board has not been converted to generic board by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | ARM: DRA7: emif: Fix disabling/enabling of refreshesLokesh Vutla2015-09-11-3/+3
| | | | | | | | | | | | | | | | | | clrsetbits_le32/clrbits_le32 takes mask of the bits as input that are needed to be set/clear. But emif driver passes the shift of the bits. Fixing it here. Reported-by: Mark Mckeown <m-mckeown@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2015-09-03-6/+9
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| * | arm: Turn of d-cache before i-cacheSjoerd Simons2015-09-02-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting the kernel fails on RK3288 (and probably other rockchip SoCs) when the i-cache is disabled/flushed before d-cache. I have not investigated whether this is due to U-Boot hanging or whether it's very early in the linux boot, but following the approach of the various rockchip U-Boot forks (first disable d-cache then i-cache) makes things work. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert omap3_logic to ti_omap3_common.hAdam Ford2015-09-02-0/+3
| | | | | | | | | | | | | | | | | | | | | Convert to using the common config files. Signed-off-by: Adam Ford <adam.ford@logicpd.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | imx: vf610 add get_cpu_revPeng Fan2015-09-02-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we need to support runtime check for different drivers, we need to add get_cpu_rev for vf610, otherwise there will be build errors. This patch introduces a dummy CPU id which is not read from chip silicon. Later when we can get the real id from chip, can fix the value of MXC_CPU_VF610 then. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Suggested-by: Stefano Babic <sbabic@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | | arm, imx6: add aristainetos 2b board versionHeiko Schocher2015-09-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | there is a 2b board version of the aristainetos2 board. Differences to the v2: - spi cs for the nor flash and display controller changed - some pinmux changes - LED gpio settings changed Signed-off-by: Heiko Schocher <hs@denx.de>
* | | imx: mx6ul_14x14_evk select MX6ULPeng Fan2015-09-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to expose SoC choice to user, we already got the SoC according to the build target. So default "select MX6UL" for MX6UL_14x14_EVK target. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | | imx: mx6slevk: add SPL supportPeng Fan2015-09-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | | imx: mx6: ddr: add LPDDR2 supportPeng Fan2015-09-02-4/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add LPDDR2 support: 1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2. 2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to mx6_ddr3_cfg, but still keep it a single one for easy to choose parameters for LPDDR2. 3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC. 4. Update comments. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
* | | imx: mx6: ddr init MMDC according to ddr_typePeng Fan2015-09-02-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper. The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg when ddr_type is for DDR3. Later we can use ddr_type to initialize MMDC for LPDDR2. Initialize ddr_type for different boards which enable SPL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | | imx: mx6: ddr add dram io configuration and header file for i.MX6SLPeng Fan2015-09-02-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs. Add a new function mx6sl_dram_iocfg to configure dram io. Add header file to define macros for register address. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | | imx: mx6: ddr correct tRFC and tXSPeng Fan2015-09-02-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To Chip density 4Gb, tRFC should be 300ns, see "Table 61 — Refresh parameters by device density" of JESD79-3E. tXS(min) is max(5nCK, tRFC(min) + 10ns). Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | | imx: mx6: ddr no support MMDC1 for i.MX6SLPeng Fan2015-09-02-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | | tbs2910: use full name in Kconfig board selectionSoeren Moch2015-09-02-1/+1
| | | | | | | | | | | | Signed-off-by: Soeren Moch <smoch@web.de>
* | | imx: clock support enet2 anatop clock supportPeng Fan2015-09-02-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To i.MX6SX/UL, two ethernet interfaces are supported. Add ENET2 clock support: 1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed. To value 1, only i.MX6SX/UL can pass the check. 2. Modify board code who use this api to follow new api prototype. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* | | imx: mx6 move TARGET_xx Kconfig option to mx6 specific Kconfig filePeng Fan2015-09-02-2/+130
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig. Add enable "CONFIG_ARCH_MX6" for boards based on mx6. Then we can choose target boards using "make ARCH=arm menuconfig" with ARCH_MX6 defined. If using original way, we have no chance to enable ARCH_MX6 when "make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig, kconfig will complains "arch/../configs/platinum_titanium_defconfig:3: warning: override: TARGET_PLATINUM_TITANIUM changes choice state" Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Bénard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Marek Vasut <marex@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Soeren Moch <smoch@web.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Soeren Moch <smoch@web.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* | sunxi: Enable non-secure access to RTC on sun6i (A31s)Chen-Yu Tsai2015-08-31-0/+24
|/ | | | | | | | | | | | | | On the A31s the RTC is by default secured. Thus when u-boot loads the kernel in non-secure world, the RTC is unavailable. The SoC has a TrustZone Protection Controller, which can be used to enable non-secure access to the RTC. On the A31 the TZPC doesn't seem to do anything, i.e. changes to its register contents do not affect access to the RTC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()Kishon Vijay Abraham I2015-08-28-42/+0
| | | | | | | | | | Now that we have separate function to enable USB clocks, remove enabling USB clocks from enable_basic_clocks(). Now board_usb_init() should take care to invoke enable_usb_clocks() for enabling USB clocks. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: AM43xx: Add functions to enable and disable USB clocksKishon Vijay Abraham I2015-08-28-0/+70
| | | | | | | | | | | Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP5: Add functions to enable and disable USB clocksKishon Vijay Abraham I2015-08-28-0/+97
| | | | | | | | | | | Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2Kishon Vijay Abraham I2015-08-28-0/+18
| | | | | | | | Enabled clocks for the second dwc3 controller and second USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap-common: SYS_BOOT fallback logic correction and support for more devicesPaul Kocialkowski2015-08-28-10/+22
| | | | | | | | | | | | | | | | | | | | | The SYS_BOOT-based fallback shouldn't only check for one of the conditions of use and then let the switch/case handle each boot device without enforcing the conditions for each type of boot device again. For instance, this behaviour would trigger the fallback for UART when BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not CONFIG_SPL_USB_SUPPORT. Separating the logic for USB and UART solves this. In addition, this adds support for more peripheral devices (USBETH and CPGMAC) to the fallback mechanism. Note that the USBETH boot device should always be different from the USB boot device (each should match a different bootrom handoff case). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon2015-08-28-0/+9
| | | | | | | | | | | | | | | | | | | DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Add detection of ES2.0Nishanth Menon2015-08-28-0/+9
| | | | | | | | | | | | | | | | | Add support for detection of ES2.0 version of DRA7 family of processors. ES2.0 is an incremental revision with various fixes including the following: - reset logic fixes - few assymetric aging logic fixes - MMC clock rate fixes - Ethernet speed fixes - edma fixes for mcasp [ravibabu@ti.com: posted internal for an older bootloader] Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROLMasahiro Yamada2015-08-18-2/+0
| | | | | | | | | | | | | | | | | | | As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-08-18-0/+186
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| * ARM: AM43XX: Add functions to enable and disable EDMA3 clocksVignesh R2015-08-17-0/+36
| | | | | | | | | | | | | | | | | | Adds functions to enable and disable edma3 clocks which can be invoked by drivers using edma3 to control the clocks. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: OMAP5: Add functions to enable and disable EDMA3 clocksVignesh R2015-08-17-0/+45
| | | | | | | | | | | | | | | | | | Adds functions to enable and disable edma3 clocks which can be invoked by drivers using edma3 to control the clocks. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: OMAP5: Add support for disabling clocks in ubootKishon Vijay Abraham I2015-08-17-0/+53
| | | | | | | | | | | | | | | | | | Add do_disable_clocks() to disable clock domains and module clocks. These clocks are enabled using do_enable_clocks(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: AM43xx: Add support for disabling clocks in ubootKishon Vijay Abraham I2015-08-17-0/+52
| | | | | | | | | | | | | | | | | | Add do_disable_clocks() to disable clock domains and module clocks. These clocks are enabled using do_enable_clocks(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-08-19 12:21:40 +0000