summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv7/rmobile
Commit message (Collapse)AuthorAgeLines
* arm: rmobile: Add Porter board supportVladimir Barinov2015-02-25-1/+5
| | | | | | | | | | Porter is an entry level development board based on R-Car M2 SoC (R8A7791) This commit supports the following peripherals: - SCIF, I2C, Ethernet, QSPI, SD, USB Host Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: lager: Add support SDHINobuhiro Iwamatsu2015-02-25-8/+993
| | | | | | | | | Lager board has two SDHI port as SDHI0 and SDHI2. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: alt: Add support SDHINobuhiro Iwamatsu2015-02-25-5/+143
| | | | | | | | | Alt board has two SDHI port. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control RegisterNobuhiro Iwamatsu2015-02-13-1/+11
| | | | | | | | r8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we need to enable SMP bit of Auxiliary Control Register. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add SILK board supportVladimir Barinov2015-02-13-1/+5
| | | | | | | | | | | SILK is an entry level development board based on R-Car E2 SoC (R8A7794) This commit supports the following peripherals: - SCIF, I2C, Ethernet, QSPI, MMC, USB Host Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support gose boardNobuhiro Iwamatsu2014-11-10-0/+4
| | | | | | | | | | | | | | The gose board has R8A7793, 1GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF - QSPI - SPI Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support R8A7793Nobuhiro Iwamatsu2014-11-10-0/+1928
| | | | | | | | Renesas R8A7793 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: alt: Add external RAM bootNobuhiro Iwamatsu2014-11-04-1/+1
| | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0x70000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: koelsch: Add external RAM bootNobuhiro Iwamatsu2014-11-04-1/+1
| | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0x70000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: lager: Add external RAM bootNobuhiro Iwamatsu2014-11-04-0/+5
| | | | | | | | | If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM. The default boot address is 0xB0000000. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: r8a7790: Update initialize L2 cacheNobuhiro Iwamatsu2014-11-04-9/+2
| | | | | | | | | | | Initialization of L2CTLR[5] was set only as R8A7790 by commit 237faf095fb43abbed6e40266ef7efccc8b9308b. However, initialization of cash needs to be performed continuously. This changes into the processing which continues initialization of L2CTLR[5] into L2CTLR cash and performs it. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj2014-10-29-3/+0
| | | | | | | | | | | | | | | | | This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* arm: rmobile: r8a7794: Skip initialize L2 cacheNobuhiro Iwamatsu2014-10-09-0/+7
| | | | | | | | | rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of rmobile SoCs. The initialize L2 cache in lowlevel_init_ca15.S only needed for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15. This adds Skip to initialize L2 cache when r8a7794. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: r8a7791: Fix initialize L2 cacheNobuhiro Iwamatsu2014-10-09-1/+9
| | | | | | | | rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5]. This adds fix to set L2CTLR [5] only when the r8a7790. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: Remove unnecessary initialization for l2ctlrNobuhiro Iwamatsu2014-10-09-5/+0
| | | | | | This removes duplicate initialization of l2ctlr. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-2/+0
| | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* rmobile: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+37
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Rmobile board select menu to rmobile/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="rmobile"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: Add support R8A7794Nobuhiro Iwamatsu2014-07-24-0/+1515
| | | | | | | | Renesas R8A7794 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: r8a7791: Fix MOD_SEL3 function table about FN_SEL_IEBNobuhiro Iwamatsu2014-05-21-1/+1
| | | | | | | | FN_SEL_IEB is assigned 2bit, and 2bit can represent 4 patterns. However FN_SEL_IEB but we only use 3. It adds empty patterns as 0. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: Update print_cpuinfo functionNobuhiro Iwamatsu2014-04-28-27/+22
| | | | | | | | | The print_cpuinfo fucntion has same code. It has a code of many common. This adds a table of CPU information, duplicate using for-loop. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add rmobile_get_cpu_rev_fraction() for R-Car SoCsNobuhiro Iwamatsu2014-04-28-0/+5
| | | | | | | This adds rmobile_get_cpu_rev_fraction to get fraction revision for R-Car SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add 1 to value of the CPU revision in ↵Nobuhiro Iwamatsu2014-04-28-1/+1
| | | | | | | | | | rmobile_get_cpu_rev_integer() Value that can be obtained in the rmobile_get_cpu_rev_integer() starts at 0. However, revisions to start from 1, which adds 1. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Merge functions to get the CPU information of R8A7790 and R8A7791Nobuhiro Iwamatsu2014-04-28-34/+4
| | | | | | | | Functions to get the CPU information of R8A7790 and R8A7791 are common. This merges these as cpu_info-rcar.c. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: r8a779x: Fix L2 cache init and latency settingNobuhiro Iwamatsu2014-04-28-2/+18
| | | | | | | | L2CTLR only need to update for cluster 0. This changes L2CTLR to initialize only when cluster is 0. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-10-7/+1
|\ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
| * arm: rmobile: Do not create a symbolic link to sh timerMasahiro Yamada2013-11-17-7/+1
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | arm: rmobile: Remove config.mkNobuhiro Iwamatsu2013-12-03-9/+0
| | | | | | | | | | | | | | | | Renesas ARM SoCs (R-Mobile, R-Car) are armv7 only. This drops armv5 supprt from PLATFORM_CPPFLAGS and remove config.mk of rmobile. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | arm: kzm9g: Fix undefined reference to `__aeabi_uldivmod' errorNobuhiro Iwamatsu2013-12-03-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kzm9g board fails in building with -march=armv7-a. This fixs this problem by converting to do_div(). ----- USE_PRIVATE_LIBGCC=yes ./MAKEALL kzm9g ... arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_us': arch/arm/cpu/armv7/rmobile/timer.c:41: undefined reference to `__aeabi_uldivmod' arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_ms': arch/arm/cpu/armv7/rmobile/timer.c:47: undefined reference to `__aeabi_uldivmod' ----- Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* | arm: rmobile: Add support R8A7791Nobuhiro Iwamatsu2013-12-03-0/+1152
| | | | | | | | | | | | | | | | | | | | | | Renesas R8A7791 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* | arm: rmobile: Add support R8A7790Nobuhiro Iwamatsu2013-12-03-0/+1009
| | | | | | | | | | | | | | | | | | | | | | | | | | Renesas R8A7790 is CPU with Cortex-A7 and A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* | arm: rmobile: Move lowlevel_init.o to taget of each CPUNobuhiro Iwamatsu2013-12-03-6/+3
|/ | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* armv7: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-37/+13
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2013-10-14-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: refactor compiler options in config.mkMasahiro Yamada2013-09-23-1/+0
| | | | | | | | | | Every ARM cpu config.mk (arch/arm/cpu/{CPUDIR}/config.mk) defines: PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float So, this patch moves the common compiler options to arch/arm/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-152/+9
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* arm: rmobile: bugfix: wrong register saving in lowlevel_initTetsuyuki Kobayashi2012-10-08-11/+1
| | | | | | | | lowlevel_init() of rmobile badly assumed that ip register holds return address. The commit "63ee53a7 armv7 cpu_init_crit: Simplify code" breaks this assumption. This patch removes this bad assumption and simplify code. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* rmobile: Fix build timer driver with BUILD_DIRNobuhiro Iwamatsu2012-10-03-2/+8
| | | | | | | | | | Rmobile common timer driver diverts the same driver as SH architecture. When it builds at the same place with source, it is no problem, but when it builds out of source, it cannot build. This patch revises this problem. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: Add cpu_eth_init functionNobuhiro Iwamatsu2012-10-03-0/+37
| | | | | | | This supports ethernet driver of RMOBILE R8A7740. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support PFC of Renesas R8A7740Nobuhiro Iwamatsu2012-10-03-1/+2613
| | | | | | | | | Renesas R8A7740 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support Renesas R8A7740Nobuhiro Iwamatsu2012-10-03-0/+56
| | | | | | | | | Renesas R8A7740 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support TMU base timer functionNobuhiro Iwamatsu2012-10-03-1/+2
| | | | | | | Some rmobile SoC has TMU base timer function. This supports TMU. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Change initializing ICCICR registerNobuhiro Iwamatsu2012-10-03-0/+3
| | | | | | | | There is rmobile without ICCICR. ICCICR is initialized only when ICCICR is defined. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: separate cpu_rev to integer and fractionTetsuyuki Kobayashi2012-10-03-9/+30
| | | | | | | | | | According to SoC document, revision info is separated to integer part and fracton part. So I separete rmobile_get_cpu_rev() to rmobile_get_cpu_rev_integer() and rmobile_get_cpu_rev_fraction(). Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: fix CPU infoTetsuyuki Kobayashi2012-10-03-4/+4
| | | | | | | CPU info register was read wrongly by mistake. And function rmobile_get_cpu_rev() was not called properly. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Support build with gcc-4.6 or laterNobuhiro Iwamatsu2012-10-03-1/+27
| | | | | | | | | | | Latest rmobile code was tested by using old gcc (gcc-4.4). When we use gcc-4.6 (or later), the build is made, but does not work. This solves a problem not to work by add -march=armv5 to compiple option when we built in gcc-4.6 (or later). I tested by linaro's compiler version 2012.04-20120426. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support PFC of Renesas SH73A0Nobuhiro Iwamatsu2012-10-03-0/+2808
| | | | | | | | Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support Renesas SH73A0Nobuhiro Iwamatsu2012-10-03-24/+200
| | | | | | | | Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add basic support for Renesas R-MobileNobuhiro Iwamatsu2012-10-03-0/+219
This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>