arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	OMAP5: EMIF: Add support for DDR3 device	Lokesh Vutla	2012-07-07	-0/+15
\| \| \| \| \| \| \| \| \|	In OMAP5432 EMIF controlller supports DDR3 device. This patch adds support for ddr3 device intialization and configuration. Initialization sequence is done as specified in JEDEC specs. This also adds support for ddr3 leveling. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
*	OMAP5: Configure the io settings for omap5432 uevm board	Lokesh Vutla	2012-07-07	-19/+79
\| \| \| \| \| \|	This patch adds the IO settings required for OMAP5432 uevm's DDR3 pads Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
*	OMAP5: ADD chip detection for OMAP5432 SOC	Lokesh Vutla	2012-07-07	-1/+9
\| \| \| \| \| \|	This patch adds chip detection for OMAP5432 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
*	OMAP5: reset: Use cold reset in case of 5430ES1.0	SRICHARAN R	2012-05-15	-0/+14
\| \| \| \| \| \| \| \|	Warm reset is not functional in case of omap5430ES1.0. So override the weak reset_cpu function to use cold reset instead. Signed-off-by: R Sricharan <r.sricharan@ti.com>
*	OMAP4/5: Make the sysctrl structure common	SRICHARAN R	2012-05-15	-2/+2
\| \| \| \| \| \| \| \| \|	Make the sysctrl structure common, so that it can be used in generic functions across socs. Also change the base address of the system control module, to include all the registers and not simply the io regs. Signed-off-by: R Sricharan <r.sricharan@ti.com>
*	OMAP4/5: Make the silicon revision variable common.	SRICHARAN R	2012-05-15	-3/+3
\| \| \| \| \| \| \| \|	The different silicon revision variable names was defined for OMAP4 and OMAP5 socs. Making the variable common so that some code can be made generic. Signed-off-by: R Sricharan <r.sricharan@ti.com>
*	OMAP5: hwinit: Add the missing break statement	SRICHARAN R	2012-05-15	-0/+1
\| \| \| \| \| \| \|	The break statement is missing in init_omap_revision function, resulting in a wrong revision identification. So fixing this. Signed-off-by: R Sricharan <r.sricharan@ti.com>
*	OMAP5: io: Configure the io settings for omap5430 sevm board.	SRICHARAN R	2012-05-15	-0/+83
\| \| \| \| \| \| \| \| \|	The control module provides options to set various signal integrity parameters like the output impedance, slew rate, load capacitance for different pad groups. Configure these as required for the omap5430 sevm board. Signed-off-by: R Sricharan <r.sricharan@ti.com>
*	omap5: Add minimal support for omap5430.	Sricharan	2011-11-15	-0/+78
	This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>