summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv7/mx7
Commit message (Collapse)AuthorAgeLines
* MLK-12565 mx7: rdc: Change IS_ENABLED to remove build warningYe Li2017-04-05-2/+3
| | | | | | | | Change to use #ifdef not the IS_ENABLED, because we will get build warning when the CONFIG_IMX_RDC is not set. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit a212eff242efb8dc171479cbaca34049d508f87b)
* MLK-14422 imx7d: wdog: Overwrite the reset_cpu to turn off internal reset signalYe Li2017-03-14-0/+15
| | | | | | | | Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB for mx7d. So that the warm reset is disabled. The WDA is cleared to output WDOG_B immediately to reset the board. Signed-off-by: Ye Li <ye.li@nxp.com>
* Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini2017-01-24-0/+3
| | | | | | | | | This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
* treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-2/+2
| | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: armv7: move CONFIG_ARMV7_PSCI to KconfigMasahiro Yamada2016-09-07-0/+1
| | | | | | | | | Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms can select. Then, move CONFIG_ARMV7_PSCI, which is automatically enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-07-28-0/+23
|\
| * colibri_imx7: add Colibri iMX7S/iMX7D module supportStefan Agner2016-07-28-0/+7
| | | | | | | | | | | | | | | | | | | | | | This commit adds support for the Toradex Computer on Modules Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence can be easily supported by one board. The board code detects RAM size at runtime which is one of the differences between the two boards. The board also uses the UART's in DTE mode, hence making use of the new DTE support via serial DM. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mx7_common: use Kconfig for ARMv7 non-secure modeStefan Agner2016-07-19-0/+2
| | | | | | | | | | | | | | | | Use existing Kconfig symbols to let the user configure whether to build a U-Boot with non-secure mode support or not. This also allows to enable virtualization extension easily. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * mx7: set soc environment according to exact SoC typeStefan Agner2016-07-19-0/+14
| | | | | | | | | | | | | | | | This can be useful if the same U-Boot binary is used for boards available with a i.MX 7Solo and i.MX 7Dual. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | ARM: PSCI: Switch to per-CPU target PC storage in secure data sectionChen-Yu Tsai2016-07-15-5/+8
| | | | | | | | | | | | | | | | | | | | | | Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: Move __secure definition to common asm/secure.hChen-Yu Tsai2016-07-15-1/+1
| | | | | | | | | | | | | | | | sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: PSCI: Remove unused psci_text_end symbolChen-Yu Tsai2016-07-15-2/+0
| | | | | | | | | | | | | | | | | | psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: PSCI: Split out common stack setup code from psci_arch_initChen-Yu Tsai2016-07-15-16/+0
|/ | | | | | | | | | | | | | | Every platform has the same stack setup code in assembly as part of psci_arch_init. Move this out into a common separate function, psci_stack_setup, for all platforms. This will allow us to move the remaining parts of psci_arch_init into C code, or drop it entirely. Also provide a stub no-op psci_arch_init for platforms that don't need their own specific setup code. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* imx: mx7: implement reset_miscPeng Fan2016-05-31-0/+8
| | | | | | | We need to power down lcdif to make 'reset' can pass stress test. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: imx7d: fix ahb clock mux 1Stefan Agner2016-05-17-1/+1
| | | | | | | | | | | | | | The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual. While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2). Signed-off-by: Stefan Agner <stefan@agner.ch>
* imx: mx7d: move MX7D to Kconfig entryPeng Fan2016-03-26-0/+1
| | | | | | | | | | | If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX7D" to boards using i.MX7 Dual. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* warp7: Add initial supportFabio Estevam2016-03-26-0/+7
| | | | | | | | | | | Add the basic support for Warp7 board. For more information about this reference design, please visit: https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mx7: Distinguish between dual and solo versionsFabio Estevam2016-03-09-0/+18
| | | | | | | | | | Read the number of cores in the fuses to distinguish between the dual and solo versions. Tested on a mx7d sabresd and on a mx7solo warp7. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* imx: mx7d: isolate resources to domain 0 for A7 corePeng Fan2016-02-21-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current design, if any peripheral was assigned to both A7 and M4, it will receive ipg_stop or ipg_wait when any of the 2 platforms enter low power mode. We will have a risk that, if A7 enter wait, M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait asserted same time. Also if M4 enters stop mode, A7 will have no chance to access the peripheral. There are 26 peripherals affected by this IC issue: SIM2(sim2/emvsim2) SIM1(sim1/emvsim1) UART1/UART2/UART3/UART4/UART5/UART6/UART7 SAI1/SAI2/SAI3 WDOG1/WDOG2/WDOG3/WDOG4 GPT1/GPT2/GPT3/GPT4 PWM1/PWM2/PWM3/PWM4 ENET1/ENET2 Software Workaround: The solution is to set the peripherals to Domain0 by A core, since A core in Domain0. The peripherals which will be used by M4, will be set to Domain1 by M4. For example, A core set WDOG4 to domain0, but when M4 boots up, M4 will set WDOG4 to domain1, because M4 will use WDOG4. So the peripherals are not shared by them. This way requires the uboot implemented the RDC driver and set the 26 IPs above to domain 0 only. M4 image will set the M4 to domain 1 and set peripheral which it will use to domain 1. This patch enables the CONFIG_IMX_RDC and CONFIG_IMX_BOOTAUX for i.MX7D SABRESD board, and setup the 26 IP resources to domain 0. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: mx7: implement functions to boot auxiliary corePeng Fan2016-02-21-0/+36
| | | | | | | | | | | | Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: mx7d: clock support for RDCPeng Fan2016-02-21-0/+6
| | | | | | If CONFIG_IMX_RDC is enabled, enable clock for RDC and SEMAPHORE. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: mx7dsabresd: move mmc_get_env_devno to soc codePeng Fan2016-02-04-0/+21
| | | | | | | | | | | Move mmc_get_env_devno to soc.c and rename to mmc_get_env_dev to match the one in common/env_mmc.c. Introduce a weak function board_mmc_get_env_dev. Different boards can implement this according to sdhc controller which is used by the board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7: default enable MDIO open drainPeng Fan2016-01-24-0/+20
| | | | | | | | | | The management data input/output (MDIO) requires open-drain, i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports this feature. So to TO1.1, need to enable open drain by setting bits GPR0[8:7] for TO1.1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mx7: psci: add basic psci supportPeng Fan2015-11-12-0/+136
| | | | | | | | | | | | 1. add basic psci support for imx7 chip. 2. support cpu_on and cpu_off. 3. switch to non-secure mode when boot linux kernel. 4. set csu allow accessing all peripherial register in non-secure mode. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* arm: imx: add secure boot fuse details for imx7 SoCAdrian Alonso2015-10-30-0/+8
| | | | | | | Add secure boot fuse details (location) bank = 1, word = 3; for imx7 SoC platforms. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: hab: rework unified rom section for mx7Adrian Alonso2015-10-30-0/+2
| | | | | | | Rework unified section macro select via Kconfig option instead of macro definition in mx7_common header file. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: fix coding stylePeng Fan2015-09-24-1/+1
| | | | | | | Fix coding style. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7: discard unused global variablePeng Fan2015-09-24-2/+0
| | | | | | | Discard unused global variable. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7: drop select CPU_V7 for board targetPeng Fan2015-09-20-1/+0
| | | | | | | drop select CPU_V7 for board target, since ARCH_MX7 selects CPU_V7. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7dsabresd: Add support for MX7D SABRESD boardAdrian Alonso2015-09-13-0/+27
| | | | | | | | | | | | * Add i.MX7D SABRESD target board support with enabled modules: UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX. Build target: mx7dsabresd_config Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: imx7d: add imx-common cpu support for imx7dAdrian Alonso2015-09-13-0/+8
| | | | | | | | | Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* imx: imx7d: Add SoC system supportAdrian Alonso2015-09-13-0/+269
| | | | | | | | | Add imx7d basic SoC system support Misc arch dependent functions for system bring up Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: imx7d: clock control module supportAdrian Alonso2015-09-13-0/+1884
* Add Clock control module (CCM) support * iMX7D SoC introduces 3 main clock sysmtem abstraction for clock root frequency generation denominated clock slices. Core clock slice: hihg speed clock for ARM core Bus clock slice: for bus clocks IP clock slice: Peripheral clocks * At system boot ROM enables PLL_ARM, PLL_DDR, PLL_SYS, PLL_ENET In u-boot, we have to: - Configure PFD3- PFD7 for freq we needed in u-boot - Set clock root for peripherals (ip channel) Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
generated by cgit v1.1 at 2024-11-01 10:35:05 +0000