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* MLK-10708 imx:mx6qp Update Saturation THR for PRExPeng Fan2017-04-05-4/+4
| | | | | | | | | | Update settings for PRE. Value for Saturation THR of PREx, changed from 0x20 to 0x10 to make system more stable. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 02e7090604e55d9690532294b02b499609d46e63) (cherry picked from commit f7c5cf580fcc2c8ab95a8d835f5874d26216910f) (cherry picked from commit 1a90b60731cd60feba1ef7a11ede2613283bb4a8)
* MLK-12483-4 mx6: Modify drivers to disable fused modulesYe Li2017-04-05-9/+8
| | | | | | | | | | | Add the fuse checking in drivers, when the module is disabled in fuse, the driver will not work. Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C, USB-EHCI, GIS, LCDIF. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
* MLK-12483-3 mx6: Add a module fuse checkingYe Li2017-04-05-1/+278
| | | | | | | | | | | | | | | | Implement a functionality to read the soc fuses and check if any module is fused. For fused module, we have to disable it in u-boot dynamically, and change the its node in FDT to "disabled" status before starting the kernel. In this patch, we implement the ft_system_setup for FDT fixup. This function will be called during boot process or by "fdt systemsetup" command. To enable the module fuse checking, two configurations must be defined: CONFIG_MODULE_FUSE CONFIG_OF_SYSTEM_SETUP Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7236051526b73a5a25cc8330a79f5c08b7d70726)
* MLK-10674-2 imx: mx6qp settings for PREPeng Fan2017-04-05-2/+31
| | | | | | | | | | | | | | | | | | | | | | | Since the following piece settings can not be in DCD table, we add them in enable_ipu_clock. " setmem /32 0x00bb048c = 0x00000002 ## Bypass IPU1 QoS generator setmem /32 0x00bb050c = 0x00000002 ## Bypass IPU2 QoS generator setmem /32 0x00bb0690 = 0x00000200 ## Bandwidth THR for of PRE0 setmem /32 0x00bb0710 = 0x00000200 ## Bandwidth THR for of PRE1 setmem /32 0x00bb0790 = 0x00000200 ## Bandwidth THR for of PRE2 setmem /32 0x00bb0810 = 0x00000200 ## Bandwidth THR for of PRE3 setmem /32 0x00bb0694 = 0x00000020 ## Saturation THR for of PRE0 setmem /32 0x00bb0714 = 0x00000020 ## Saturation THR for of PRE1 setmem /32 0x00bb0794 = 0x00000020 ## Saturation THR for of PRE2 setmem /32 0x00bb0814 = 0x00000020 ## Saturation THR for of PRE " CONFIG_VIDEO_IPUV3 is always defined in mx6sabre_common.h, the settings sure will effect. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 61cec88a59ebf450dd1352d81e03b5aa842e1d71) (cherry picked from commit 3d25e2acd48f605678a98cf594a715809dea8286)
* MLK-10576 ARM: i.MX6: exclude the ARM errata from i.MX6 UP systemNitin Garg2017-04-05-5/+0
| | | | | | | | | | | | | | | | | The ARM errata 751472, 794072, 761320, 845369 only applied to the following configuration: This erratum affects configurations with either: - One processor if the ACP is present - Two or more processors i.MX6 family does not have the ACP and thus only the MPCore system will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> (cherry picked from commit 0db960784ba4f631ee5c0321b5d25f3b1ac55640) (cherry picked from commit 850f27d137a083a141c99fe9828d596807937d38)
* MLK-10524: iMX6x: Implement workaround for Cortex-A9 errata 845369Nitin Garg2017-04-05-0/+1
| | | | | | | | | | | Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee) (cherry picked from commit f20a65847577ff40dc7e3739a0bb69926885c734)
* ENGR00325255 pcie:enable pcie support on imx6sx sdYe Li2017-04-05-5/+32
| | | | | | | | | | | | | | | | | Enable pcie support in uboot on imx6sx sd boards - enable_pcie_clock should be call before ssp_en is set, since that ssp_en control the phy_ref clk gate, turn on it after the source of the pcie clks are stable. - add debug info - add rx_eq of gpr12 on imx6sx - there are random link down issue on imx6sx. It's pcie ep reset issue. solution:reset ep, then retry link can fix it. (cherry picked from commit ec78595a24b5ff1020baa97b6d6e79a3a3326307) Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 81fd30250110d72992758f08b66c07306126892b)
* ENGR00319965 pcie: mask the imx6sl outRichard Zhu2017-04-05-15/+20
| | | | | | | | | | imx6sl doesn't have the pcie module, mask the pcie related codes from imx6sl. Signed-off-by: Richard Zhu <r65037@freescale.com> (cherry picked from commit acaff11da33f8f0cb1521d3c48e64e7ed9a87bec) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 48a4606ef575c72e16e31c167dce042fcb66191c)
* ENGR00319415 pcie: random link down issue after warm-rstRichard Zhu2017-04-05-0/+18
| | | | | | | | | | | | | | | | | | | | | There are about 0.02% percentage on some imx6q/dl/solo hw boards, random pcie link down when warm-reset is used. Make sure to clear the ref_ssp_en bit16 of gpr1 before warm-rst, and set ref_ssp_en after the pcie clks are stable to workaround it. rootcause: * gpr regisers wouldn't be reset by warm-rst, while the ref_ssp_en is required to be reset by pcie. (work-around in u-boot) * ref_ssp_en should be set after pcie clks are stable. (work-around in kernel) Signed-off-by: Richard Zhu <r65037@freescale.com> (cherry picked from commit 5cc825b12c6b86a22f1a6a0535b52cf3ee142e77) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 6193cf4e3384a59e29546d13a67657f7faeafc9e) (cherry picked from commit 7b4aabeddffabca46d7d6e7ef2611de468a6b4f7)
* MLK-11064 imx: mx6qp: Adjust AQos settings for peripheralsYe.Li2017-04-05-0/+3
| | | | | | | | | | | To resolve USB camera bandwidth issue, the patch sets recommended AQoS setting from IC team value for peripheral and only on imx6qp. The address is: 0xbb0608, the value is: 0x80000201 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 11906c712a52e7a20caf71d7c5da4e951a59db29) (cherry picked from commit 5dcf073b8f2479a2adbb8d9fb03d9c9c70664e32)
* MLK-12534 mx6: shutdown vddpu and PCIE phy to save powerYe Li2017-04-05-0/+42
| | | | | | | | | | | | | | | | | | | Shutdown VDDPU and PCIE phy to save power. For PCIE, the i.MX6SL and i.MX6UL does not have this module, so don't need it. For VDDPU, the i.MX6UL does not have GPU, does not need it. And on i.MX6QP there is narrow window that PRE driver is ready but GPU driver probe later, and the later GPU driver turn on PU may cause 'PRE hang' issue. To simplify thing, do not turn off PU in u-boot. Reference: commit: 6b0787b726e2ff32210d742d93ecd3f4bb2ae402 commit: 4bd0032c0eba50fa0caf43f50f735a3cfbe36a8d Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5c96ea91fe89c67991c929c9b39ffaa940d28391)
* MLK-12533 mx6sx: select OSC as uart's clk parentYe Li2017-04-05-0/+13
| | | | | | | | | | | As M4 is sourcing UART clk from OSC, to make UART work when M4 is enabled, need to select OSC as clk parent, 24M OSC is enough for debug UART in uboot. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit b5e1b393192099e91c5cb75b69291c87eacb9f60) (cherry picked from commit 416dea861c2dd5a197bf2354069bba8415a20b12)
* ENGR00321299 gis: clean csi0 input mux set bit in GPRSandor Yu2017-04-05-0/+6
| | | | | | | | | | | | When gis enable in uboot, the CSI0 input mux select setting to vadc module, clean the bit when gis disabled. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26) (cherry picked from commit c83fd326e810c2fff44b8b02e78406d5d04c977c) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit d6e803ed5f51d31ebe7e9d178aa11f16401b7fc8) (cherry picked from commit 2065b417ae93436736e49ca66b66aa0791d003fe)
* ENGR00315894-77 mx6 soc: Add vadc power up/down functionYe.Li2017-04-05-0/+46
| | | | | | | | | | | Add vadc power up/down function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 96d990ef754a879f6ca9da4adf6e0be3d21cdc51) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 01b88201aa86bef26a4254ac43aff90e99fd2c06) (cherry picked from commit d50b53f138dd3b4c463c80ac8e14f41ac0fdd415)
* ENGR00315894-76 mx6 clock: Add vadc clock enable functionYe.Li2017-04-05-0/+12
| | | | | | | | | | | Add vadc clock enable function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 721c7a1448c5b7265b597b83d18f8338a27ea213) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 903a59ef941f39b6d7f693dd7c60528e166de079) (cherry picked from commit dc767fb7d5c155f2a6ef01c4dee808b9c1944fc2)
* MLK-12437-1 mx6sx: Add support for LVDS displayYe Li2017-04-05-1/+60
| | | | | | | | The i.MX6SX uses a LVDS bridge to mux to the LCDIF interface. Implmement a function for this muxing. So that on 6SX we can use a LVDS display. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 763658d9b497e44b7411581da592ef5b522e9cc9)
* MLK-12434-9: mx6: define CONFIG_BOARD_LATE_INITPeng Fan2017-04-05-0/+5
| | | | | | | | Define CONFIG_BOARD_LATE_INIT for mx6qarm2/mx6slevk/mx6sxsabresd to let mmcdev/mmcroot work as expected. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 86135fb7e55c3046ead899b83f58dd6048eda9e8)
* MLK-11528 imx: mx6ul check fuse before init beePeng Fan2017-03-14-1/+11
| | | | | | | | | | | | Need to check fuse bit 25 of bank 0 word 4 before initialize bee. The bit: 0 means bee enabled, 1 means bee disabled. If disabled, continuing initialize bee will cause system hang, so need to check this bit before initialize bee. Add macro to enable BEE in header file, default disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit ef4cb7c53418e4e1dd7cfcb7c6974cfea77ef3c0)
* MLK-10958 imx: mx6ul support Bus Encryption EnginePeng Fan2017-03-14-1/+463
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to support Bus Encryption Engine(BEE) for i.MX 6UL. Supported feature: 1. SNVS key and soft key 2. CTR and ECB mode 3. Specify address region to bee. Two commands are included: bee init [key] [mode] [start] [end] - BEE block initial "Example: bee init 1 1 0x80000000 0x80010000\n" bee test [region] "Example: bee test 1\n" Mapping: [0x10000000 - (0x10000000 + size - 1)] : [start - (start + size - 1)] [0x30000000 - (0x30000000 + IRAM_SIZE - 1)] : [IRAM_BASE_ADDR - (IRAM_BASE_ADDR + IRAM_SIZE - 1)] Whatever start is, start - (start + size -1) will be fixed mapping to 0x10000000 - (0x10000000 + size - 1) Since default AES region's protected size is SZ_512M, so on mx6ul evk board, you can not simply run 'bee init', it will overlap with uboot execution environment, you can use 'bee init 0 0 0x80000000 0x81000000'. If want to use bee, Need to define CONFIG_CMD_BEE in board configuration header file, since CONFIG_CMD_BEE default is not enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 29b9bdbbdac9678dba9b7bc2d3662598e9c548a5) (cherry picked from commit 6d45292ff7e7020a48842f033f8a337daabe4476)
* ARM: Migrate errata to KconfigTom Rini2017-03-09-0/+4
| | | | | | | | | This moves all of the current ARM errata from various header files and in to Kconfig. This allows for a minor amount of cleanup as we had some instances where both a general common header file was enabling errata as well as the board config. We now just select these once at the higher level in Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* flash: complete CONFIG_SYS_NO_FLASH move with renamingMasahiro Yamada2017-02-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is not completed. Finish this work by the tool. During this move, let's rename it to CONFIG_MTD_NOR_FLASH. Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH" than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will make the code more readable. Besides, negative meaning symbols do not fit in obj-$(CONFIG_...) style Makefiles. This commit was created as follows: [1] Edit "default n" to "default y" in the config entry in common/Kconfig. [2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH" [3] Rename the instances in defconfigs by the following: find . -path './configs/*_defconfig' | xargs sed -i \ -e '/CONFIG_SYS_NO_FLASH=y/d' \ -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/' [4] Change the conditionals by the following: find . -name '*.[ch]' | xargs sed -i \ -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \ -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \ -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \ -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/' [5] Modify the following manually - Rename the rest of instances - Remove the description from README - Create the new Kconfig entry in drivers/mtd/Kconfig - Remove the old Kconfig entry from common/Kconfig - Remove the garbage comments from include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* BOARD: MCCMON6: Provide support for iMX6q based mccmon6 boardLukasz Majewski2017-01-30-0/+5
| | | | | | | | This patch provides u-boot support for Liebherr (LWN) mccmon6 board. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: imx6ul: Move liteSOM source to SoC directoryMarcin Niestroj2017-01-27-1/+209
| | | | | | | | | | | Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested in [1] during discussion of chiliSOM support patches. [1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_BOARD_EARLY_INIT_F to KconfigSimon Glass2017-01-25-0/+4
| | | | | | | This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F Signed-off-by: Simon Glass <sjg@chromium.org>
* Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini2017-01-24-0/+30
| | | | | | | | | This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
* imx6: icorem6_rqs: Add FEC supportJagan Teki2016-12-16-0/+1
| | | | | | | | | Add FEC support for Engicam i.CoreM6 RQS modules. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* imx6: geam6ul: Add FEC supportJagan Teki2016-12-16-0/+1
| | | | | | | | | Add FEC support for Engicam GEAM6UL module. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* imx6: icorem6_rqs: Add I2C supportJagan Teki2016-12-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add I2C support for Engicam i.CoreM6 RQS modules. icorem6qdl-rqs> i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 Bus 2: i2c@021a8000 icorem6qdl-rqs> i2c dev 0 Setting bus to 0 icorem6qdl-rqs> i2c speed 100000 Setting bus speed to 100000 Hz icorem6qdl-rqs> i2c probe Valid chip addresses: 4F icorem6qdl-rqs> i2c md 4F 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ icorem6qdl-rqs> i2c bus Bus 0: i2c@021a0000 (active 0) 4f: generic_4f, offset len 1, flags 0 Bus 1: i2c@021a4000 Bus 2: i2c@021a8000 Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* arm: imx6q: Add Engicam i.CoreM6 Quad/Dual RQS Starter Kit initial supportJagan Teki2016-12-16-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boot from MMC: ------------- U-Boot SPL 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44) Trying to boot from MMC1 U-Boot 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44 +0530) CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: POR Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit DRAM: 512 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 icorem6qdl-rqs> Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* imx6: geam6ul: Add I2C supportJagan Teki2016-12-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Add I2C support for Engicam GEAM6UL module. geam6ul> i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 geam6ul> i2c dev 0 Setting bus to 0 geam6ul> i2c dev Current bus is 0 geam6ul> i2c speed 100000 Setting bus speed to 100000 Hz geam6ul> i2c probe Valid chip addresses: 2C geam6ul> i2c md 2C 0xff 00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........ Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* arm: imx6ul: Add Engicam GEAM6UL Starter Kit initial supportJagan Teki2016-12-16-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boot Log: -------- U-Boot SPL 2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30) Trying to boot from MMC1 U-Boot 2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30 +0530) CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 43C Reset cause: POR Model: Engicam GEAM6UL DRAM: 128 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 geam6ul> Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* imx6: icorem6: Add I2C supportJagan Teki2016-12-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add I2C support for Engicam i.CoreM6 qdl board. icorem6qdl> i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 Bus 2: i2c@021a8000 icorem6qdl> i2c dev 2 Setting bus to 2 icorem6qdl> i2c speed 100000 Setting bus speed to 100000 Hz icorem6qdl> i2c probe Valid chip addresses: 2C icorem6qdl> i2c md 2C 0xff 00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........ Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Heiko Schocher <hs@denx.de>
* icorem6: Use CONFIG_DM_ETH supportJagan Teki2016-12-16-0/+1
| | | | | | | | | | | | Use CONFIG_DM_ETH and remove board_eth_init code from board files. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* arm: imx: add i.MX6SLL EVK board supportPeng Fan2016-12-16-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX6SLL EVK board support. 1. Add imx6sll-evk device tree. 2. Enable SDHC/I2C/UART. 3. Enable REGULATOR/PMIC/I2C/GPIO/SDHC/PINCTRL driver. Boot Log: U-Boot 2016.11-00127-gc635871-dirty (Nov 24 2016 - 13:28:19 +0800) CPU: Freescale i.MX6SLL rev1.0 at 792MHz CPU: Commercial temperature grade (0C to 95C)Reset cause: POR Model: Freescale i.MX6SLL EVK Board Board: MX6SLL EVK DRAM: 2 GiB i2c bus 0 at 35258368, no gpio pinctrl state. PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sll: add Kconfig entry for i.MX6SLLPeng Fan2016-12-16-0/+4
| | | | | | add Kconfig entry for i.MX6SLL Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: mx6sll: add clock supportPeng Fan2016-12-16-7/+21
| | | | | | | Add clock support for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: clock: gate clk before changing pix clk muxPeng Fan2016-12-16-20/+30
| | | | | | | | | | | The LCDIF Pixel clock mux is not glitchless, so need to gate before changing mux. Also change enable_lcdif_clock prototype with a new input parameter to indicate disable or enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sl: add lcdif clock supportPeng Fan2016-12-16-19/+59
| | | | | | Add lcdif clock support for i.MX6SL. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: mx6: lcdif: gate clock before changing muxPeng Fan2016-12-16-0/+10
| | | | | | | | The mux for the lcd clock is not glitchless, so need to first gate the clock before changing the mux. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: fix mmdc ch0 clk for 6SLPeng Fan2016-12-16-0/+5
| | | | | | | | | | >From RM, per_periph2_clk_sel option3 is: "derive clock from 198MHz clock (divided 392MHz PLL2 PFD)." So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* board/liteboard: Add support for liteBoardMarcin Niestroj2016-12-16-0/+5
| | | | | | | | | | | | liteBoard is a development board which uses liteSOM as its base. Hardware specification: * liteSOM (i.MX6UL, DRAM, eMMC) * Ethernet PHY (id 0) * USB host (usb_otg1) * MicroSD slot (uSDHC1) Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
* udoo_neo: Add thermal supportBreno Lima2016-12-16-0/+2
| | | | | | | Add thermal support on the Kconfig file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* udoo_neo: Move MX6SX configuration to KconfigBreno Lima2016-12-16-0/+1
| | | | | | | | | It's not necessary to define the processor in the defconfig file. The preferred method to select the SoC is via Kconfig file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* arm: imx: initial support for colibri imx6Max Krummenacher2016-12-16-0/+8
| | | | | | | | This adds board support for the Toradex module family Colibri iMX6. The familiy consists of a module with i.MX6 DualLite, i.MX6 Solo, both with a version for commercial and industrial temperature range. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
* arm: imx: initial support for apalis imx6Max Krummenacher2016-12-16-0/+8
| | | | | | | | This adds board support for the Toradex module family Apalis iMX6. The familiy consists of a module with i.MX6 Dual, i.MX6 Quad with commercial and industrial temperature range. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
* imx6: clock: Enable External Memory Interface [EIM] clock (eim_slow_clock)Lukasz Majewski2016-11-30-0/+14
| | | | | | | | This patch extends the imx6 clock code to enable or disable the EIM slow clock, which in necessary when one wants to use EIM interface t o read/write from external memory (e.g. NOR). Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
* mx6sx: Add initial support for Samtec VIN|ING 2000 boardChristoph Fritz2016-11-30-0/+7
| | | | | | | | This patch adds initial support for Samtec VIN|ING 2000 board. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* mx6sx: Add initial support for UDOO Neo BoardBreno Lima2016-11-29-0/+5
| | | | | | | | | | | | | | | | | | | | | | UDOO Neo Board is a development board from Seco that has three models: - UDOO Neo Basic - UDOO Neo Basic Kick Starter - UDOO Neo Extended - UDOO Neo Full All versions are based on the i.MX6 SoloX processor. For more details about the UDOO Neo board, please refer to: http://www.udoo.org/udoo-neo/ This work is based on a previous commit of Francesco Montefoschi <francesco.monte@gmail.com>: https://github.com/fmntf/u-boot/commit/877b71184a5105e708024f232d36aed574961844 Only tested on the UDOO Neo Full board. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routinesEric Nelson2016-11-29-2/+9
| | | | | | | | | | | | | | | The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste space on other boards using SPL. Add a KConfig entry to allow boards to selectively include the DDR calibration routines. Signed-off-by: Eric Nelson <eric@nelint.com>
* mx6: ddr: add routine to return DDR calibration dataEric Nelson2016-11-29-0/+23
| | | | | | | | | | | | Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. This routine will be used in a subsequent patch set adding a virtual "mx6memcal" board, but could also be useful when gathering statistics during an initial production run. Signed-off-by: Eric Nelson <eric@nelint.com>
generated by cgit v1.1 at 2024-09-16 01:32:03 +0000