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path: root/arch/arm/cpu/armv7/mx6
Commit message (Expand)AuthorAgeLines
* ENGR00331706-4 imx: mx6sl: Set the preclk clock source to OSC 24MhzYe.Li2014-09-18-0/+16
* ENGR00331706-3 imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz sourceYe.Li2014-09-18-0/+4
* ENGR00327364 iMX6: Ensure that the bandgap self-bias circuit is disabled afte...Ranjani Vaidyanathan2014-09-10-0/+24
* ENGR00330792 imx: mx6: Merge anatop registers to CCM structureYe.Li2014-09-10-54/+47
* ENGR00329484-2 ARM:MX6: Clear Align bit in SCTLRPeng Fan2014-09-05-0/+3
* ENGR00323255 Fixed QSPI randomly access timeout issueAllen Xu2014-08-29-16/+22
* ENGR00329631: imx6: fix kernel suspend reboot if keep watchdog aliveRobin Gong2014-09-02-0/+5
* ENGR00326277-2 imx6: watchdog: use WDOG_B mode for wdog reset in ldo-bypass modeRobin Gong2014-08-26-1/+21
* ENGR00326277-1: imx6: ldo_bypass: fix VDDARM voltage setting violate datasheetRobin Gong2014-08-26-1/+44
* ENGR00326994 iMX6: Checking PLL2 PFD0 and PFD2 for periph_clk before resetYe.Li2014-08-15-7/+16
* ENGR00325255 pcie:enable pcie support on imx6sx sdRichard Zhu2014-07-31-6/+36
* ENGR00322860 iMX6SX: Add function to check M4 status before bootingYe.Li2014-07-17-0/+13
* MX6: Correct calculation of PLL_SYSAndre Renaud2014-07-15-1/+1
* mx6: soc: Update the comments of set_ldo_voltage()Fabio Estevam2014-07-15-3/+2
* ENGR00321299 gis: clean csi0 input mux set bit in GPRSandor Yu2014-07-07-0/+6
* ENGR00321260-1 iMX6: Add support to get CPU serial numberYe.Li2014-07-04-0/+13
* ENGR00320350 iMX6SLEVK: Fix build warning of PCIE Phy power downYe.Li2014-06-30-0/+2
* ENGR00319965 pcie: mask the imx6sl outRichard Zhu2014-06-25-2/+7
* ENGR00319415 pcie: random link down issue after warm-rstRichard Zhu2014-06-24-0/+18
* ENGR00315894-77 mx6 soc: Add vadc power up/down functionYe.Li2014-06-17-0/+46
* ENGR00315894-76 mx6 clock: Add vadc clock enable functionYe.Li2014-06-17-0/+9
* ENGR00315894-71 iMX6SX Update registers and clock for displayYe.Li2014-06-17-0/+199
* ENGR00315894-57 iMX6SX: Add M4 boot support at soc levelYe.Li2014-06-17-0/+25
* ENGR00315894-54 iMX6SX/SL: Modify SOC to support two ENETYe.Li2014-06-17-4/+64
* ENGR00315894-51 iMX6SX: Add QuadSPI clock enable functionYe.Li2014-06-17-0/+42
* ENGR00315894-48 iMX6SX: Add iMX6SX SoC supportYe.Li2014-06-17-2/+47
* ENGR00315894-35 i.mx6: Fix issue in HAB clock settingYe.Li2014-06-17-9/+9
* ENGR00315894-19 iMX6 Disable the L2 before chaning the PL310 latencyYe.Li2014-06-17-0/+3
* ENGR00315894-11 i.mx6:shutdown vddpu and pcie phy to save powerYe.Li2014-06-17-0/+31
* ENGR00315499-21 HDMI: splash screen function enhancementNitin Garg2014-06-13-1/+11
* ENGR00315499-10 ARM:imx6:sabresd/sabreauto Add android fastboot supportingNitin Garg2014-06-13-0/+94
* ENGR00315499-6 ARM:imx6: Add USB gadget driver imx_udc to support Android fas...Nitin Garg2014-05-27-0/+50
* ENGR00315499-5: Support i.MX6 1.2GHz via LDO bypassNitin Garg2014-05-27-0/+70
* ENGR00315499-3: Support i.MX6 HAB authentication of kernel imageNitin Garg2014-05-27-7/+287
* ENGR00315499-1: Add i.MX6 CPU temperature sensor supportNitin Garg2014-05-27-1/+136
* ARM: imx6: fix wrong fec clkMarkus Niebel2014-02-11-1/+1
* mx6: Enable L2 cache supportFabio Estevam2014-02-11-0/+58
* mx6: Distinguish mx6dual from mx6quadFabio Estevam2014-02-11-3/+11
* imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failureAnson Huang2014-02-11-0/+11
* imx6: ensure AHB clock is 132MHz in low freq boot modeAnson Huang2014-02-11-0/+20
* ARM: mx6: Add PCI express clock configurationMarek Vasut2014-01-26-10/+65
* mx6: Revert "mx6: soc: Disable VDDPU regulator"Fabio Estevam2014-01-17-41/+0
* mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()Fabio Estevam2014-01-15-1/+7
* imx6: make use of lldiv(..)Christian Gmeiner2014-01-13-1/+2
* ARM: mx6: Allow enablement of FEC Anatop based clock for all MX6Otavio Salvador2014-01-03-10/+11
* mx6: soc: Disable VDDPU regulatorFabio Estevam2014-01-02-0/+41
* mx6: soc: Add the required LDO ramp up delayFabio Estevam2014-01-02-3/+19
* mx6: soc: Introduce set_ldo_voltage()Fabio Estevam2014-01-02-7/+26
* mx6: soc: Set the VDDSOC at 1.175 VFabio Estevam2014-01-02-1/+1
* mx6: soc: Clear the LDO ramp values up prior to setting the LDO voltagesFabio Estevam2014-01-02-0/+16
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