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path: root/arch/arm/cpu/armv7/mx6/clock.c
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* imx: Fix build of mx6sxsabresdStefano Babic2014-09-11-1/+1
| | | | | | | | | | Commit 224beb833e544b802f08765271cec07667d39669 add clock enabling function for FEC, but the masks are not available for SX processor and the mx6sxsabresd cannot be built clean. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Nikita Kiryanov <nikita@compulab.co.il>
* pcie_imx: Add mx6solox supportFabio Estevam2014-09-09-4/+13
| | | | | | | Let PCI on mx6solox also be supported. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mx6: add clock enabling functionsNikita Kiryanov2014-09-09-0/+90
| | | | | | | | | Add functions to enable/disable clocks for UART, SPI, ENET, and MMC. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* mx6sx: Adjust enable_fec_anatop_clock() for mx6soloxFabio Estevam2014-08-20-0/+21
| | | | | | Configure and enable the ethernet clock for mx6solox. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX6: add enable_spi_clk()Heiko Schocher2014-07-23-0/+18
| | | | | | | | | add enable_spi_clk(), so board code can enable spi clocks. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de>
* mx6: clock: Do not enable sata and ipu clocksFabio Estevam2014-07-10-0/+8
| | | | | | mx6sx does not have sata nor ipu blocks, so do not handle such clocks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Add support for the mx6solox variantFabio Estevam2014-07-10-2/+2
| | | | | | | | | | | | mx6solox is the newest member of the mx6 family. Some of the new features on this variants are: - Cortex M4 microcontroller (besides the CortexA9) - Dual Gigabit Ethernet Add the initial support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX6: Correct calculation of PLL_SYSAndre Renaud2014-07-09-1/+1
| | | | | | | DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do the shift after the multiply to avoid rounding errors Signed-off-by: Andre Renaud <andre@bluewatersys.com>
* ARM: imx6: fix wrong fec clkMarkus Niebel2014-02-11-1/+1
| | | | | | | | | | imx_get_fecclk() returns enet_ref instead of ipg. Since the clock is used to calculate the prescaler for the MDIO interface wrong values can be calculated. Tested on a custom MX6S board with 100MBit interface Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
* ARM: mx6: Add PCI express clock configurationMarek Vasut2014-01-26-10/+65
| | | | | | | | | | | | | | | | Split the SATA clock enabling function and add PCI express clock enabling function. The SATA clock enabling function starts up the 100MHz SATA reference PLL in ENET_PLL register, but the code can be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull this code into separate function. Moreover, add the PCIe clock enabling code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()Fabio Estevam2014-01-15-1/+7
| | | | | | | | | | Provide an argument to enable_fec_anatop_clock() to specify the clock frequency that will be generated. No changes are made to mx6slevk, which uses the default 50MHz fec clock. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imx6: make use of lldiv(..)Christian Gmeiner2014-01-13-1/+2
| | | | | | | | | | Commit 762a88ccf8540948fbf8c31b40a29d1e0684a25b introduces a 64-bit division without using the lldiv() function, which pulls in previously unused libgcc stuff. Signed-off-by: Måns Rullgård <mans@mansr.com> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: mx6: Allow enablement of FEC Anatop based clock for all MX6Otavio Salvador2014-01-03-10/+11
| | | | | | | | | | The enable_fec_anatop_clock method should be available for all MX6 variant as it is not MX6 SoloLite specific. This moves the code out of the #ifdef/#endif and we make it conditional to CONFIG_FEC_MXC instead. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6: clock: Fix the calculation of PLL_ENET frequencyFabio Estevam2013-12-17-1/+1
| | | | | | | | | | | | | | | | According to the mx6 quad reference manual, the DIV_SELECT field of register CCM_ANALOG_PLL_ENETn has the following meaning: "Controls the frequency of the ethernet reference clock. - 00 - 25MHz - 01 - 50MHz - 10 - 100MHz - 11 - 125MHz" Current logic does not handle the 25MHz case correctly, so fix it. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-14/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * mx6: compute PLL PFD frequencies rather than using definesPierre Aubert2013-10-17-14/+42
| | | | | | | | | | Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de>
* | i2c: mxc: move to new subsystemtrem2013-10-17-1/+1
|/ | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
* mx6: Fix use of improper value in enable_ipu_clockPierre Aubert2013-09-27-1/+1
| | | | | | | | | The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize the CCGR3 register caused an undefined value for CG0. Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx6slevk: Add Ethernet supportFabio Estevam2013-09-20-0/+30
| | | | | | | | mx6slevk has a SMSC8720 connected in RMII mode. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Fix calculation of emi_slow clock rateAndrew Gabbasov2013-09-10-4/+4
| | | | | | | | | | | | | This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0, that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET was used instead of ACLK_EMI_SLOW_PODF_OFFSET). Using the occasion, change the variable name 'emi_slow_pof' to more consistent 'emi_slow_podf'. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* Merge git://git.denx.de/u-boot-armStefano Babic2013-07-31-17/+1
|\ | | | | | | | | | | | | | | | | Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h Signed-off-by: Stefano Babic <sbabic@denx.de>
| * Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* | mx6: Factor out common HDMI setup codePardeep Kumar Singla2013-07-27-0/+8
|/ | | | | | | Instead of duplicating HDMI setup code for every mx6 board, factor out the common code Signed-off-by: Pardeep Kumar Singla <b45784@freescale.com> Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
* Add mxc_ocotp driverBenoît Thébaudeau2013-04-28-0/+14
| | | | | | Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* mx6: Add solo-lite variant supportFabio Estevam2013-04-22-2/+36
| | | | | | | | | mx6 solo-lite is another member of the mx6 series. For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: clock: Only show CSPI clock if CSPI is enabledFabio Estevam2012-11-19-0/+2
| | | | | | | | | If a board does not enable CSPI, there is no need to show the CSPI clock frequency as part of the 'clock' command. Reported-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com>
* mx5/6: Define default SoC input clock frequenciesBenoît Thébaudeau2012-10-15-10/+10
| | | | | | | | | | | Define default SoC input clock frequencies for i.MX5/6 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Use MXC_I2C_CLK in imx i2c driverMatthias Weisser2012-10-15-0/+1
| | | | | | | | i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using MXC_I2C_CLK on all imx systems using i2c. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fieldsEric Nelson2012-10-15-4/+6
| | | | | | | | | | | | | Add meaningful constants for each clock channels and use them for enabling and disabling i.MX6 clocks. Includes an update to enable/disable the IPU1 clock in drivers/video/ipu_common to remove IMX5x register access when used on i.MX6 as discussed in V1: http://patchwork.ozlabs.org/patch/185129/ Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* imx-common: add i2c.c for bus recovery supportTroy Kisky2012-07-31-0/+20
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* i.MX6: add enable_sata_clock()Eric Nelson2012-05-15-0/+31
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
* imx-common: Factor out get_ahb_clk()Fabio Estevam2012-05-15-15/+4
| | | | | | | | | get_ahb_clk() is a common function between mx5 and mx6. Place it into imx-common directory. Cc: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* usb/ehci: Add USB support for the MX6QWolfgang Grandegger2012-03-26-0/+13
| | | | | | | Currently, only USB Host 1 is supported. Cc: Remy Bohmer <linux@bohmer.net> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* i.mx: i.mx6q: Add the enet clock functionJason Liu2012-01-16-0/+5
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jason Liu <jason.hui@linaro.org> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx: add the initial support for freescale i.MX6Q processorJason Liu2011-12-09-0/+366
i.MX6Q is freescale quad core processors with ARM cortex_a9 complex. This patch is to add the initial support for this processor. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de>