summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv7/Makefile
Commit message (Collapse)AuthorAgeLines
* ARM: PSCI: Add helper functions to access per-CPU target PC storageChen-Yu Tsai2016-07-15-1/+1
| | | | | | | | Now that we have a data section, add helper functions to save and fetch per-CPU target PC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: armv7: refactor Makefile slightlyMasahiro Yamada2016-06-24-9/+2
| | | | | | Use Kbuild standard style where possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* board: arm:: Add support for Broadcom BCM23550Steve Rae2016-06-13-0/+1
| | | | | | Add support for the Broadcom BCM23550 board. Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm codeHans de Goede2016-04-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | v7_maint_dcache_all() does not work reliable when build with gcc6, see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788 While debugging this I learned that v7_maint_dcache_all() is unreliable when build with gcc5 too when it is marked as noinline. This commit fixes the reliability issues by replacing the C-code with the ready to use asm implementation from the kernel. Given that this code when written as C-code clearly is quite fragile (also see the existing comments about the C-code being the way it is to get optimal assembly) and that we have a proven asm alternative, I believe that this is the best solution. Note that we actually already had a copy of the kernel's v7_flush_dcache_all() before this commit in arch/arm/mach-uniphier/arm32/lowlevel_init.S. This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper which saves / restores the clobbered registers for use from C-code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* arm: s5pc1xx: move SoC to mach-s5pc1xxMinkyu Kang2015-11-30-1/+0
| | | | | | move arm/arm/cpu/armv7/s5pc1xx to arch/arm/mach-s5pc1xx Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-15-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* imx: imx7d: add imx-common cpu support for imx7dAdrian Alonso2015-09-13-1/+2
| | | | | | | | | Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ARM: exynos: move SoC sources to mach-exynosThomas Abraham2015-08-17-1/+0
| | | | | | | | | | | | | | Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow reuse of existing code for ARMv8 based Exynos platforms. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditionsJan Kiszka2015-05-13-1/+1
| | | | | | | | | | | | | | CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to be taken into account additionally. CONFIG_ARMV7_PSCI is only set on boards that support CONFIG_ARMV7_NONSEC, and it only works on those. CC: Tang Yuantian <Yuantian.Tang@freescale.com> CC: York Sun <yorksun@freescale.com> CC: Steve Rae <srae@broadcom.com> CC: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Tested-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: socfpga: abolish CONFIG_SOCFPGAMasahiro Yamada2015-05-07-1/+1
| | | | | | Replace CONFIG_SOCFPGA with CONFIG_ARCH_SOCFPGA. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: socfpga: move SoC sources to mach-socfpgaMasahiro Yamada2015-05-07-1/+0
| | | | | | Our recent trend is to collect SoC files into arch/arm/mach-(SOC). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* arm: armada-xp: Move SoC sources to mach-mvebuStefan Roese2015-05-05-1/+0
| | | | | | | | | | | | | | Move arch/arm/cpu/armv7armada-xp/* -> arch/arm/mach-mvebu/* Since this platform will be extended to support other Marvell SoC's as well, lets rename it directly to mvebu. This will be used by the upcoming Armada 38x suport (A38x). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-29-1/+0
|\
| * ARM: zynq: move SoC sources to mach-zynqMasahiro Yamada2015-04-29-1/+0
| | | | | | | | | | | | | | Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/* Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | arm: socfpga: spl: Use common lowlevel_initDinh Nguyen2015-04-21-1/+1
|/ | | | | | | For SoCFGPA, use the common ARMv7 lowlevel_init. Thus, we can delete the SoCFPGA lowlevel_init.S file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ARM: bcm283x: merge BCM2835/BCM2836 directories into mach-bcm283xMasahiro Yamada2015-03-28-1/+0
| | | | | | | | | | BCM2835 (used on Raspberry Pi) and BCM2836 (used on Raspberry Pi 2) are similar enough. One of the biggest differences is the ARM processor. It is reasonable to collect the source files into a single place, arch/arm/mach-bcm283x/. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: Introduce erratum workaround for 798870Nishanth Menon2015-03-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Add workaround for Cortex-A15 ARM erratum 798870 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." Implementations for SoC families such as Exynos, OMAP5/DRA7 etc will be widely different. Every SoC has slightly different manner of setting up access to L2ACLR and similar registers since the Secure Monitor handling of Secure Monitor Call(smc) is diverse. Hence an weak function is introduced which may be overriden to implement SoC specific accessor implementation. Based on ARM errata Document revision 18.0 (22 Nov 2013) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: UniPhier: move SoC sources to mach-uniphierMasahiro Yamada2015-03-01-1/+0
| | | | | | | Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* bcm2836 SoC support (used in Raspberry Pi 2 model B)Stephen Warren2015-02-21-0/+1
| | | | | | | | | | | | The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: keystone: move SoC sources to mach-keystoneMasahiro Yamada2015-02-21-1/+0
| | | | | | | | Move arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* ARM: highbank: move SoC sources to mach-highbankMasahiro Yamada2015-02-21-1/+0
| | | | | | | | Move arch/arm/cpu/armv7/highbank/* -> arch/arm/mach-highbank/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Rob Herring <robh@kernel.org>
* ARM: tegra: collect SoC sources into mach-tegraMasahiro Yamada2015-02-21-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | This commit moves files as follows: arch/arm/cpu/arm720t/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/arm720t/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/arm720t/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/arm720t/tegra124* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/arm720t/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/armv7/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/armv7/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/armv7/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/armv7/tegra124/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/armv7/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/tegra20-common/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/tegra30-common/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/tegra114-common/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/tegra124-common/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/tegra-common/* -> arch/arm/mach-tegra/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> [ on nyan-big ] Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* ARM: at91: collect SoC sources into mach-at91Masahiro Yamada2015-02-21-1/+0
| | | | | | | | | | | | This commit moves source files as follows: arch/arm/cpu/arm920t/at91/* -> arch/arm/mach-at91/arm920t/* arch/arm/cpu/arm926ejs/at91/* -> arch/arm/mach-at91/arm926ejs/* arch/arm/cpu/armv7/at91/* -> arch/arm/mach-at91/armv7/* arch/arm/cpu/at91-common/* -> arch/arm/mach-at91/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
* stv0991: Add basic stv0991 architecture supportVikas Manocha2014-12-09-0/+1
| | | | | | | | | | | stv0991 architecture support added. It contains the support for following blocks - Timer - uart Signed-off-by: Vikas Manocha <vikas.manocha@st.com> [trini: Add arch/arm/cpu/armv7/Makefile hunk] Signed-off-by: Tom Rini <trini@ti.com>
* tegra: do not descend into empty directoriesMasahiro Yamada2014-11-23-3/+0
| | | | | | | | | | Some tegra makefiles only contain a dummy line to generate a built-in.o. Let's do not descend into such directories. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* kbuild: use SoC-specific CONFIG to descend into SoC directoryMasahiro Yamada2014-11-23-1/+27
| | | | | | Use "obj-$(CONFIG_FOO) += foo/" where it is possible. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kbuild: Descend into SOC directory from CPU directoryMasahiro Yamada2014-11-23-0/+2
| | | | | | | | | Some CPUs of some architectures have SOC directories. At present, the build system directly descends into SOC directories from the top Makefile, but it should generally descend into each directory from its parent directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* arm: iproc: Initial commit of iproc architecture codeScott Branden2014-08-30-0/+1
| | | | | | | | The iproc architecture code is present in several Broadcom chip architectures, including Cygnus and NSP. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* ARM: HYP/non-sec/PSCI: emit DT nodesMarc Zyngier2014-07-28-0/+1
| | | | | | | | | | | Generate the PSCI node in the device tree. Also add a reserve section for the "secure" code that lives in in normal RAM, so that the kernel knows it'd better not trip on it. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* ARM: HYP/non-sec: add generic ARMv7 PSCI codeMarc Zyngier2014-07-28-0/+4
| | | | | | | | | Implement core support for PSCI. As this is generic code, it doesn't implement anything really useful (all the functions are returning Not Implemented). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: add sun7i cpu, board and start of day supportIan Campbell2014-05-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds generic board, start of day and basic build system support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Adam Sampson <ats@offog.org> Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luc Verhaegen <libv@skynet.be> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Patrick Wood <patrickhwood@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
* arm: add support for arch timerVitaly Andrianov2014-04-17-0/+1
| | | | | | | | This patch add basic support for the architecture timer found on recent ARMv7 based SoCs. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
* arch: kona: Initial commit of kona-common architecture codeDarwin Rambo2014-02-22-0/+1
| | | | | | | | | The Kona architecture is present on a number of Broadcom mobile SoCs including the bcm281xx family of chips. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
* arm: atmel: sama5d3: spl boot from fat fs SD cardBo Shen2013-12-01-1/+1
| | | | | | | | Enable Atmel sama5d3xek boart spl boot support, which can load u-boot from SD card with FAT file system. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: s5pc, exynos: move Samsung ARM SoC specific code under arch/arm/Masahiro Yamada2013-10-31-0/+4
| | | | | | | | | This patch moves S5PC, EXYNOS specific directory entries from the toplevel Makefile to arch/arm/cpu/armv7/Makefile using Kbuild descending feature. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
* ARM: omap: move OMAP specific code under arch/arm/Masahiro Yamada2013-10-31-0/+3
| | | | | | | | | This patch moves OMAP specific directory entries from the toplevel Makefile and spl/Makefile to arch/arm/cpu/armv7/Makefile using Kbuild descending feature. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* ARM: tegra: move Tegra specific code under arch/arm/Masahiro Yamada2013-10-31-0/+2
| | | | | | | | | This patch moves Tegra specific directory entries from the toplevel Makefile and spl/Makefile to arch/arm/cpu/*/Makefile using Kbuild descending feature. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <TWarren@nvidia.com>
* armv7: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-29/+7
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* ARM: extend non-secure switch to also go into HYP modeAndre Przywara2013-10-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | For the KVM and XEN hypervisors to be usable, we need to enter the kernel in HYP mode. Now that we already are in non-secure state, HYP mode switching is within short reach. While doing the non-secure switch, we have to enable the HVC instruction and setup the HYP mode HVBAR (while still secure). The actual switch is done by dropping back from a HYP mode handler without actually leaving HYP mode, so we introduce a new handler routine in our new secure exception vector table. In the assembly switching routine we save and restore the banked LR and SP registers around the hypercall to do the actual HYP mode switch. The C routine first checks whether we are in HYP mode already and also whether the virtualization extensions are available. It also checks whether the HYP mode switch was finally successful. The bootm command part only calls the new function after the non-secure switch. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* ARM: add C function to switch to non-secure stateAndre Przywara2013-10-03-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The core specific part of the work is done in the assembly routine in nonsec_virt.S, introduced with the previous patch, but for the full glory we need to setup the GIC distributor interface once for the whole system, which is done in C here. The routine is placed in arch/arm/cpu/armv7 to allow easy access from other ARMv7 boards. We check the availability of the security extensions first. Since we need a safe way to access the GIC, we use the PERIPHBASE registers on Cortex-A15 and A7 CPUs and do some sanity checks. Boards not implementing the CBAR can override this value via a configuration file variable. Then we actually do the GIC enablement: a) enable the GIC distributor, both for non-secure and secure state (GICD_CTLR[1:0] = 11b) b) allow all interrupts to be handled from non-secure state (GICD_IGROUPRn = 0xFFFFFFFF) The core specific GIC setup is then done in the assembly routine. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* ARM: add secure monitor handler to switch to non-secure stateAndre Przywara2013-10-03-0/+4
| | | | | | | | | | | | | | A prerequisite for using virtualization is to be in HYP mode, which requires the CPU to be in non-secure state first. Add a new file in arch/arm/cpu/armv7 to hold a monitor handler routine which switches the CPU to non-secure state by setting the NS and associated bits. According to the ARM architecture reference manual this should not be done in SVC mode, so we have to setup a SMC handler for this. We create a new vector table to avoid interference with other boards. The MVBAR register will be programmed later just before the smc call. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* Prepare for TI816X : reuse existing code from TI814XTENART Antoine2013-08-15-1/+1
| | | | | | | | Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: AM43xx: Add build supportLokesh Vutla2013-08-15-1/+1
| | | | | | Add AM43xx support in the required places Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* ti814x_evm: add ti814x evm board supportMatt Porter2013-03-24-1/+1
| | | | | | | | | | Add TI814X EVM board directory, config file, and MAINTAINERS entry. Enable build. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com> [trini: Adapt to recent omap_hsmmc requirements, Matt re-tested] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: mx6: use common CPU errata config optionsStephen Warren2013-03-07-1/+1
| | | | | | | | | | Now that U-Boot has common CONFIG_ options to work around some ARM CPU errata, enable the relevant options on MX6, and remove the custom lowlevel_init.S, since it's just duplicated code now. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* Tegra30: Add generic Tegra30 build supportTom Warren2013-01-16-1/+1
| | | | | | | | This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* tegra20: enable SPL for tegra20 boardsAllen Martin2012-09-01-1/+1
| | | | | | | | | | | Add SPL options to tegra20 config files and enable SPL build for tegra20 boards. Also remove redundant code from u-boot that is not contained in SPL. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* omap4/5/am33xx: Make lowlevel_init available to all armv7 platformsTom Rini2012-09-01-1/+5
| | | | | | | | | | | | | | Make the lowlevel_init function that these platforms have which just sets up the stack and calls a C function available to all armv7 platforms. As part of this we change some of the macros that are used to be more clear. Previously (except for am335x evm) we had been setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are equivalent to simply referencing NON_SECURE_SRAM_END. On am335x evm we should have been doing this initially and do now. Cc: Sricharan R <r.sricharan@ti.com> Tested-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Rini <trini@ti.com>
* Add cache functions to SPL for armv7Stefano Babic2012-03-27-2/+0
| | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <tom.rini@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Simon Schwarz <simonschwarzcor@gmail.com>
generated by cgit v1.1 at 2024-11-12 22:29:09 +0000