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* Remove arch/${ARCH}/include/asm/errno.hMasahiro Yamada2016-09-23-1/+0
| | | | | | | | | | | | | | Unlike Linux, nothing about errno.h is arch-specific in U-Boot. As you see, all of arch/${ARCH}/include/asm/errno.h is just a wrapper of <asm-generic/errno.h>. Actually, U-Boot does not export headers to user-space, so we just have to care about the consistency in the U-Boot tree. Now all of include directives for <asm/errno.h> are gone. Deprecate <asm/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: No need in sections defined in sources with newer toolsAlexey Brodkin2016-08-05-2/+0
| | | | | | | | Starting from arc-2016.03 GNU tools linker properly works with symbols defined in linker script and so external declarations are no longer required, dump them. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: make global_data.h usable in assembly filesAlexey Brodkin2016-07-04-0/+2
| | | | | | | | | | | | | | | | Currently on attempt to use global_data.h in an assembly file following will happen: -------------------->8----------------- ./arch/arc/include/asm/global_data.h: Assembler messages: ./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{' ./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}' scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed -------------------->8----------------- In this change we disable struct arch_global_data in ASM which fixes the issue above. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: Update data accessors with use of memory barriersAlexey Brodkin2016-06-13-16/+79
| | | | | | | | | | | | | Memory barriers are proven to be a requirement for both compiler and real hardware to properly serialize access to critical data. For example if CPU or data bus it uses may do reordering of data accesses absence of memory barriers might easily lead to very subtle and hard to debug data corruptions. This implementation was heavily borrowed from up to date Linux kernel. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: Add virt_to_phys() stubAlexey Brodkin2016-04-11-0/+5
| | | | | | | | | | | | | | | | Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping" introduced usage of virt_to_phys() in ehci-hcd. Since there was no implementation of virt_to_phys() for ARC compilation of the ehci-generic driver failed. This change adds virt_to_phys() stub for ARC so now USB driver for AXS101 board could be built again. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com> Acked-by: Marek Vasut <marex@denx.de>
* arc: get rid of running_on_hwAlexey Brodkin2016-04-11-1/+0
| | | | | | | | ISS is obsolete now and nSIM is used for simulation instead. In its turn nSIM properly handles baud-rate settings so get rid of now useless check. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: cache - utilize IO coherency (AKA IOC) engineAlexey Brodkin2016-02-20-0/+7
| | | | | | | | | | | With release of ARC HS38 v2.1 new IO coherency engine could be built-in ARC core. This hardware module ensures coherency between DMA-ed data from peripherals and L2 cache. With L2 and IOC enabled there's no overhead for L2 cache manual maintenance which results in significantly improved IO bandwidth. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: cache - accommodate different L1 cache line lengthsAlexey Brodkin2016-02-20-7/+7
| | | | | | | | | | | | | | | | | ARC core could be configured with different L1 and L2 (AKA SLC) cache line lengths. At least these values are possible and were really used: 32, 64 or 128 bytes. Current implementation requires cache line to be selected upon U-Boot configuration and then it will only work on matching hardware. Indeed this is quite efficient because cache line length gets hardcoded during code compilation. But OTOH it makes binary less portable. With this commit we allow U-Boot to determine real L1 cache line length early in runtime and use this value later on. This extends portability of U-Boot binary a lot. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: add empty asm/processor.h to satisfy compilation of USB codeAlexey Brodkin2015-11-18-0/+12
| | | | | | | common/usb.c unconditionally includes <asm/processor.h> And now to allow USB support on ARC boards we have to have that header. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: add stubs for map_physmem() and unmap_physmem()Alexey Brodkin2015-11-18-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Up until now there was no need in those stubs. But since following commit compilation of U-Boot on ARC is broken: ------------------------>8---------------------- commit 7861204c9af7fec1ea9b41541c272516235a6c93 Author: Stephen Warren <swarren@wwwdotorg.org> Date: Sat Oct 3 13:56:46 2015 -0600 itest: make memory access work under sandbox itest accesses memory, and hence must map/unmap it. Without doing so, it accesses invalid addresses and crashes. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> ------------------------>8---------------------- That's because CMD_ITEST is enabled by default in common/Kconfig and now map_physmem()/unmap_physmem() is used there. So this patch adds missing stubs for ARC. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
* arc: Use the generic bitops headersFabio Estevam2015-11-05-0/+5
| | | | | | | The generic bitops headers are required when calling logarithmic functions, such as ilog2(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* arc: significant cache reworkAlexey Brodkin2015-07-01-7/+5
| | | | | | | | | | | | | | | | | | [1] Align cache management functions to those in Linux kernel. I.e.: a) Use the same functions for all cache ops (D$ Inv/Flush) b) Split cache ops in 3 sub-functions: "before", "lineloop" and "after". That way we may re-use "before" and "after" functions for region and full cache ops. [2] Implement full-functional L2 (SLC) management. Before SLC was simply disabled early on boot. It's also possible to enable or disable L2 cache from config utility. [3] Disable/enable corresponding caches early on boot. So if U-Boot is configured to use caches they will be used at all times (this is useful in partucular for speed-up of relocation). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: add support for SLC (System Level Cache, AKA L2-cache)Alexey Brodkin2015-04-03-0/+15
| | | | | | | | | | | | | | ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache). This change adds functions required for controlling SLC: * slc_enable/disable * slc_flush/invalidate For now we just disable SLC to escape DMA coherency issues until either: * SLC flush/invalidate is supported in DMA APIin U-Boot * hardware DMA coherency is implemented (that might be board specific so probably we'll need to have a separate Kconfig option for controlling SLC explicitly) Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: get rid of CONFIG_SYS_GENERIC_GLOBAL_DATAAlexey Brodkin2015-04-03-1/+0
| | | | | | | | | | As discussed on mailing list we're drifting away from CONFIG_SYS_GENERIC_GLOBAL_DATA in favour to use of board_init_f_mem() for global data. So do this for ARC architecture. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: clean-up init procedureAlexey Brodkin2015-04-03-0/+31
| | | | | | | | | | | | | | | | Intention behind this work was elimination of as much assembly-written code as it is possible. In case of ARC we already have relocation fix-up implemented in C so why don't we use C for U-Boot copying, .bss zeroing etc. It turned out x86 uses pretty similar approach so we re-used parts of code in "board_f.c" initially implemented for x86. Now assembly usage during init is limited to stack- and frame-pointer setup before and after relocation. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org>
* generic-board: select SYS_GENERIC_BOARD for some architecturesMasahiro Yamada2015-03-28-1/+0
| | | | | | | | | | | | We have done with the generic board conversion for all the boards of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86. Let's select SYS_GENERIC_BOARD for those architectures, so we can tell which architecture has finished the conversion at a glance. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
* use ASM_NL instead of '; ' for assembler new line character in the macroChen Gang2015-03-05-0/+12
| | | | | | | | | | | | | | | | | For some assemblers, they use another character as newline in a macro (e.g. arc uses '`'), so for generic assembly code, need use ASM_NL (a macro) instead of ';' for it. Basically this is the same patch as applied to Linux kernel - http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/include/linux/linkage.h?id=9df62f054406992ce41ec4558fca6a0fa56fffeb but modified a bit to fit in U-Boot. Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com>
* arc: introduce U-Boot port for ARCv2 ISAAlexey Brodkin2015-02-13-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary incompatible with ISAv1 (AKA ARCompact). Significant difference between ISAv2 and v1 is implementation of interrupt vector table. In v1 it is implemented in the same way as on many other architectures - as a special location where user may put whether code executed in place (if machine word of space is enough) or jump to a full-scale interrupt handler. In v2 interrupt table is just an array of adresses of real interrupt handlers. That requires a separate section for IVT that is not encoded as code by assembler. This change adds support for following cores: * ARC EM6 (simple 32-bit microcontroller without MMU) * ARC HS36 (advanced 32-bit microcontroller without MMU) * ARC HS38 (advanced 32-bit microcontroller with MMU) As a part of ARC HS38 new version of MMU (v4) was introduced. Also this change adds AXS131 board which is the same DW ARC SDP base board but with ARC HS38 CPU tile. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.hAlexey Brodkin2015-02-09-0/+1
| | | | | | | Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards so there's no sense in separate per-board definitions. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.hAlexey Brodkin2015-02-09-0/+1
| | | | | | | | | There're no other options for ARC except "generic board" so ther's no point to define CONFIG_SYS_GENERIC_BOARD per board. We now have it set fo all ARC boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: select cache settings via menuconfigAlexey Brodkin2015-02-09-8/+5
| | | | | | | | | | | This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: define and use PTAG AUX regs for MMUv3 onlyAlexey Brodkin2015-02-09-2/+2
| | | | | | DC_PTAG and IC_PTAG registers only exist in MMUv3. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: add more flavours of ARC700 series CPUAlexey Brodkin2015-02-09-0/+8
| | | | | | | | | | | | | | | | Now we may select a particular version of ARC700: * ARC750D or * ARC770D It allows more flexible (or more fine tuned) configuration of U-Boot. Before that change we relied on minimal configuration but now we may use specific features of each CPU. Moreover allows us to escape manual selection of options that exist in both CPUs but may have say different version like MMUv2 in ARC750D vs MMUv3 in ARC770D. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: relocate - minor refactoring and clean-upAlexey Brodkin2015-01-15-0/+1
| | | | | | | | | | * use better symbols for relocatable region boundaries ("__image_copy_start" instead of "CONFIG_SYS_TEXT_BASE") * remove useless debug messages because they will only show up in case of both problem (when normal "if" branch won't be taken) and DEBUG take place which is pretty rare situation. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* arc: introduce separate section for interrupt vector tableIgor Guryanov2015-01-15-0/+2
| | | | | | | | | | | | | | | | | | Even though existing implementation works fine in preparation to submission of ARCv2 architecture we need this change. In case of ARCv2 interrupt vector table consists of just addresses of corresponding handlers. And if those addresses will be in .text section then assembler will encode them as everything in .text section as middle-endian and then on real execution CPU will read swapped addresses and will jump into the wild. Once introduced new section is situated so .text section remains the first which allows us to use common linker option for linking everything to a specified CONFIG_SYS_TEXT_BASE. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
* arc: check caches existence before useIgor Guryanov2015-01-15-0/+2
| | | | | | | | | | | | | | | | | | | | Some cache operations ({i|d}cache_{enable|disable|status} or flush_dcache_all) are built and used even if CONFIG_SYS_{I|D}CACHE_OFF is set. This is required for force disable of caches on early boot. What if something was executed before U-boot and enabled caches (low-level bootloaders, previously run kernel etc.)? But if CPU doesn't really have caches any attempt to access cache-related AUX registers triggers instruction error exception. So for convenience we'll try to avoid exceptions by checking if CPU actually has caches (we check separately data and instruction cache existence) at all. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
* arc: Fix printf size_t format related warnings (again...)Vasili Galka2014-08-26-0/+4
| | | | | | | | | | | The basic idea: Define size_t using the __SIZE_TYPE__ compiler-defined type. For detailed explanation see similar patch for the nios2 arch: http://patchwork.ozlabs.org/patch/379938/ Signed-off-by: Vasili Galka <vvv444@gmail.com> Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
* ARC: enable CONFIG_SYS_BOOT_RAMDISK_HIGHAlexey Brodkin2014-06-03-0/+1
| | | | | | | This enables relocation of initrd to the end of available DDR before Linux kernel start-up as it is done in other architectures. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* common/board_f: Initialized global data for generic boardYork Sun2014-05-12-0/+2
| | | | | | | | | | | | | Some platforms (tested on mpc85xx, mpc86xx) use global data before calling function baord_inti_f(). The data should not be cleared later. Any arch which uses global data in generic board board_init_f() should define CONFIG_SYS_GENERIC_GLOBAL_DATA. Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com> CC: Simon Glass <sjg@chromium.org> CC: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
* arc: remove "hardware.h"Alexey Brodkin2014-02-20-10/+0
| | | | | | | | | | | | | | This file was only required for compilation of designware_i2c driver. Since explicit inclusion of "hardware.h" is now removed from the driver we may safely remove this empty header as well. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Armando Visconti <armando.visconti@st.com>
* arc: add architecture header filesAlexey Brodkin2014-02-07-0/+593
These are header files used by ARC700 architecture. Also note that "arch-arc700/hardware.h" is only required for compilation of "designware_i2c" driver which refers to "asm/arch/hardware.h". It would be good to fix mentioned driver sometime soon but it will cause changes in ARM board configs that use "designware_i2c". Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Francois Bedard <fbedard@synopsys.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
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