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* fixing typo error in README file. CPU15 -> CP15yeongjun Kim2016-07-22-1/+1
| | | | | | | It looks typo error. Not CPU15, CP15(CoProcessor15) Signed-off-by: yeongjun Kim <iam.yeongjunkim@gmail.com>
* spl: Lightweight UBI and UBI fastmap supportThomas Gleixner2016-07-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting a payload out of NAND FLASH from the SPL is a crux today, as it requires hard partioned FLASH. Not a brilliant idea with the reliability of todays NAND FLASH chips. The upstream UBI + UBI fastmap implementation which is about to brought to u-boot is too heavy weight for SPLs as it provides way more functionality than needed for a SPL and does not even fit into the restricted SPL areas which are loaded from the SoC boot ROM. So this provides a fast and lightweight implementation of UBI scanning and UBI fastmap attach. The scan and logical to physical block mapping code is developed from scratch, while the fastmap implementation is lifted from the linux kernel source and stripped down to fit the SPL needs. The text foot print on the board which I used for development is: 6854 0 0 6854 1abd drivers/mtd/ubispl/built-in.o Attaching a NAND chip with 4096 physical eraseblocks (4 blocks are reserved for the SPL) takes: In full scan mode: 1172ms In fastmap mode: 95ms The code requires quite some storage. The largest and unknown part of it is the number of fastmap blocks to read. Therefor the data structure is not put into the BSS. The code requires a pointer to free memory handed in which is initialized by the UBI attach code itself. See doc/README.ubispl for further information on how to use it. This shares the ubi-media.h and crc32 implementation of drivers/mtd/ubi There is no way to share the fastmap code, as UBISPL only utilizes the slightly modified functions ubi_attach_fastmap() and ubi_scan_fastmap() from the original kernel ubi fastmap implementation. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-07-19-1/+2
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
| * armv8: Move secure_ram variable out of generic global dataYork Sun2016-07-15-1/+2
| | | | | | | | | | | | | | Secure_ram variable was put in generic global data. But only ARMv8 uses this variable. Move it to ARM specific data structure. Signed-off-by: York Sun <york.sun@nxp.com>
* | Various, unrelated tree-wide typo fixes.Robert P. J. Day2016-07-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | README: Remove CONFIG_SYS_MALLOC_F_LEN commentSimon Glass2016-07-14-3/+0
|/ | | | | | | This option is now widely available, so remove the comment that it is only available on ARM and sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* doc: bootdelay: drop explanation about CONFIG_BOOTDELAY from READMEMasahiro Yamada2016-07-01-17/+0
| | | | | | | | | The same information now exists in common/Kconfig. Do not duplicate documentation from the point of view of maintainability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* arm: Allow skipping of low-level init with I-cache onSimon Glass2016-06-12-0/+5
| | | | | | | | | | | | | | | | At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling lowlevel_init(). This means that the instruction cache is not enabled and the board runs very slowly. What is really needed in many cases is to skip the call to lowlevel_init() but still perform CP15 init. Add an option to handle this. Reviewed-by: Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* Remove/update old generic-board documentation and warningSimon Glass2016-05-27-10/+0
| | | | | | | | Remove the warning from the Makefile, since boards that do not use generic board will no longer build. Also update documentation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* cmd: eeprom: add support for layout aware commandsNikita Kiryanov2016-05-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the (optional) eeprom print and eeprom update commands. These commands are eeprom layout aware: * The eeprom print command prints the contents of the eeprom in a human readable way (eeprom layout fields, and data formatted to be fit for human consumption). * The eeprom update command allows user to update eeprom fields by specifying the field name, and providing the new data in a human readable format (same format as displayed by the eeprom print command). * Both commands can either auto detect the layout, or be told which layout to use. New CONFIG options: CONFIG_CMD_EEPROM_LAYOUT - enables commands. CONFIG_EEPROM_LAYOUT_HELP_STRING - tells user what layout names are supported Feature API: __weak int parse_layout_version(char *str) - override to provide your own layout name parsing __weak void __eeprom_layout_assign(struct eeprom_layout *layout, int layout_version); - override to setup the layout metadata based on the version __weak int eeprom_layout_detect(unsigned char *data) - override to provide your own algorithm for detecting layout version eeprom_field.c - contains various printing and updating functions for common types of eeprom fields. Can be used for defining custom layouts. Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-05-17-2/+2
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| * dm: scsi: Rename CONFIG_CMD_SCSI to CONFIG_SCSISimon Glass2016-05-17-2/+2
| | | | | | | | | | | | | | | | This option currently enables both the command and the SCSI functionality. Rename the existing option to CONFIG_SCSI since most of the code relates to the feature. Signed-off-by: Simon Glass <sjg@chromium.org>
* | SPL: Add CONFIG_SPL_ABORT_ON_RAW_IMAGEMarek Vasut2016-05-17-0/+4
|/ | | | | | | | | | | | | When defined, SPL will proceed to another boot method if the image it has loaded does not have a signature. This is useful if the subsequent boot methods are much more complex. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <van.freenix@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com>
* README: Specify the full path for README.videoFabio Estevam2016-04-11-1/+1
| | | | | | | It is clearer to specify the full path to access the doc/README.video file. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* README: Specify the full path for README.displaying-bmpsFabio Estevam2016-04-01-1/+1
| | | | | | | It is clearer to specify the full path to access the doc/README.displaying-bmps file. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* Add an option to enable the command lineSimon Glass2016-03-22-0/+8
| | | | | | | | Add a new Kconfig option for the command line. This is enabled by default, but when disabled it will remove the command line. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Kconfig: Move CONFIG_FIT and related options to KconfigSimon Glass2016-03-14-36/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this. Move these options to Kconfig and tidy up board configuration: CONFIG_FIT CONFIG_OF_BOARD_SETUP CONFIG_OF_SYSTEM_SETUP CONFIG_FIT_SIGNATURE CONFIG_FIT_BEST_MATCH CONFIG_FIT_VERBOSE CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_RSA Unfortunately the first one is a little complicated. We need to make sure this option is not enabled in SPL by this change. Also this option is enabled automatically in the host builds by defining CONFIG_FIT in the image.h file. To solve this, add a new IMAGE_USE_FIT #define which can be used in files that are built on the host but must also build for U-Boot and SPL. Note: Masahiro's moveconfig.py script is amazing. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add microblaze change, various configs/ re-applies] Signed-off-by: Tom Rini <trini@konsulko.com>
* net: bootp: Add environment variable for timeout periodAlexandre Messier2016-02-26-0/+6
| | | | | | | | | | | | | | | There is currently one config option (CONFIG_NET_RETRY_COUNT) that is available to tune the retries of the network stack. Unfortunately, it is global to all protocols, and the value is interpreted differently in all of them. Add a new environment variable that directly sets the retry period for BOOTP timeouts. If this new value is not set, the period is still derived from the default number of retries, or from CONFIG_NET_RETRY_COUNT if defined. When both the new variable is set and CONFIG_NET_RETRY_COUNT is defined, the variable has precedence. Signed-off-by: Alexandre Messier <amessier@tycoint.com>
* doc: Remove any reference to CONFIG_MODEM_SUPPORT, CONFIG_CMD_HWFLOW, ↵David Müller (ELSOFT AG)2016-02-08-28/+0
| | | | | | CONFIG_HWFLOW and friends from the documentation. Signed-off-by: David Müller <d.mueller@elsoft.ch>
* hush: Add rudimentary support for PS1 and PS2Marek Vasut2016-02-08-0/+8
| | | | | | | | | | Add trivial support for changing the U-Boot command prompt string by setting PS1 and PS2 environment variables. Only static variables are supported. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Use correct spelling of "U-Boot"Bin Meng2016-02-06-2/+2
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* tpm: st33zp24: Add tpm st33zp24 spi supportChristophe Ricard2016-01-28-0/+4
| | | | | | | | | | | | Add support for TPM ST33ZP24 spi. The ST33ZP24 does have a spi interface. The transport protocol is proprietary. For spi we are relying only on DM_SPI. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
* tpm: st33zp24: Add tpm st33zp24 support with i2cChristophe Ricard2016-01-28-0/+7
| | | | | | | | | Add support for TPM ST33ZP24 family with i2c. For i2c we are relying only on DM_I2C. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
* common/console.c: Remove unused inline functionsTom Rini2016-01-25-6/+0
| | | | | | | | clang-3.8 reports that these functions are unused, remove them. As this is the last part of CONFIG_MODEM_SUPPORT_DEBUG, drop that from README. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* vsprintf.c: Always enable CONFIG_SYS_VSNPRINTFTom Rini2016-01-19-9/+0
| | | | | | | | | | | | | | Enabling this function always removes some class of string saftey issues. The size change here in general is about 400 bytes and this seems a reasonable trade-off. Cc: Peng Fan <peng.fan@nxp.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* README: Review the u-boot porting guide listPhil Sutter2016-01-14-7/+4
| | | | | | | | | | | * There is no boards.cfg anymore, so drop (1). * Creating flash.c and u-boot.lds seems not mandatory as well. * Adjusting the enumerators for the above implicitly fixed for double items numbered (3). Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* doc: Tidy up first part of top-level README fileRobert P. J. Day2016-01-08-85/+43
| | | | | | | | | | | | First (small) pass at tidying up the README file, including: * remove references to obsolete CREDITS file * remove (some) references to obsolete boards.cfg file * remove at least one reference to a "scrapped" board * cut down unnecessarily detailed directory hierarchy * bunch of grammar and spelling tweaks Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* armv8: fsl-layerscale: Rewrite reserving memory for MC and debug serverYork Sun2015-12-15-2/+2
| | | | | | | | | | | MC and debug server are not board-specific. Move reserving memory to SoC file, using the new board_reserve_ram_top function. Reduce debug server memory by 2MB to make room for secure memory. In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation. Signed-off-by: York Sun <yorksun@freescale.com>
* common: Rewrite hiding the end of memoryYork Sun2015-12-15-1/+1
| | | | | | | | | | | As the name may be confusing, the CONFIG_SYS_MEM_TOP_HIDE reserves some memory from the end of ram, tracked by gd->ram_size. It is not always the top of u-boot visible memory. Rewrite the macro with a weak function to provide flexibility for complex calcuation. Legacy use of this macro is still supported. Signed-off-by: York Sun <yorksun@freescale.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Reserve secure memoryYork Sun2015-12-15-0/+8
| | | | | | | | | | | | | | | Secure memory is at the end of memory, separated and reserved from OS, tracked by gd->secure_ram. Secure memory can host MMU tables, security monitor, etc. This is different from PRAM used to reserve private memory. PRAM offers memory at the top of u-boot memory, not necessarily the real end of memory for systems with very large DDR. Using the end of memory simplifies MMU setup and avoid memory fragmentation. "bdinfo" command shows gd->secure_ram value if this memory is marked as secured. Signed-off-by: York Sun <yorksun@freescale.com>
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-0/+3
| | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
* eeprom: Zap CONFIG_SPI_XMarek Vasut2015-11-21-5/+0
| | | | | | | | | | This macro is no longer used, so just reap it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* video: input: Clean up after i8042 conversionSimon Glass2015-11-19-17/+12
| | | | | | | | | Now that i8042 uses driver model, adjust other mentions of it and remove old code that is no-longer used. Update the README and unify the keyboard text into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Drop CONFIG_ISA_KEYBOARDSimon Glass2015-11-19-5/+0
| | | | | | | This option is mentioned but does not do anything. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* video: Drop unused console functionsSimon Glass2015-11-19-7/+0
| | | | | | | | | | | | | | | | | | CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and CONFIG_CONSOLE_TIME are not used by any board. The implementation is not great and stands in the way of a refactor of i8042. Drop these for now. They can be re-introduced quite easily later, perhaps with driver-model real-time-clock (RTC) support. When reintroducing, it might be useful to make a few changes: - Blink time would be more useful than blink count - The confusing #ifdefs should be avoided - The time functions should support driver model - It would be best keyed off console_tstc() or some similar idle loop rather than a particular input driver (i8042 in this case) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: cros_ec: Convert cros_ec keyboard driver to driver modelSimon Glass2015-11-19-5/+0
| | | | | | | | Adjust the cros_ec keyboard driver to support driver model. Make this the default for all Exynos boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* board_init: Change the logic to setup malloc_baseFabio Estevam2015-11-12-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic global_data setup") we used to have assembly code that configured the malloc_base address. Since this commit we use the board_init_f_mem() function in C to setup malloc_base address. In board_init_f_mem() there was a deliberate choice to support only early malloc() or full malloc() in SPL, but not both. Adapt this logic to allow both to be used, one after the other, in SPL. This issue has been observed in a Congatec board, where we need to retrieve the manufacturing information from the SPI NOR (the SPI API calls malloc) prior to configuring the DRAM. In this case as malloc_base was not configured we always see malloc to fail. With this change we are able to use malloc in SPL prior to DRAM gets initialized. Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* i2c: ihs_i2c: Dual channel supportDirk Eibach2015-11-12-0/+9
| | | | | | | Support two i2c masters per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-10-29-2/+10
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| * net: TFTP: variables cleanup and additionAlbert ARIBAUD \(3ADEV\)2015-10-28-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TFTP source and destination port variable names are 'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport' and 'tftpdstport' in the README file. Fix the README. Add environment variable 'tftptimeoutcountmax'. As per the comments about the global variable tftp_timeout_count_max, make sure tftptimeoutcountmax is nonnegative. Introduce configuration option CONFIG_NET_TFTP_VARS, which controls whether environment variables tftpblocksize, tftptimeout, and tftptimoueoutcountmax are read by the TFTP client code. CONFIG_NET_TFTP_VARS defaults to y but can be set to n by targets with to tight size contraints. Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the target size below limit.
* | Merge git://git.denx.de/u-boot-dmTom Rini2015-10-27-2/+2
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| * | dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineonChristophe Ricard2015-10-23-2/+2
| |/ | | | | | | | | | | | | | | | | | | As there is no TCG specification or recommendation for i2c TPM 1.2, move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel or STMicroelectronics may have a different transport protocol for i2c. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ubi,ubifs: sync with linux v4.2Heiko Schocher2015-10-26-0/+4
|/ | | | | | | | | | | | | | | | | sync with linux v4.2 commit 64291f7db5bd8150a74ad2036f1037e6a0428df2 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Aug 30 11:34:09 2015 -0700 Linux 4.2 This update is needed, as it turned out, that fastmap was in experimental/broken state in kernel v3.15, which was the last base for U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
* cmd: bootvx: Always get VxWorks bootline from envBin Meng2015-10-21-10/+2
| | | | | | | | | | | | | | | | | | | So far VxWorks bootline can be contructed from various environment variables, but when these variables do not exist we get these from corresponding config macros. This is not helpful as it requires rebuilding U-Boot, and to make sure these config macros take effect we should not have these environment variables. This is a little bit complex and confusing. Now we change the logic to always contruct the bootline from environments (the only single source), by adding two new variables "bootdev" and "othbootargs", and adding some comments about network related settings mentioning they are optional. The doc about the bootline handling is also updated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* arndale: Apply Cortex-A15 errata #773022 and #774769Ian Campbell2015-10-11-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We run 4 Arndale boards in our automated test framework, they have been running quite happily for quite some time using a Debian Wheezy userspace. However when upgrading to a Debian Jessie we started seeing frequent segmentation faults from gcc when building the kernel, to the extent that it is unable to successfully build the kernel twice in a row, and often fails on the first attempt. Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417 which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html and CPU Errata 773022 and 774769. This errata needs to be applied to all processors in an SMP system, meaning that the usual strategy of applying them in arch/arm/cpu/armv7/start.S is not appropriate (since that applies to the boot processor only). Instead we apply these errata in the secure monitor which is code that is traversed by all processors as they are brought up. The net affect on Arndale is that ACTLR changes from 0x40 to 0x2000042. I ran 17 kernel compile iterations overnight with no segfaults. Runtime testing was done on our v2014.10 based branch and forward ported (with only minimal and trivial contextual conflicts) to current master, where it has been build tested only. I suppose in theory these errata apply to any Exynos5250 based boards, but Arndale is the only one I have access to and I have therefore chosen to be conservative and only apply it there. Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list numerically sorted. Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
* I2C: mxc_i2c: make I2C1 and I2C2 optionalAlbert ARIBAUD \\(3ADEV\\)2015-10-02-2/+6
| | | | | | | | | | | | | | | | | | | The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-15-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* tpm: Drop two unused optionsSimon Glass2015-08-31-6/+0
| | | | | | | | | | | The address of the I2C TPM is now defined in the device tree so there is no need for the CONFIG options. Remove them from the README and board config to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* net: e1000: Add Kconfig optionsSimon Glass2015-08-21-3/+0
| | | | | | | Add Kconfig options in preparation for moving boards to use Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* ARM: Introduce erratum workaround for 801819Nishanth Menon2015-08-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add workaround for Cortex-A15 ARM erratum 801819 which says in summary that "A livelock can occur in the L2 cache arbitration that might prevent a snoop from completing. Under certain conditions this can cause the system to deadlock. " Recommended workaround is as follows: Do both of the following: 1) Do not use the write-back no-allocate memory type. 2) Do not issue write-back cacheable stores at any time when the cache is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it is implementation defined whether cacheable stores update the cache when the cache is disabled it is not expected that any portable code will execute cacheable stores when the cache is disabled. For implementations of Cortex-A15 configured without the “L2 arbitration register slice” option (typically one or two core systems), you must also do the following: 3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111 So, we provide an option to disable write streaming on OMAP5 and DRA7. It is a rare condition to occur and may be enabled selectively based on platform acceptance of risk. Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3] is set to 0. Note: certain unicore SoCs *might* not have REVIDR[3] not set, but might not meet the condition for the erratum to occur when they donot have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency Extensions). Such SoCs will need the work around handled in the SoC specific manner, since there is no ARM generic manner to detect such configurations. Based on ARM errata Document revision 18.0 (22 Nov 2013) Suggested-by: Richard Woodruff <r-woodruff2@ti.com> Suggested-by: Brad Griffis <bgriffis@ti.com> Reviewed-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
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