summaryrefslogtreecommitdiff
path: root/README
Commit message (Collapse)AuthorAgeLines
...
* i2c: IHS I2C master driverDirk Eibach2014-07-07-0/+15
| | | | | | | | IHS I2C master support was merely a hack in the osd driver. Now it is a proper u-boot I2C framework driver, supporting the v2.00 master features. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* README: document CONFIG_ENV_IS_IN_SPI_FLASHWu, Josh2014-07-07-0/+37
| | | | | | | | | | | The option can be used to save the environment in spi flash. Implementation code is already exist in command/env_sf.c. But the documentation is missing. This patch add the details for this option to the README file. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* README: document the CONFIG_ENV_IS_IN_FAT optionWu, Josh2014-07-07-0/+31
| | | | | | | | In README file, add document for the missing configuration option: CONFIG_ENV_IS_IN_FAT. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* armv8/fsl-lsch3: Add support to load and start MC FirmwareJ. German Rivera2014-07-03-0/+27
| | | | | | | | | | | | | | | | Adding support to load and start the Layerscape Management Complex (MC) firmware. First, the MC GCR register is set to 0 to reset all cores. MC firmware and DPL images are copied from their location in NOR flash to DDR. MC registers are updated with the location of these images. Deasserting the reset bit of MC GCR register releases core 0 to run. Core 1 will be released by MC firmware. Stop bits are not touched for this step. U-boot waits for MC until it boots up. In case of a failure, device tree is updated accordingly. The MC firmware image uses FIT format. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
* dm: Update README to encourage conversion to driver modelSimon Glass2014-06-20-0/+5
| | | | | | Add a note to encourage people to convert drivers to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add an I/O tracing featureSimon Glass2014-06-20-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When debugging drivers it is useful to see what I/O accesses were done and in what order. Even if the individual accesses are of little interest it can be useful to verify that the access pattern is consistent each time an operation is performed. In this case a checksum can be used to characterise the operation of a driver. The checksum can be compared across different runs of the operation to verify that the driver is working properly. In particular, when performing major refactoring of the driver, where the access pattern should not change, the checksum provides assurance that the refactoring work has not broken the driver. Add an I/O tracing feature and associated commands to provide this facility. It works by sneaking into the io.h heder for an architecture and redirecting I/O accesses through its tracing mechanism. For now no commands are provided to examine the trace buffer. The format is fairly simple, so 'md' is a reasonable substitute. Note: The checksum feature is only useful for I/O regions where the contents do not change outside of software control. Where this is not suitable you can fall back to manually comparing the addresses. It might be useful to enhance tracing to only checksum the accesses and not the data read/written. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-06-10-3/+0
|\
| * usb: hub: remove CONFIG_USB_HUB_MIN_POWER_ON_DELAYStephen Warren2014-06-01-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we wait the correct specification-mandated time at the end of usb_hub_power_on(), I suspect that CONFIG_USB_HUB_MIN_POWER_ON_DELAY has no purpose. For cm_t35.h, we already wait longer than the original MIN_POWER_ON_DELAY, so this change is safe. For gw_ventana.h, we will wait as long as the original MIN_POWER_ON_DELAY iff pgood_delay was at least 200ms. I'm not sure if this is the case or not, hence I've CC'd relevant people to test this change. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | bootm: make use of legacy image format configurableHeiko Schocher2014-06-05-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | make the use of legacy image format configurable through the config define CONFIG_IMAGE_FORMAT_LEGACY. When relying on signed FIT images with required signature check the legacy image format should be disabled. Therefore introduce this new define and enable legacy image format if CONFIG_FIT_SIGNATURE is not set. If CONFIG_FIT_SIGNATURE is set disable per default the legacy image format. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Lars Steubesand <lars.steubesand@philips.com> Cc: Mike Pearce <mike@kaew.be> Cc: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
* | fat: Define MAX_CLUSTSIZE using CONFIG_FS_FAT_MAX_CLUSTSIZESiva Durga Prasad Paladugu2014-06-05-0/+6
| | | | | | | | | | | | | | | | | | | | Define the MAX_CLUSTSIZE to default of 65536 only if CONFIG_FS_FAT_MAX_CLUSTSIZE is not defined. This option has been provided to save memory in some memory constrained cases. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Michal Simek <monstr@monstr.eu>
* | powerpc: mpc8260ads: remove orphan boardMasahiro Yamada2014-05-30-8/+0
|/ | | | | | | | | | | This board has been orphan for a while. (Emails to its maintainer have been bouncing.) Because MPC82xx family is old enough, nobody would pick up the maintainership on it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denx <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2014-05-23-0/+10
|\
| * eMMC: cmd_mmc.c adds the 'rpmb' sub-command for the 'mmc' commandPierre Aubert2014-05-23-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sub-command adds support for the RPMB partition of an eMMC: * mmc rpmb key <address of the authentication key> Programs the authentication key in the eMMC This key can not be overwritten. * mmc rpmb read <address> <block> <#count> [address of key] Reads <#count> blocks of 256 bytes in the RPMB partition beginning at block number <block>. If the optionnal address of the authentication key is provided, the Message Authentication Code (MAC) is verified on each block. * mmc rpmb write <address> <block> <#count> <address of key> Writes <#count> blocks of 256 bytes in the RPMB partition beginning at block number <block>. The datas are signed with the key provided. * mmc rpmb counter Returns the 'Write counter' of the RPMB partition. The sub-command is conditional on compilation flag CONFIG_SUPPORT_EMMC_RPMB Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Wolfgang Denk <wd@denx.de>
* | Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-05-22-0/+13
|\ \
| * | fpga: Add support to load partial bitstreamsMichal Simek2014-05-20-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support to load partial bitstreams. The partial bitstreams can be loaded using the below commands Commands: fpga loadp <dev> <addr> <size> fpga loadbp <dev> <addr> <size> The full bit streams can be loaded using the old commands(fpga load and fpga loadb). Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | fpga: Guard the LOADMK functionality with CMD_FPGA_LOADMKSiva Durga Prasad Paladugu2014-05-20-0/+4
| |/ | | | | | | | | | | | | | | | | Guard the LOADMK functionality with config to provide an option to enable or disable it. Enable it for all platforms in mainline which enable CONFIG_CMD_FPGA. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-05-22-0/+22
|\ \ | |/ |/|
| * usb/gadget: add the fastboot gadgetSebastian Siewior2014-05-08-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains an implementation of the fastboot protocol on the device side and documentation. This is based on USB download gadget infrastructure. The fastboot function implements the getvar, reboot, download and reboot commands. What is missing is the flash handling i.e. writting the image to media. v3 (Rob Herring): This is based on http://patchwork.ozlabs.org/patch/126798/ with the following changes: - Rebase to current mainline and updates for current gadget API - Use SPDX identifiers for licenses - Traced the history and added missing copyright to cmd_fastboot.c - Use load_addr/load_size for transfer buffer - Allow vendor strings to be optional - Set vendor/product ID from config defines - Allow Ctrl-C to exit fastboot mode v4: - Major re-write to use the USB download gadget. Consolidated function code to a single file. - Moved globals into single struct. - Use puts and putc as appropriate. - Added CONFIG_USB_FASTBOOT_BUF_ADDR and CONFIG_USB_FASTBOOT_BUF_SIZE to set the fastboot transfer buffer. v5: - Add CONFIG option documentation to README - Rebase using new downloader registration Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Rob Herring <robh@kernel.org>
* | common/board_f: Initialized global data for generic boardYork Sun2014-05-12-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms (tested on mpc85xx, mpc86xx) use global data before calling function baord_inti_f(). The data should not be cleared later. Any arch which uses global data in generic board board_init_f() should define CONFIG_SYS_GENERIC_GLOBAL_DATA. Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com> CC: Simon Glass <sjg@chromium.org> CC: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
* | serial: nsl16550: add hw flow control supportKaricheri, Muralidharan2014-05-12-0/+4
| | | | | | | | | | | | | | | | keystone serial hw support hw flow control. This patch enables hw flow control for keystone EVMs as an optional feature based on CONFIG_SERIAL_HW_FLOW_CONTROL. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
* | Merge branch 'tom' of git://git.denx.de/u-boot-x86Tom Rini2014-05-09-0/+11
|\ \
| * | sandbox: Update and expand the READMESimon Glass2014-05-09-0/+11
| |/ | | | | | | | | | | | | Now that sandbox has a good base of features, the README is quite out of date. Update it, and document the new features. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'u-boot/master'Albert ARIBAUD2014-05-09-11/+40
|\ \ | |/ | | | | | | | | | | Conflicts: drivers/net/Makefile (trivial merge)
| * usb: dfu: fix boards wo USB cable detectionMateusz Zalega2014-05-05-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Former usb_cable_connected() patch broke compilation of boards which do not support this feature. I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added its default implementation to gadget downloader driver code. There's only one driver of this kind and it's unlikely there'll be another, so there's no point in keeping it in /common. Previously this function was declared in usb.h. I've moved it, since it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended for USB host implementation. Existing code, confronted with default -EOPNOTSUPP return value, continues as if the cable was connected. CONFIG_USB_CABLE_CHECK was removed. Change-Id: Ib9198621adee2811b391c64512f14646cefd0369 Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-04-25-3/+34
| |\
| | * Makefile: Add support of CONFIG_SPL_FSL_PBLPrabhakar Kushwaha2014-04-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Objective of this target to have concatenate binary having - SPL binary in PBL command format - U-boot binary Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * powerpc:Add support of SPL non-relocationPrabhakar Kushwaha2014-04-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * mpc85xx/t104x: Add deep sleep framework supportTang Yuantian2014-04-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When T104x soc wakes up from deep sleep, control is passed to the primary core that starts executing uboot. After re-initialized some IP blocks, like DDRC, kernel will take responsibility to continue to restore environment it leaves before. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun2014-04-22-1/+12
| | | | | | | | | | | | | | | | | | | | | Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
| | * QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and ↵Zhao Qiang2014-04-22-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_QE_FW_ADDR CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address. Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address, and CONFIG_SYS_QE_FW_ADDR for QE microcode address. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDSAneesh Bansal2014-04-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes: 1. L2 cache is being invalidated by Boot ROM code for e6500 core. So removing the invalidation from start.S 2. Clear the LAW and corresponding configuration for CPC. Boot ROM code uses it as hosekeeping area. 3. For Secure boot, CPC is configured as SRAM and used as house keeping area. This configuration is to be disabled once in uboot. Earlier this disabling of CPC as SRAM was happening in cpu_init_r. As a result cache invalidation function was getting skipped in case CPC is configured as SRAM.This was causing random crashes. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | cosmetic: README: add some entries to Directory HierarchyMasahiro Yamada2014-04-20-0/+5
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | mips: xburst: remove remainders of dead boardMasahiro Yamada2014-04-20-1/+0
| |/ | | | | | | | | | | | | | | | | | | Commit 54e458de deleted qi_lb60 board support because of the incompatible license issue. There is no board with XBurst CPU. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * Merge branch 'next'Tom Rini2014-04-17-0/+1
| |\
| | * aes: Add 'aes' command to access AES-128-CBCMarek Vasut2014-03-21-0/+1
| | | | | | | | | | | | | | | | | | | | | Add simple 'aes' command, which allows using the AES-128-CBC encryption and decryption functions from U-Boot command line. Signed-off-by: Marek Vasut <marex@denx.de>
* | | NAND: DaVinci: allow forced disable of subpage writesKaricheri, Muralidharan2014-04-17-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Tom Rini <trini@ti.com>
* | | README: Add CONFIG_SPL_OS_BOOT to READMETom Rini2014-04-17-0/+4
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPLTom Rini2014-04-17-0/+4
|/ / | | | | | | | | | | | | | | This mainly converts the am335x_spl_bch driver to the "normal" format which means a slight change to nand_info within the driver. Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-08-1/+11
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * | new commands: uuid and guid - generate random unique identifierPrzemyslaw Marczak2014-04-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those commands basis on implementation of random UUID generator version 4 which is described in RFC4122. The same algorithm is used for generation both ids but string representation is different as below. char: 0 9 14 19 24 36 xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx UUID: be be be be be GUID: le le le be be Commands usage: - uuid [<varname>] - guid [<varname>] The result is saved in environment as a "varname" variable if argument is given, if not then it is printed. New config: - CONFIG_CMD_UUID Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: trini@ti.com
| * | usb: dfu: introduce dfuMANIFEST stateHeiko Schocher2014-03-23-0/+10
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u-boot version dfu-util may show: Starting download: [##################################################] finished! state(7) = dfuMANIFEST, status(0) = No error condition is present unable to read DFU status as get_status is not answered while erasing sectors, if erasing needs some time. So do the following changes to prevent this: - introduce dfuManifest state According to dfu specification ( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7: "the device enters the dfuMANIFEST-SYNC state and awaits the solicitation of the status report by the host. Upon receipt of the anticipated DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it completes its reprogramming operations." - when stepping into dfuManifest state, sending a PollTimeout DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host (dfu-util) waits the PollTimeout before sending a get_status again. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* | ARM: Add workaround for Cortex-A9 errata 761320Nitin Garg2014-04-07-0/+1
| | | | | | | | | | | | | | | | | | Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* | ARM: Add workaround for Cortex-A9 errata 794072Nitin Garg2014-04-07-0/+1
|/ | | | | | | | | A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* Add 64-bit data support for memory commandsYork Sun2014-03-04-0/+3
| | | | | | | | | | Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new size ".q " is introduced. For 64-bit architecture, 64-bit data is enabled by default, by detecting compiler __LP64__. It is optional for other architectures. Signed-off-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-7/+1
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * arm: Switch to -mno-unaligned-access when supported by the compilerTom Rini2014-02-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unaligned accesses being allowed and fast at the hardware level. We set this bit and must pass along -mno-unaligned-access so that the compiler will still breakdown accesses and not trigger a data abort. To better help understand the requirements of the project with respect to unaligned memory access, the Documentation/unaligned-memory-access.txt file has been added as doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1 tag of the kernel. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
| * arm: remove unneeded symbol offsets and _TEXT_BASEAlbert ARIBAUD2014-02-26-6/+0
| | | | | | | | | | | | | | | | Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | driver/ddr: Add 256 byte interleaving supportYork Sun2014-02-21-0/+5
| | | | | | | | | | | | | | Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory. Signed-off-by: York Sun <yorksun@freescale.com>
* | Driver/ddr: Add support of different DDR base addressYork Sun2014-02-21-0/+5
| | | | | | | | | | | | | | | | | | DDR base address has been the same from the view of core and DDR controllers. This has changed for Freescale ARM-based SoCs. Controllers setup DDR memory in a contiguous space and cores view it at separated locations. Signed-off-by: York Sun <yorksun@freescale.com>
* | driver/ddr: Change Freescale ARM DDR driver to support both big and little ↵York Sun2014-02-21-0/+6
| | | | | | | | | | | | | | | | | | endian Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian. Signed-off-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-06 05:03:23 +0000