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* omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini2012-09-27-0/+4
| | | | | | | | Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2012-09-25-6/+31
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| * powerpc/fsl-corenet: work around erratum A004510Scott Wood2012-08-23-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Erratum A004510 says that under certain load conditions, modified cache lines can be discarded, causing data corruption. To work around this, several CCSR and DCSR register updates need to be made in a careful manner, so that there is no other transaction in corenet when the update is made. The update is made from a locked cacheline, with a delay before to flush any previous activity, and a delay after to flush the CCSR/DCSR update. We can't use a readback because that would be another corenet transaction, which is not allowed. We lock the subsequent cacheline to prevent it from being fetched while we're executing the previous cacheline. It is filled with nops so that a branch doesn't cause us to fetch another cacheline. Ordinarily we are running in a cache-inhibited mapping at this point, so we temporarily change that. We make it guarded so that we should never see a speculative load, and we never do an explicit load. Thus, only the I-cache should ever fill from this mapping, and we flush/unlock it afterward. Thus we should avoid problems from any potential cache aliasing between inhibited and non-inhibited mappings. NOTE that if PAMU is used with this patch, it will need to use a dedicated LAW as described in the erratum. This is the responsibility of the OS that sets up PAMU. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/corenet_ds: Update README and README.srio-pcie-boot-corenetLiu Gang2012-08-23-6/+6
| | | | | | | | | | | | | | | | | | Added descriptions about boot from PCIE in the files README and doc/README.srio-pcie-boot-corenet, and changed the name of the doc/README.srio-boot-corenet to doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | README: Cleanup description of supported partitions.Karl O. Pinc2012-09-02-4/+11
| | | | | | | | | | | | README: Cleanup description of supported partitions. Signed-off-by: Karl O. Pinc <kop@meme.com>
* | README: Update ver env var descriptionBenoît Thébaudeau2012-09-02-1/+2
| | | | | | | | | | | | | | | | Commit 155cb01 replaced the read-only property of the ver env var with an auto-restoring behavior. Update the README file accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de>
* | pci: add CONFIG_PCI_ENUM_ONLY for platforms that don't need PCI setup doneAndrew Sharp2012-09-02-0/+7
| | | | | | | | | | | | | | | | | | | | | | Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a quick enumberation of the PCI devices, but don't need any setup work done. This is very beneficial on platforms that have u-boot loaded by another boot loader which does a more sophisticated job of setup of PCI devices than u-boot. That way, u-boot can just read what's there and get on with life. This is what SeaBIOS does. Signed-off-by: Andrew Sharp <andywyse6@gmail.com>
* | README: fix references to config_cmd_default.hStephen Warren2012-09-01-2/+2
|/ | | | | | | All usage of config_cmd_default.h uses <> for the include statement. Update the README to do the same, rather than using "". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* net: nfs: make NFS_TIMEOUT configurableTetsuyuki Kobayashi2012-07-12-0/+7
| | | | | | | NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to adjust. This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a board specific config file. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* Add env vars describing U-Boot target boardStephen Warren2012-07-09-0/+14
| | | | | | | | | | | This can be useful for generic scripts. For example, rather than hard- coding a script to ext2load tegra-harmony.dtb, it could load ${soc}-${board}.dtb and hence not need adjustments to run on multiple boards. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* PATCH 1/4][v4] doc:Add documentation for e500 external debugger supportPrabhakar Kushwaha2012-07-06-0/+9
| | | | | | | | | | | | This describes requirement of e500 and e500v2 processor to support external debugger. It also provide an insight of the configuration switch required and their description. Signed-off-by: Radu Lazarescu <radu.lazarescu@freescale.com> Signed-off-by: Marius Grigoras <marius.grigoras@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* net: Add link-local addressing supportJoe Hershberger2012-05-23-0/+10
| | | | | | | Code based on networking/zcip.c in busybox commit 8531d76a15890c2c535908ce888b2e2aed35b172 Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Add option CONFIG_BOOTP_MAY_FAILJoe Hershberger2012-05-23-0/+7
| | | | | | | | This is useful if you want to look for a DHCP server, but try some other settings if not available. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: enable Thumb buildAneesh V2012-05-15-0/+8
| | | | | | | | Enable Thumb build and ARM-Thumb interworking based on the new config flag CONFIG_SYS_THUMB_BUILD Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-04-30-0/+24
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot cmd_bdinfo: display the address map size (32-bit vs. 36-bit) PowerPC: correct the SATA for p1/p2 rdb-pc platform powerpc/corenet_ds: Slave core in holdoff when boot from SRIO powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO powerpc/corenet_ds: Slave uploads ucode when boot from SRIO powerpc/corenet_ds: Slave module for boot from SRIO powerpc/corenet_ds: Master module for boot from SRIO powerpc/corenet_ds: Document for the boot from SRIO powerpc/corenet_ds: Correct the compilation errors about ENV powerpc/srio: Rewrite the struct ccsr_rio powerpc/85xx:Fix lds for nand boot debug info powerpc/p2041rdb: add env in NAND support powerpc/p2041rdb: add NAND and NAND boot support powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards powerpc/85xx:Avoid vector table compilation for nand_spl powerpc/85xx:Fix IVORs addr after vector table relocation powerpc/85xx:Avoid hardcoded vector address for IVORs powerpc/p1023rds: Disable nor flash node and enable nand flash node
| * powerpc/corenet_ds: Slave reads ENV from master when boot from SRIOLiu Gang2012-04-24-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot from SRIO, slave's ENV can be stored in master's memory space, then slave can fetch the ENV through SRIO interface. NOTE: Because the slave can not erase, write master's NOR flash by SRIO interface, so it can not modify the ENV parameters stored in master's NOR flash using "saveenv" or other commands. Master needs to: 1. Put the slave's ENV into it's own memory space. 2. Set an inbound SRIO window covered slave's ENV stored in master's memory space. Slave needs to: 1. Set a specific TLB entry in order to fetch ucode and ENV from master. 2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * powerpc/corenet_ds: Slave module for boot from SRIOLiu Gang2012-04-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. 5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode locally. For the slave module, need to finish these processes: 1. Set the boot location to SRIO1 or SRIO2 by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot. 4. Slave's u-boot image should be generated specifically by make xxxx_SRIOBOOT_SLAVE_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* | CMD: Fix typo CMD_FSL -> CMD_MFSL in readmeMarek Vasut2012-04-19-1/+1
|/ | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: vapier@gentoo.org Acked-by: Anatolij Gustschin <agust@denx.de>
* README: supported boards are in boards.cfg, not MakefileMichael Jones2012-04-11-5/+3
| | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
* MIPS: fix endianess handlingDaniel Schwierzeck2012-04-02-0/+6
| | | | | | | | | | | | | | | | | Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2012-03-30-0/+8
|\ | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: Enable high speed support for USB device framework and usbtty
| * Enable high speed support for USB device framework and usbttyVipin KUMAR2012-03-28-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support for high speed in usb device framework and usbtty driver. This feature has been kept within a macro CONFIG_USBD_HS, so the board configuration files have to define this macro to enable high speed support. Along with that specific peripheral drivers also need to define a function to let the framework know that the enumeration has happened at high speed. This function prototype is "int is_usbd_high_speed(void)" Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
* | BOOT: Add RAW ramdisk support to bootzMarek Vasut2012-03-30-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows loading RAW ramdisk via bootz command. The raw ramdisk is loaded only in case it's size is specified: bootz <kernel addr> <ramdisk addr>:<ramdisk size> <fdt addr> For example: bootz 0x42000000 0x43000000:0x12345 0x44000000 Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Tom Warren <TWarren@nvidia.com> Cc: albert.u.boot@aribaud.net Cc: afleming@gmail.com Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | BOOT: Add "bootz" command to boot Linux zImage on ARMMarek Vasut2012-03-30-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command boots Linux zImage from where the zImage is loaded to. Passing initrd and fdt is supported. Tested on i.MX28 based DENX M28EVK Tested on PXA270 based Voipac PXA270. NOTE: This currently only supports ARM, but other architectures can be easily added by defining bootz_setup(). Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Warren <TWarren@nvidia.com> Cc: albert.u.boot@aribaud.net Cc: afleming@gmail.com, Cc: Simon Glass <sjg@chromium.org>, Cc: Stephen Warren <swarren@nvidia.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-03-30-2/+6
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'agust@denx.de' of git://git.denx.de/u-boot-staging: lzma: fix printf warnings Remove CONFIG_SYS_EXTBDINFO from snapper9260.h cmd_pxe.c: fix strict-aliasing warnings net: smc91111: use mdelay() doc: Fix some typos in different files disk/part.c: Fix device enumeration through API mkenvimage: Really set the redundant byte when applicable mkenvimage: Don't try to detect comments in the input file mkenvimage: Use mmap() when reading from a regular file mkenvimage: Read/Write from/to stdin/out by default or if the filename is "-" mkenvimage: More error handling mkenvimage: Correct an include and add a missing one mkenvimage: correct and clarify comments and error messages MAKEALL: display SPL size if present ARMV7/Vexpress: add missing get_ticks() and get_tbclk() mkenvimage: fix usage message cmd_fat: add FAT write command fs/fat/fat_write.c: Fix GCC 4.6 warnings FAT write: Fix compile errors
| * | cmd_fat: add FAT write commandDonggeun Kim2012-03-26-2/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Once CONFIG_FAT_WRITE is defined, users can invoke 'fatwrite' command that saves data in RAM as a FAT file. This patch was originally part of http://article.gmane.org/gmane.comp.boot-loaders.u-boot/121847 Signed-off-by: Donggeun Kim <dg77.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Maximilian Schwerin <mvs@tigris.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | usb: Add support for txfifo thresholdSimon Glass2012-03-29-0/+3
| | | | | | | | | | | | | | | | | | CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning field in the EHCI controller on reset. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | README: document more SPL config optionsTom Rini2012-03-26-10/+59
|/ | | | Signed-off-by: Tom Rini <trini@ti.com>
* Revert "Add board_pre_console_putc to deal with early console output"Simon Glass2012-03-23-17/+0
| | | | | | | | | | | This reverts commit 295d3942b806552503243f5cfb36aec6f1b5a9bf. It turns that this really doesn't work very nicely. Instead we should have a pre-console panic function so that we know that further execution is impossible and we don't need to worry about trampling on UARTs, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Wolfgang Denk <wd@denx.de>
* bootstage: Implement core microsecond boot time measurementSimon Glass2012-03-18-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This defines the basics of a new boot time measurement feature. This allows logging of very accurate time measurements as the boot proceeds, by using an available microsecond counter. To enable the feature, define CONFIG_BOOTSTAGE in your board config file. Also available is CONFIG_BOOTSTAGE_REPORT which will cause a report to be printed just before handing off to the OS. Most IDs are not named at this stage. For that I would first like to renumber them all. Timer summary in microseconds: Mark Elapsed Stage 0 0 reset 205,000 205,000 board_init_f 6,053,000 5,848,000 bootm_start 6,053,000 0 id=1 6,058,000 5,000 id=101 6,058,000 0 id=100 6,061,000 3,000 id=103 6,064,000 3,000 id=104 6,093,000 29,000 id=107 6,093,000 0 id=106 6,093,000 0 id=105 6,093,000 0 id=108 7,089,000 996,000 id=7 7,089,000 0 id=15 7,089,000 0 id=8 7,097,000 8,000 start_kernel Signed-off-by: Simon Glass <sjg@chromium.org>
* common/image.c: align usage of fdt_high with initrd_highShawn Guo2012-02-27-0/+8
| | | | | | | | | | | | | | | | | | The commit message of a28afca (Add uboot "fdt_high" enviroment variable) states that fdt_high behaves similarly to the existing initrd_high. But fdt_high actually has an outstanding difference from initrd_high. The former specifies the start address, while the later specifies the end address. As fdt_high and initrd_high will likely be used together, it'd be nice to have them behave same. The patch changes the behavior of fdt_high to have it aligned with initrd_high. The document of fdt_high in README is updated with an example to demonstrate the usage of this environment variable. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2012-02-13-0/+20
|\ | | | | | | | | | | | | | | * 'sf' of git://git.denx.de/u-boot-blackfin: README: Add description of SPI Flash (SF) command configuration sf command: allow default bus and chip selects sf: eeprom_m95xxx: set a sane default timeout sf: eeprom_m95xxx: fix up style
| * README: Add description of SPI Flash (SF) command configurationEric Nelson2012-02-12-0/+20
| | | | | | | | | | | | Acked-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | arm, arm926ejs: Add option CONFIG_SYS_EXCEPTION_VECTORS_HIGHChristian Riesch2012-02-12-0/+6
|/ | | | | | | | | | | | | | The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH that allows setting the correct value for the V bit. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Heiko Schocher <hs@denx.de>
* README: update (C) entryWolfgang Denk2012-01-19-1/+1
| | | | | | | There are tools that automatically extract this information, so better make it up to date. Signed-off-by: Wolfgang Denk <wd@denx.de>
* net: add Calxeda xgmac driverRob Herring2012-01-05-0/+3
| | | | | | | | | | This adds ethernet driver for Calxeda xgmac found on Highbank SOC. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Fix: WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add safe vsnprintf and snprintf library functionsSonny Rao2011-12-17-0/+9
| | | | | | | | | | | | | | | | From: Sonny Rao <sonnyrao@chromium.org> These functions are useful in U-Boot because they allow a graceful failure rather than an unpredictable stack overflow when printf() buffers are exceeded. Mostly copied from the Linux kernel. I copied vscnprintf and scnprintf so we can change printf and vprintf to use the safe implementation but still return the correct values. (Simon Glass <sjg@chromium.org> modified this commit a little) Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
* README: add documentation for CONFIG_USB_ULPI*Igor Grinberg2011-12-16-0/+8
| | | | | | | Add documentation for CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT configuration options. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* Add board_pre_console_putc to deal with early console outputSimon Glass2011-12-09-0/+17
| | | | | | | | | | | | | | | | This patch adds support for console output before the console is inited. The main purpose of this is to deal with a very early panic() which would otherwise cause a silent hang. A new board_pre_console_putc() function is added to the board API. If provided by the board it will be called in the event of console output before the console is ready. This function should turn on all UARTs and spray the character out if it possibly can. The feature is controlled by a new CONFIG_PRE_CONSOLE_PUTC option. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* MPC7xx: remove obsolete "BAB7xx" boardWolfgang Denk2011-12-08-1/+1
| | | | | | | | The BAB7xx boards are almost deceased. They cause build warnings, an it's not worth the effort to fix these. Remove the dead body. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Frank Gottschling <fgottschling@eltec.de>
* Introduce generic TPM support in u-bootVadim Bendebury2011-12-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPM (Trusted Platform Module) is an integrated circuit and software platform that provides computer manufacturers with the core components of a subsystem used to assure authenticity, integrity and confidentiality. This driver supports version 1.2 of the TCG (Trusted Computing Group) specifications. The TCG specification defines several so called localities in a TPM chip, to be controlled by different software layers. When used on a typical x86 platform during the firmware phase, only locality 0 can be accessed by the CPU, so this driver even while supporting the locality concept presumes that only locality zero is used. This implementation is loosely based on the article "Writing a TPM Device Driver" published on http://ptgmedia.pearsoncmg.com Compiling this driver with DEBUG defined will generate trace of all accesses to TMP registers. This driver has been tested and is being used in three different functional ChromeOS machines (Pinetrail and Sandy Bridge Intel chipsets) all using the same Infineon SLB 9635 TT 1.2 device. A u-boot cli command allowing access to the TPM was also implemented and is being submitted as a second patch. Change-Id: I22a33c3e5b2e20eec9557a7621bd463b30389d73 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> CC: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: clean up and document the QE/FMAN microcode macrosTimur Tabi2011-11-29-0/+38
| | | | | | | | | | | | | | | | | | | | Several macros are used to identify and locate the microcode binary image that U-boot needs to upload to the QE or Fman. Both the QE and the Fman use the QE Firmware binary format to package their respective microcode data, which is why the same macros are used for both. A given SOC will only have a QE or an Fman, so this is safe. Unfortunately, the current macro definition and usage has inconsistencies. For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address of NAND. There's no way to know by looking at a variable how it's supposed to be used. In the future, the code which uploads QE firmware and Fman firmware will be merged. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* arm, davinci_emac: fix driver bug if more then 3 PHYs are detectedHeiko Schocher2011-11-15-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since commits: davinci: emac: add support for more than 1 PHYs 062fe7d332c28ede25626f448681e43d76bb312e davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM fb1d6332b5430b90a8fa8ebab709f33a60e9f816 I get following warning on the enbw_cmc board: Err: serial Net: 5 ETH PHY detected miiphy_register: non unique device name 'KSZ8873 @ 0x01' DaVinci-EMAC Hit any key to stop autoboot: 0 Also I see some debug printfs: => run load + emac_close + emac_ch_teardown - emac_ch_teardown + emac_ch_teardown - emac_ch_teardown - emac_close + emac_open - emac_open Using DaVinci-EMAC device reason is 062fe7d332c28ede25626f448681e43d76bb312e new define MAX_PHY. This is set to 3! I get on this board 5 active phys, so this leads in wrong memory writes ... so I changed: - define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT to set the MAX_PHY value, add a description in README for the new CONFIG_SYS option. - print an error message if more then MAX_PHYs are detected. - fill the active_phy_addr array in a for loop with 0xff - changed printf() in debug_emac() Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Cc: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Tom Rini <tom.rini@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* README: Fix supported i.MX SoC list for CONFIG_MXC_SPIFabio Estevam2011-11-04-1/+1
| | | | | | CONFIG_MXC_SPI currently works on MX31/35/51 boards, so update the README file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* spl, nand: add 4bit HW ecc oob first nand_read_page functionHeiko Schocher2011-11-03-0/+5
| | | | | | | | | | | | similiar to commit dc7cd8e59ba077f3b4c1a4557c9cd86a31b9ab1f, only adapted for the new spl framework. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Tom Rini <trini@ti.com> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* rtc: Make mc13783-rtc driver genericFabio Estevam2011-11-03-1/+1
| | | | | | | | | | | | | | | | | Rename mc13783-rtc so that it can be used for both MC13783 and MC13892 PMICs. efikamx board, for example, does use a MC13892 PMIC, but the RTC selection is currently made as: #define CONFIG_RTC_MC13783 ,which is not very obvious. Let the MC13783 and MC13892 RTC be selected by: #define CONFIG_RTC_MC13XXX Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* e1000: Allow direct access to the E1000 SPI EEPROM deviceKyle Moffett2011-10-28-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a part of the manufacturing process for some of our custom hardware, we are programming the EEPROMs attached to our Intel 82571EB controllers from software using U-Boot and Linux. This code provides several conditionally-compiled features to assist in our manufacturing process: CONFIG_CMD_E1000: This is a basic "e1000" command which allows querying the controller and (if other config options are set) performing EEPROM programming. In particular, with CONFIG_E1000_SPI this allows you to display a hex-dump of the EEPROM, copy to/from main memory, and verify/update the software checksum. CONFIG_E1000_SPI_GENERIC: Build a generic SPI driver providing the standard U-Boot SPI driver interface. This allows commands such as "sspi" to access the bus attached to the E1000 controller. Additionally, some E1000 chipsets can support user data in a reserved space in the E1000 EEPROM which could be used for U-Boot environment storage. CONFIG_E1000_SPI: The core SPI access code used by the above interfaces. For example, the following commands allow you to program the EEPROM from a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled): usb start fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin e1000 0 spi program $loadaddr 0 1024 e1000 0 spi checksum update Please keep in mind that the Intel-provided .eep files are organized as 16-bit words. When converting them to binary form for programming you must byteswap each 16-bit word so that it is in little-endian form. This means that when reading and writing words to the SPI EEPROM, the bit ordering for each word looks like this on the wire: Time >>> ------------------------------------------------------------------ ... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ... ------------------------------------------------------------------ (MSB is 15, LSB is 0). Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* cosmetic: s/BOARD_LATE_INIT/CONFIG_BOARD_LATE_INITHelmut Raiger2011-10-27-0/+14
| | | | | | | | | | | | | This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT. Along the way it removes some leftover #define BOARD_LATE_INIT 1 and adds some basic documentation for board specific callbacks in README. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* README: improve documentation of network related CONFIG_ settingsWolfgang Denk2011-10-27-0/+19
| | | | | | | | Add documentation for CONFIG_GATEWAYIP and CONFIG_NETMASK; also add information which environment variables are set. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* README: white-space cleanupWolfgang Denk2011-10-27-20/+20
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
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