| Commit message (Collapse) | Author | Age | Lines |
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Fix coldfire serial driver bindings no more relocated to ram after last
changes to drivers/serial/serial.c (regression).
Serial initialization in ram has to be called after that gd->reloc_off is
calculated.
Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
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IGEP board PC16550D (ns16550) UART doesn't set the
Transmitter Empty (TEMT) Bit in SPL. This makes
U-Boot to hang while waiting for TEMT. Add the
CONFIG_SYS_NS16550_BROKEN_TEMT config option to
avoid this issue.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
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Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.
Add a new option to avoid this:
CONFIG_SYS_NS16550_BROKEN_TEMT
16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
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On clobber, do a cleanup even for SPL build else, we'd have
MLO.byteswap remaining for certain platforms like am33xx SPL builds
Signed-off-by: Nishanth Menon <nm@ti.com>
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When booting an IGEPv2 board from NAND with SPL, U-Boot hangs
trying to read the OMAP General Purpose Memory Controller (GPMC).
The reason is that the GPMC initialization function is called
inside spl_board_init() and this function is only executed when
CONFIG_SPL_BOARD_INIT is defined.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
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The two modified lines were indented with spaces.
They are now indented with tabs.
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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The timer may be inited in arch_cpu_init() so it is not safe to make a
bootstage mark before this is called. Arrange the code to fix this.
Note: The question was raised as to why we don't keep all archs in sync.
PowerPC doesn't have specific bootstage markers at present (although it
does use boot progress). I hope that the generic board series will solve
this problem in general, but in the meantime this is a real problem, and
only in ARM.
We now get a correct time for board_init_f:
Timer summary in microseconds:
Mark Elapsed Stage
0 0 reset
100,000 100,000 spl_start
848,530 748,530 board_init_f
907,301 58,771 board_init_r
910,478 3,177 board_init
Signed-off-by: Simon Glass <sjg@chromium.org>
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SPL u-boot may call do_reset() which depends on interrupts.o and reset.o.
So make them also appear in SPL.
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some boards want to report more than just memory size. For example, it
might be useful to display the memory type (DDR2, DDR3) or manufacturer.
Add a weak function to support this requirement, accessed through a new
'meminfo' command.
Any example of the DRAM: output is below, just for illustration:
SMDK5250 # meminfo
DRAM: 2 GiB Elpida DDR3 @ 800MHz
Signed-off-by: Simon Glass <sjg@chromium.org>
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This option displays board info after stdio is running, so that it will
appear on the LCD. If it is displayed earlier, the board info will appear
on the serial console but not on the LCD.
Here follows a blow-by-blow description.
1a. Without CONFIG_DISPLAY_BOARDINFO_LATE, on serial:
U-Boot 2011.12-02550-g037e1c5-dirty (Nov 15 2012 - 14:29:42) for SMDK5250
CPU: S5PC520 @ 1700MHz
Board: Google Snow, rev 0
I2C: ready
DRAM: 2 GiB Elpida DDR3 @ 800MHz
MMC: S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
1b. Without CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info
is missing):
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
2a. With CONFIG_DISPLAY_BOARDINFO_LATE, on serial:
U-Boot 2011.12-02550-g037e1c5 (Nov 15 2012 - 14:27:40) for SMDK5250
CPU: S5PC520 @ 1700MHz
I2C: ready
DRAM: 2 GiB Elpida DDR3 @ 800MHz
MMC: S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment
Model: Google Snow
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
2b. With CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info is present):
Model: Google Snow
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
Since the LCD is all that a typical user sees, it is useful to display
the model there.
We may be able to rearrange things some other way one day, but at
present this seems like a convenient way of getting the required
behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a short note about this in the README.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This option delays loading of the environment until later, so that only the
default environment will be available to U-Boot.
This can address the security risk of untrusted data being used during boot.
Any time you load untrusted data you expose yourself to a bug in the
code. The attacker gets to choose the data so can sometimes carefully
craft it to exploit a bug. We try to avoid touching user-controlled
data during a verified boot unless strictly necessary. Since the
default environment is good enough in this case (or you would just
change it), this gets around the problem by just not loading the
environment.
When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a
run-time way of enabling loading of the environment. Add this to the
fdt as /config/delay-environment.
Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
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We want to use the fdt inside board_early_init_f(), so check for its
presence earlier in the pre-reloc init sequence.
So far ARM and microblaze are the only only ones that use
CONFIG_OF_CONTROL. Microblaze does not have the same init loop, and in
particular does not have the board_early_init_f() call. So a patch for
microblaze would have no meaning.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It may be necessary to know where the TLB area ends as well as where it
starts. This allows board code to complete a secure memory erase without
destroying the page tables.
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
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In Cortex-A15 architecture, when we run cache invalidate
the cache clean operation executes automatically.
So if there are any dirty cache lines before disabling the L2 cache
these will be synchronized with the main memory when
invalidate_dcache_all() runs in the last part of U-boot
The two functions after flush_dcache_all is using the stack. So this
data will be on the cache. After disable when invalidate is called the
data will be flushed from cache to memory. This corrupts the stack in
invalida_dcache_all. So this change is required to avoid the u-boot
hang.
So flush has to be done just before clearing CR_C bit
Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
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The at91sam9m10g45 also support WDRBT bit, add support for it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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This will fix the following error:
---8<---
UBIFS error (pid 0): ubifs_mount: Error reading superblock on volume 'ubi:root' errno=-12!
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: prafulla@marvell.com
Cc: dimax.main@gmail.com
Tested-by: Alex Xol <dimax.main@gmail.com>
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Modified the arch-kirkwood header so KWGBE_PORT_SERIAL_CONTROL1_REG(x)
returns the correct address.
Originally calling KWGBE_PORT_SERIAL_CONTROL1_REG(1) returned the
address for port 0 and vice versa.
Doesn't have any knock on effects to the u-boot code as the only
time they're used is to do the same function to both addresses
Signed-off-by: Luke Lowrey <luke@chamsys.co.uk>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
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Instead of using the serverip we get from the DHCP server, implicitly use
the broadcast address, which is automatically set when no ncip environment
variable is set. That way it isn't necessary to use a special DHCP
configuration to set the netconsole peer.
Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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This saves stack and code memory for local copy, and
consumes initialized data memory. For 22 of the 29
kirkwood-based boards, this results in a global saving
of about 30 bytes. For 7 of them, it results in an
increase of 6 to 14 bytes.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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This patch removes 2 small portions of board specific code that are
duplicated with common ARM code and thus unnecessary. These 2 portions
of code concern the mach id that is given by u-boot to the Linux kernel
to identify the system's MACH.
The first one was the possibility to change the MACH thanks to the
'mach_id' enviroment variable. This is possible thanks to the 'machid'
env variable (see arch/arm/lib/bootm.c:boot_jump_linux()).
The seconde one is the setting of the bi_arch_number. This is already
done in arch/arm/lib/board.c:board_init_f() since km_arm.h does #define
CONFIG_MACH_TYPE.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
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These variables are only used if CONFIG_SYS_CONSOLE_IS_IN_ENV
is set. This isn't the case, so we can drop them safely.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
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On kmcoge5un we faced some serious problems with the memory during
temperature tests. Reason was that we overwrite some registers for
memory settings which have to leave untouched. These where registers
0x20148 , 0x2014c and 0x20154.
So writing these registers is prohibited and this patch removes them
from all km related config files. Even if the problem was only
seen on kmcoge5un.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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CONFIG_NEEDS_MANUAL_RELOC
To make bootm sub-command feature working on archs with CONFIG_NEEDS_MANUAL_RELOC,
the name pointers in the sub-command table need to be relocated.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Report the usage of the Advanced Sector Protection (PPB) to the user
upon 'flinfo' command. E.g:
Bank # 1: CFI conformant flash (16 x 16) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
Advanced Sector Protection (PPB) enabled
Erase timeout: 16384 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 32 bytes
Sector Start Addresses:
FC000000 E FC020000 E RO FC040000 E FC060000 E FC080000 E
...
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
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Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support this type
of locking/unlocking. Detection of support is done in the same way as
done for the Spansion chips - via the 0x49 CFI word.
This patch enables this PPB protection mechanism for all AMD type
(AMD commandset) chips.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
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Patch 66863b05 [cfi_flash: add support for Spansion flash PPB sector
protection] introduced the PPB (Persistent Protection Bit) locking for
Spansion chips. But right now the sector protection status (locked vs
unlocked) is set to unlocked for all sectors upon bootup. The real
sector protection status is ignored.
This patch now reads the current sector protection status and uses
it for these AMD/Spansion flash chips.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
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Consolidate manufacturer matching into the function manufact_match()
and use it.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
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Add support for SST 4KB sector granularity.
Many recent SST flashes, i.e. SST39VF3201B and similar of this family
are declared CFI-conformant from SST. They support CFI query, but implement
2 different sector sizes in the same memory: a 64KB sector (they call it
"block", std AMD erase cmd=0x30), and a 4KB sector (they call it "sector",
erase cmd=0x50). Also, CFI query on these chips, reading from address 0x2dh
of cfi query struct, detects a number of secotrs for the 4KB granularity
(flinfo shows it).
For all other aspects, they are CFI compliant, so, as Linux do, i think
it's a good idea to handle these chips in the CFI driver, with a fixup
to allow 4KB granularity, as should be expected, instead of 64KB.
Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Signed-off-by: Stefan Rose <sr@denx.de>
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Remove code such as unneeded includes or labels.
These removals have no functional effect.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Move all the C runtime setup code from every start.S
in arch/arm into arch/arm/lib/crt0.S. This covers
the code sequence from setting up the initial stack
to calling into board_init_r().
Also, rewrite the C runtime setup and make functions
board_init_*() and relocate_code() behave according to
normal C semantics (no jumping across the C stack any
more, etc).
Some SPL targets had to be touched because they use
start.S explicitly or for some reason; the relevant
maintainers and custodians are cc:ed.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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In order to mx53 ROM to properly load the U-boot image, its header size should
be multiple of 512 bytes.
This issue was observed with gcc 4.6.2/4.7.3, which caused data aborts:
U-Boot 2013.01-rc2-00172-gf8cfcf1-dirty (Dec 26 2012 - 13:13:28)
Board: MX53 LOCO
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
In: serial
Out: serial
Err: serial
CPU: Freescale i.MX53 family rev2.1 at 1000 MHz
Reset cause: WDOG
Net: FEC
Warning: FEC using MAC address from net device
Hit any key to stop autoboot: 0
data abort
MAYBE you should read doc/README.arm-unaligned-accesses
pc : [<aff72220>] lr : [<aff721fc>]
sp : af565e20 ip : af566918 fp : 00000000
r10: 00000003 r9 : affabb5b r8 : af565f58
r7 : 00000000 r6 : 36747fff r5 : af5668e8 r4 : 36747fff
r3 : af5668ec r2 : af5668eb r1 : 00000000 r0 : af5668e8
Flags: NzcV IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
,and this patch fixes it.
Also, even though the ROUND macro is already defined in common.h,
the reason for redefining it in image.h is explained by Stefano Babic:
"I will remark a previous comment - even if including common.h seems a
good idea to avoid duplications, it makes tools like mkimage to depend
on the selected board, because <board>_config must run. Even if this is
not a problem for us u-boot developers, it becomes an issue when these
tools are included in distros (like u-boot-tools in Ubuntu) and cannot
be packaged."
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Make the error handling more robust.
Check if each one of the PMIC writes fail and if they do, just return
immediately.
Also, print the cause for the failures.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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commit c73368150 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) introduced an extra 'retval' variable, but this is not
necessary since we have already the variable 'ret' in place.
So use 'ret' to store the return values from the pmic related calls and remove
'retval'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Looks like the original comment came from a copy and paste from mx31ads.h.
It does not have a context on mx51evk anymore, so delete it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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