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* ARM1136: MX35: Make asm routines volatile in cache opsStefano Babic2012-04-16-10/+12
| | | | | | | | | | As well as pushed for ARM926EJS, we certainly don't want the compiler to reorganise the code for dcache flushing Fix checkpatch warnings as well. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marex@denx.de> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* ARM: add u-boot.imx as target for i.MX SOCsStefano Babic2012-04-16-0/+3
| | | | | | | | | | | | | | | Freescale SOCs require an header to u-boot.bin The patch adds u-boot.imx to the default targets if the imx file is set (IMX_CONFIG). Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> CC: Loïc Minier <loic.minier@linaro.org> CC: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Tested-by: Dirk Behme <dirk.behme@googlemail.com>
* M28: Pull out CONFIG_APBH_DMA so it's always enabledMarek Vasut2012-04-16-1/+5
| | | | | | | | | | | The ABPH DMA is now used also by the SD card. Therefore it has to be enabled even if NAND is disabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* DMA: Split the APBH DMA init into block and channel initMarek Vasut2012-04-16-24/+40
| | | | | | | | | | | | | | | | | | | | | | | This fixes the issue where mxs_dma_init() was called either twice or never, without introducing any new init hooks. The idea is to allow each and every device using the APBH DMA block to configure and request only the channels it uses, instead of making it call init for all the channels as is now. The common DMA block init part, which only configures the block, is then called from CPUs arch_cpu_init() call. NOTE: This patch depends on: http://patchwork.ozlabs.org/patch/150957/ Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Return gpio_set_value in gpio_direction_outputVikram Narayanan2012-04-16-2/+1
| | | | | | | | Return gpio_set_value in gpio_direction_output. Earlier it returned 0 and ignored gpio_set_value's return value. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5)Vikram Narayanan2012-04-16-4/+4
| | | | | | | Use the defined GPIO_TO_PORT macro. Remove gpio >> 5 references. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imx: Add GPIO_TO_PORT macro in the mxc_gpio driverVikram Narayanan2012-04-16-0/+1
| | | | | | | Add GPIO_TO_PORT macro in the mxc_gpio.c driver Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imx: Remove unneeded/repititive definitions from imx headersVikram Narayanan2012-04-16-6/+0
| | | | | | | Remove gpio related unused/repititive definitions from imx headers. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX28: Allow coexistence of PIO and DMA mode for SD/MMCMarek Vasut2012-04-16-1/+47
| | | | | | | | | | | | This SD DMA function of i.MX28 is still apparently too experimental to be enabled by default in 2012.04 release. Enable this feature only if the user plans to tinker with DCache or explicitly enables it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* MX31: mx31pdk: drop enable_caches from board fileStefano Babic2012-04-16-8/+0
| | | | | | | | | enable_caches() is implemented now in cpu.c for ARM1136. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX28: Fix initial stack pointer positionMarek Vasut2012-04-16-2/+2
| | | | | | | | | | | | | | | | | | | The patch: m28evk: Use GENERATED_GBL_DATA_SIZE commit 1084606c972ea5f1d89f69bdbd978b867d0ee521 introduced usage of GENERATED_GBL_DATA_SIZE and calculation of initial stack pointer position defived from that. Due to a small typo, the SP position moved to 0x21f80, which is past the SRAM area. This didn't manifest on the real hardware as the SRAM repeats there (address bits in the CPU being ignored). Though this was caught in QEMU, where it crashed the emulator. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx35: mx35pdk: fix when cache functions are linkedStefano Babic2012-04-16-0/+2
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* mx35: flea3: fix when cache functions are linkedStefano Babic2012-04-16-0/+2
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: 926ejs: use debug() for misaligned addressesStefano Babic2012-04-16-1/+1
| | | | | | | | | | | | Misaligned warnings are useful to debug faulty drivers. A misaligned warning is printed also when the driver is correct - use debug() instead of printf(). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Mike Frysinger <vapier@gentoo.org> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* ARM1136: add cache flush and invalidate operationsAnatolij Gustschin2012-04-16-0/+95
| | | | | | | | | | | | | | | | | | Since commit 5c1ad3e6f8ae578bbe30e09652f1531e9bc22031 (net: fec_mxc: allow use with cache enabled) the FEC_MXC driver uses flush_dcache_range() and invalidate_dcache_range() functions. This driver is also configured for ARM1136 based 'flea3' and 'mx35pdk' boards which currently do not build as there are no ARM1136 specific flush_dcache_range() and invalidate_dcache_range() functions. Add various ARM1136 cache functions to fix building for 'flea3' and 'mx35pdk'. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* mx6qsabrelite: Fix the serial console portFabio Estevam2012-04-16-1/+1
| | | | | | On mx6qsabrelite the console is ttymxc1. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabrelite: Add boot switch setting information into the READMEFabio Estevam2012-04-16-1/+2
| | | | | | Add boot switch setting information into the README Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX6: mx6qsabrelite: add cache commands if cache is enabledEric Nelson2012-04-16-0/+4
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* i.MX6: implement enable_caches()Eric Nelson2012-04-16-0/+12
| | | | | | | disabled by default until drivers are fixed Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* i.MX6: define CACHELINE_SIZEEric Nelson2012-04-16-0/+2
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* MX53: DDR: Fix ZQHWCTRL field TZQ_CSTroy Kisky2012-04-16-4/+4
| | | | | | | | | Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x02 - 128 cycles. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx28evk: Add a README fileFabio Estevam2012-04-16-0/+29
| | | | | | | Add a README file for mx28evk board. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mx28: Split the README into a common part and a m28 specific partFabio Estevam2012-04-16-215/+230
| | | | | | | | | | Split the README into a common part and a m28 specific part. This will make things easier when adding new README files for other mx28 based boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* tricorder: Load kernel from ubifsBernhard Walle2012-04-16-2/+7
| | | | Signed-off-by: Bernhard Walle <walle@corscience.de>
* tricorder: Add UBIFSBernhard Walle2012-04-16-2/+4
| | | | | | | | | | Since kernel should be in a ubifs partition, we need UBIFS. The greater malloc size is needed for UBIFS. Signed-off-by: Bernhard Walle <walle@corscience.de> Squashed two commits (UBIFS enabled and malloc size increased) into one. Signed-off-by: Thomas Weber <weber@corscience.de>
* cm-t35: fix Ethernet reset timingIgor Grinberg2012-04-16-5/+6
| | | | | | | | | | | The reset_net_chip() function has wrong timings for the reset pulse. This appeared to work until: 0607e2b (ARMV7: OMAP: Write more than 1 byte at a time in i2c_write) Fix the Ethernet support by introducing right timings. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORTTom Rini2012-04-16-0/+1
| | | | | | | With older toolchains we need CONFIG_SPL_LIBGENERIC_SUPPORT in order for CONFIG_SPL_NAND_SUPPORT to link. Signed-off-by: Tom Rini <trini@ti.com>
* BeagleBoard: Remove userbutton command and use gpio command insteadJoel Fernandes2012-04-16-57/+9
| | | | | | | Remove userbutton command and do the detection in board config file using the gpio command Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
* OMAP: Move omap1510inn to Unmaintained / OrphanedTom Rini2012-04-16-4/+3
| | | | | | | | | | After removing omap1610inn for not building, move omap1510inn to orphaned. Also update boards.cfg to note it's part of the 'omap' SoC to make sure the board is built more often and future breakage noticed quicker. Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-04-09-10/+35
|\ | | | | | | | | | | | | | | * 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging: LMB: Fix undefined lmb_reserve() on non-lmb platforms MIPS: fix endianess handling MIPS: fix inconsistency in config option for cache operation mode MIPS: board.c: fix init of flash data in bd_info
| * LMB: Fix undefined lmb_reserve() on non-lmb platformsMarek Vasut2012-04-02-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <TWarren@nvidia.com> Cc: Graeme Russ <graeme.russ@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * MIPS: fix endianess handlingDaniel Schwierzeck2012-04-02-7/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: fix inconsistency in config option for cache operation modeDaniel Schwierzeck2012-04-02-1/+5
| | | | | | | | | | | | | | | | | | | | Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to use the new config option in dcache_enable(). Fix this to avoid inconsistencies if someone wants to disable and enable D-caches. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: board.c: fix init of flash data in bd_infoDaniel Schwierzeck2012-04-02-2/+6
| | | | | | | | | | | | | | | | Boards with CONFIG_SYS_NO_FLASH should not forced to define CONFIG_SYS_FLASH_BASE. In this case the flash data in bd_info should be initialized with 0 like the other archs do. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2012-04-09-51/+2025
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-net: net/designware: Change timeout loop implementation net/designware: Set ANAR to 0x1e1 net/designware: Program phy registers when auto-negotiation is ON net/designware: Try configuring phy on each dw_eth_init net/designware: Consecutive writes must have delay net/designware: Phy address fix net/designware: Fix the max frame length size net/designware: Fix to restore hw mac address microblaze: Wire up LL_TEMAC driver initialization microblaze: Add faked LL_TEMAC driver configuration microblaze: Enable several ethernet driver compilation net: ll_temac: Add LL TEMAC driver to u-boot Update net subsystem maintainer in doc/git-mailrc net/eth.c: fix eth_write_hwaddr() to use dev->enetaddr as fall back mvgbe: remove warning for unused methods
| * | net/designware: Change timeout loop implementationAmit Virdi2012-04-04-16/+38
| | | | | | | | | | | | | | | | | | | | | The new implementation changes the timeout loop implementation to avoid 1 ms delay in each failing test. It also configures the delay to 10usec. Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Set ANAR to 0x1e1Armando Visconti2012-04-04-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This patch forces the advertised capabilities during auto negotiation to always be 10/100 Mbps and half/full as duplexing. Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Program phy registers when auto-negotiation is ONVikas Manocha2012-04-04-14/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If AN(auto-negotiation) is ON, speed bit of control register are not applicable. Also phy registers were not getting programmed as per the result of AN. This patch sets only AN bit & restart AN bit for AN ON selection & programs PHY registers as per AN result. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Try configuring phy on each dw_eth_initVipin Kumar2012-04-04-21/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Phy autonegotiation works only when the ethernet cable is plugged in. Since the phy was configured only at the init time, a plugged in cable was necessary to initialize the phy properly. This patch keeps a flag to check if the phy initialization has succeeded, and calls configure_phy routine at every init if this flag reports otherwise. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Consecutive writes must have delayArmando Visconti2012-04-04-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch solves a TX/RX problem which happens at 10Mbps, due to the fact that we are not respecting 4 cyles of the phy_clk (2.5MHz) between two consecutive writes on the same register. Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Phy address fixVipin KUMAR2012-04-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The code assumes the phy address to be > 0, which is not true, the phy address can be in the range 0-31. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Fix the max frame length sizeVipin KUMAR2012-04-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The max frame length for normal descriptor can be 0x7FF i.e 2047. It was wrongly specified as 2048. Currently, the max descriptor length is around 1500, so redefining the mask to 1600 Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | net/designware: Fix to restore hw mac addressVipin KUMAR2012-04-04-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The network controller mac resets hardware address stored in MAC_HI and MAC_LO registers if mac is resetted. So, hw mac address needs to be restored in case mac is explicitly resetted from driver. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
| * | microblaze: Wire up LL_TEMAC driver initializationStephan Linz2012-04-04-0/+36
| | | | | | | | | | | | | | | | | | | | | Initialize ll_temac driver. Reported-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Stephan Linz <linz@li-pro.net>
| * | microblaze: Add faked LL_TEMAC driver configurationStephan Linz2012-04-04-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expand the specific configuration for the microblaze-generic board in xparameters.h with a faked setup to enable the LL_TEMAC driver. Note: From now the microblaze-generic board is no longer a valid board configuration for a real piece of hardware. Rather than, we use the file config.mk and xparameters.h as a faked board configuration to force the compilation of all potential driver code for Microblaze systems. Signed-off-by: Stephan Linz <linz@li-pro.net>
| * | microblaze: Enable several ethernet driver compilationStephan Linz2012-04-04-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot's multipple network supports enables to use several ethernet drivers but microblaze-generic platform config file select only one driver. Reported-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Stephan Linz <linz@li-pro.net>
| * | net: ll_temac: Add LL TEMAC driver to u-bootStephan Linz2012-04-04-0/+1872
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx LocalLink Tri-Mode Ether MAC driver can be used by Xilinx Microblaze or Xilinx ppc405/440 in SDMA and FIFO mode. DCR or XPS bus can be used. The driver uses and requires MII and PHYLIB. CP: 4 warnings: 'Use of volatile is usually wrong' I won't fix this, because it depends on the network driver subsystem. Reported-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Stephan Linz <linz@li-pro.net>
| * | Update net subsystem maintainer in doc/git-mailrcJoe Hershberger2012-04-03-1/+2
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com>
| * | net/eth.c: fix eth_write_hwaddr() to use dev->enetaddr as fall backEric Miao2012-04-03-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ignore the return value of eth_getenv_enetaddr_by_index(), and if it fails, fall back to use dev->enetaddr, which could be filled up by the ethernet device driver: With the current code, introduced with below commit, eth_write_hwaddr() will fail immediately if there is no eth<n>addr in the environment variables. However, e.g. for an overo based product that uses the SMSC911x ethernet chip (with the MAC address set via EEPROM connected to the SMSC911x chip), the MAC address is still OK. On mx28 boards that are depending on the OCOTP bits to set the MAC address (like the Denx m28 board), the OCOTP bits should be used instead of failing on the environment variables. Actually, this was the original behavior, and was later changed by commit 7616e7850804c7c69e0a22c179dfcba9e8f3f587. Signed-off-by: Eric Miao <eric.miao@linaro.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefan Roese <sr@denx.de> CC: Eric Miao <eric.miao@linaro.org> CC: Wolfgang Denk <wd@denx.de> CC: Philip Balister <philip@balister.org> CC: Zach Sadecki <zach@itwatchdogs.com>
| * | mvgbe: remove warning for unused methodsStefan Bigler2012-04-03-0/+2
| |/ | | | | | | | | | | | | | | | | | | Some baords may use the GBE interface but they have no phy connected to the interface and a direct MAC/MAC interface. For them we need to get rid of compiler warnings. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
generated by cgit v1.1 at 2024-11-09 14:16:43 +0000