| Commit message (Collapse) | Author | Age | Lines |
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One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.
This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
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If a board does not enable CSPI, there is no need to show the CSPI clock
frequency as part of the 'clock' command.
Reported-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
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Measuring the spi clock line on a scope shows a 'glitch' during the reset of the
spi.
Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes
always stable.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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In decode_cs() function the polarity of the chip select must be taken into
account.
Also, for the case of low active chip select, the CS was activated too early.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Print CSPI clock in 'clock' command.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
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Align SPI chip select naming with i.MX53 reference manual.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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A custom board_ehci_hcd_init() may be unneeded, so add a weak default
implementation doing nothing.
By the way, use simple __weak from linux/compiler.h for
board_ehci_hcd_postinit() instead of weak alias with full attribute.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Add support for the OTG port on the mx35pdk Personality board.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
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Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare
to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at
SoC level.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Use EHCI MXC configuration options for i.MX25.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matthias Weisser <weisserm@arcor.de>
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Make EHCI power and overcurrent polarities configurable. If not set, these new
configurartions keep the default register values so that existing board files
do not have to be changed.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like
MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT,
not the opposite.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Clean up ehci-mx5:
- Fix column alignments.
- Fix comments.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Clean up ehci-mxc:
- Remove useless #if's.
- Fix identation.
- Issue a #error if used with an unsupported platform.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to
ehci-fsl.h so that all MXC SoCs can use them.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Only the values used in the sabrelite board are
added currently. Add more as other boards use them.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Read memory setup registers to determine size
of available ram. This routine works for mx53/mx6x
I need this because when mx6solo called get_ram_size
with a too large maximum size, the system hanged.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Use CONFIG_MX6 when the particular processor
variant isn't important.
Reserve the use of CONFIG_MX6Q to
specifically test for quad cores variant.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Previously, the same value was returned for both mx6dl and mx6solo.
Check number of processors to differeniate.
Also, a freescale patch says that sololite has its cpu/rev
stored at 0x280 instead of 0x260.
I don't have a sololite to verify.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Microblaze platform can use CONFIG_OF_EMBED option
but also it is necessary to support boards
which don't want to use this option.
U-Boot doesn't compile dts/libdts.o for #undef CONFIG_OF_EMBED
case that's why it should be guarded by ifdef.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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The patch
"include/linux/byteorder: import latest endian definitions from linux"
(sha1: eef1cf2d5cf1cae5fb76713e912263dedf110aeb)
Introduced a lot of compilation failures with unknow types.
include/linux/byteorder/big_endian.h:45:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le64p':
include/linux/byteorder/big_endian.h:47:18: error: '__le64' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:47:18: note: each undeclared identifier is reported only once for each function it appears in
include/linux/byteorder/big_endian.h:47:25: error: expected ';' before '__swab64p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:49:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h:53:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le32p':
include/linux/byteorder/big_endian.h:55:18: error: '__le32' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:55:25: error: expected ';' before '__swab32p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:57:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h:61:1: error: unknown type name '__le16'
...
Removing asm/bitops.h solved this problem.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Flushing caches is necessary because of soft reset
which doesn't clear caches.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Reviewed-by: Marek Vasut <marex@denx.de>
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Just remove ancient code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
Reviewed-by: Marek Vasut <marex@denx.de>
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ext2_find_next_zero_bit must be also static if __swab32 is also static.
Warning:
include/asm/bitops.h:369:22: warning: '__fswab32' is static but
used in inline function 'ext2_find_next_zero_bit'
which is not static [enabled by default]
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
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commit 199adb601ff34bdbbd0667fac80dfe0a87bffc2b "common/misc: sparse
fixes" broke the help command trying to fix the sparse error
"command.c:44:38: error: bad constant expression".
As Henrik points out, the fix was bad because the commit used
CONFIG_SYS_MAXARGS whereas the code intended to use the maximum
number of commands (not arguments to a command).
Revert command.c changes to the original code as asked by Wolfgang.
Reported-by: Henrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Commit 1db7377a70a8d931c32648e717695133120d5456 fixes the gen_atmel_mci driver
to be able to use multi block access for avr32. Therefore remove the setting
which forces single block access.
This also adds a huge performace gain for mmc access:
---8<---
Loading file "/boot/uImage" from mmc device 0:1
1830666 bytes read in 1293 ms (1.3 MiB/s)
--->8---
vs.
---8<---
Loading file "/boot/uImage" from mmc device 0:1
1830666 bytes read in 237 ms (7.4 MiB/s)
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: haavard.skinnemoen@atmel.com
Cc: hans-christian.egtvedt@atmel.com
Cc: mpfj@mimc.co.uk
Cc: alex.raimondi@miromico.ch
Cc: julien.may@miromico.ch
Cc: egtvedt@samfundet.no
Cc: havard@skinnemoen.net
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Remove unused header
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
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Timer is initialized already in board_init_r function in
(common/spl/spl.c) No need to initialize it again
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
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* add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header
* dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
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This patch extends the am335x_evm board for the AM335x IDK.
The IDK board uses MII for the ethernet phy (same as
Beaglebone board) and MMC0 for storage (but without
card detect line).
The IDK uses UART3 for console. So u-boot must be build
with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
the am335x_evm_uart3 board configuration as introduced
by Andrew Bradfords recent patch series "am33xx: Enable
UART {1,2,3,4,5}...". When using the IDK with console on UART0,
those patches are not required. In this case the board
slightly needs to be modified.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
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When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings
currently. Re-order functions so that we don't have that anymore.
Signed-off-by: Tom Rini <trini@ti.com>
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This fixes the following boothang in SPL:
Unknown board, cannot configure pinmux.### ERROR ### Please RESET the board ###
Future commits will add pinmuxes for more on-board peripherals.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
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Signed-off-by: Raphael Assenat <raph@8d.com>
[trini: Squash boards.cfg / MAINTAINERS change into main patch]
Signed-off-by: Tom Rini <trini@ti.com>
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Based on previous work by: Alistair Buxton <a.j.buxton@gmail.com>
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Cc: Ивайло Димитров <freemangordon@abv.bg>
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Add optional support for some ANSI escape sequences to the
cfb_console driver. Define CONFIG_CFB_CONSOLE_ANSI to enable
cursor moving, color reverting and clearing the cfb console
via ANSI escape codes.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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* Code copied from linux kernel 3.0.0 from file include/linux/i2c/twl.h
* commit 6523b148b44be38d89c2ee9865d34da30d9f5f1c
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
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Board can implement function setup_board_tags which is used for adding atags
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
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Add targets of am335x_evm_uart{1,2,3,4,5} to have serial input/output on
UART{1,2,3,4,5} for use with the Beaglebone RS232 cape, am335x_evm
daughterboard, and other custom configurations.
Modify target for am335x_evm to include SERIAL1 and CONS_INDEX=1
options in order to clarify UART selection requirements.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
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Increase the possible number of ns16550 serial devices from 4 to 6.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
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