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* x86: Remove ISR timerSimon Glass2013-05-13-119/+0
| | | | | | | | This is no longer used since we prefer the more accurate TSC timer, so remove the dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Remove old broken timer implementationSimon Glass2013-05-13-21/+1
| | | | | | | | | | | Tidy up some old broken and unneeded implementations. These are not used by coreboot or anything else now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: Michael Spang <spang@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Add TSC timerSimon Glass2013-05-13-4/+113
| | | | | | | | | | | | | | This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Rationalise kernel booting logic and bootstageSimon Glass2013-05-13-12/+12
| | | | | | | | | | The 'Starting linux' message appears twice in the code, but both call through the same place. Unify these and add calls to bootstage to mark the occasion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Michael Spang <spang@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Implement panic output for corebootSimon Glass2013-05-13-0/+11
| | | | | | | | panic_puts() can be called in early boot to display a message. It might help with early debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
* x86: Declare global_data pointer when it is usedSimon Glass2013-05-13-0/+10
| | | | | | | | Several files use the global_data pointer without declaring it. This works because the declaration is currently a NOP. But still it is better to fix this so that x86 lines up with other archs. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Remove legacy board init codeSimon Glass2013-05-13-616/+0
| | | | | | | Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Remove unused portion of link scriptSimon Glass2013-05-13-12/+0
| | | | | | | | Since we don't have real-mode code now, we can remove this chunk of the link script. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Remove unused bios/pci codeSimon Glass2013-05-13-363/+0
| | | | | | | Graeme Russ pointed out that this code is no longer used. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.hGerald Van Baren2013-05-10-2/+3
| | | | | | | The define should not have been put in fdt.h originally, libfdt_env.h is the proper place for target-specific customizations. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
* Added license header to dtc/libfdt/fdt.h and libfdt_env.hJustin Sobota2013-05-10-0/+51
| | | | | | | | | | | | | | | This commit adds a license header to fdt.h and libfdt_env.h because the license was omitted. U-Boot note: the u-boot libfdt_env.h header portion was not applied to the u-boot libfdt_env.h because that file was created by Gerald Van Baren (with a license header). - gvb Ref: DTC commit 27cdc1b1 Signed-off-by: Justin Sobota <jsobota@ti.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
* Fix typoFrançois Revol2013-05-10-1/+1
| | | | | | Ref: DTC commit cc11e522 Signed-off-by: François Revol <revol@free.fr>
* Export fdt_stringlist_contains()Simon Glass2013-05-10-3/+16
| | | | | | | | | This function is useful outside libfdt, so export it. Ref: DTC commit b7aa300e Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Gibson <david@gibson.dropbear.id.au>
* Merge branch 'patman' of git://git.denx.de/u-boot-x86Tom Rini2013-05-10-2/+9
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| * patman: Do not hardcode python pathMichal Simek2013-05-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Patman requires python 2.7.4 to run but it doesn't need to be placed in /usr/bin/python. Use env to ensure that the interpreter used is the first one on environment's $PATH on system with several versions of Python installed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
| * buildman: Allow conflicting tags to avoid spurious errorsSimon Glass2013-05-09-1/+8
| | | | | | | | | | | | | | | | | | | | Conflicting tags can prevent buildman from building two series which exist one after the other in a branch. There is no reason not to allow this sort of workflow with buildman, so ignore conflicting tags in buildman. Change-Id: I2231d04d8684fe0f8fe77f8ea107e5899a3da5e8 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* | openrisc: move board linker script(s) to a common in cpu/Stefan Kristiansson2013-05-10-0/+2
| | | | | | | | | | | | Unifies the openrisc boards linker scripts into a common one. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* | openrisc: specify a memory region for u_boot_listsStefan Kristiansson2013-05-10-1/+1
| | | | | | | | | | | | | | | | Since there are two memory areas defined, vectors and ram, the linker will error when neither of them are specified for a section. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* | fs/ext4: Support device block sizes != 512 bytesEgbert Eich2013-05-10-76/+95
| | | | | | | | | | | | | | | | | | The 512 byte block size was hard coded in the ext4 file systems. Large harddisks today support bigger block sizes typically 4096 bytes. This patch removes this limitation. Signed-off-by: Egbert Eich <eich@suse.com>
* | Fix references to the documentation filesAnatolij Gustschin2013-05-10-43/+43
| | | | | | | | | | | | | | | | | | | | | | | | Many boot image configuration files refer to the appropriate documentation file, but these references contain typos in the directory and file name. Fix them. Also fix reference to doc/README.SPL file. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | env: throw an error when an empty key is usedLucian Cojocar2013-05-09-0/+6
| | | | | | | | | | | | | | | | If the environment contains an entry like "=value" "\0" we should throw an error when parsing the environment. Otherwise, U-Boot will enter in an infinite loop. Signed-off-by: Lucian Cojocar <cojocar@gmail.com>
* | build: Pull -DBUILD_TAG into separate ifdefMarek Vasut2013-05-09-4/+3
|/ | | | | | | | | | | | Currently the base setting for CFLAGS is split in two possibilities, one with -DBUILD_TAG appended at the end and one without, the rest of CFLAGS is the same in both cases. Change this so CFLAGS are always set and the -DBUILD_TAG is appended in separate ifdef. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
* gpio: Add support for microblaze xilinx GPIOMichal Simek2013-05-09-39/+386
| | | | | | | | | | | | | | | | | | | | | | | | Microblaze uses gpio which is connected to the system reset. Currently gpio subsystem wasn't used for it. Add gpio driver and change Microblaze reset logic to be done via gpio subsystem. There are various configurations which Microblaze can have that's why gpio_alloc/gpio_alloc_dual(for dual channel) function has been introduced and gpio can be allocated dynamically. Adding several gpios IP is also possible and supported. For listing gpio configuration please use "gpio status" command This patch also remove one compilation warning: microblaze-generic.c: In function 'do_reset': microblaze-generic.c:38:47: warning: operation on '*1073741824u' may be undefined [-Wsequence-point] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: bootm: Add support for loading initrdMichal Simek2013-05-09-0/+8
| | | | | | | fdt_initrd add additional information to DTB about initrd addresses which are later used by kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: bootm: Fix coding style issuesMichal Simek2013-05-09-9/+11
| | | | | | Prepare place for new patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nds32: Use sections header to obtain link symbolsKuan-Yu Kuo2013-05-08-6/+2
| | | | | | | | Include this header to get access to link symbols, which are otherwise removed. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2013-05-07-39/+187
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| * mmc: fsl_esdhc: Use calloc()Fabio Estevam2013-05-06-2/+1
| | | | | | | | | | | | | | A malloc() followed by memset() can be simply replaced by calloc(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: sdhci: return error when failed add_sdhci().Jaehoon Chung2013-05-06-4/+2
| | | | | | | | | | | | | | | | | | If failed the add_host(), it is reasonable that return value of add_sdhci(). Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * sdhci: Add sdhci support for spear devicesVipin Kumar2013-05-06-0/+45
| | | | | | | | | | | | | | Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * davinci, mmc: Added a delay reading ext CSD registerDavide Bonfanti2013-05-06-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this additional delay, some eMMC don't negotiate properly bus width Tested on: - Toshiba THGBM2G8D8FBAIB - Toshiba THGBM4G4D1HBAR - Micron MTFC4GMVEA (the one giving the problem) - Hynix H26M64002BNR - SanDisk SDIN5E1-32G Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: Split device init to decouple OCR-polling delayChe-Liang Chiou2013-05-06-32/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of time that MMC driver spends on initializing a device is polling OCR (operation conditions register). To decouple this polling loop, device init is split into two parts: The first part fires the OCR query command, and the second part polls the result. So the caller is now no longer bound to the OCR-polling delay; he may fire the query, go somewhere and then come back later for the result. To use this, call mmc_set_preinit() on any device which needs this. This can save significant amounts of time on boot (e.g. 200ms) by hiding the MMC init time behind other init. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | usb: common: Use a global definition for 'min3'Vivek Gautam2013-05-06-14/+21
| | | | | | | | | | | | | | | | | | We can use a common global method for calculating minimum of 3 numbers. Put the same in 'common header' and let 'ehci' use it. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Tom Rini <trini@ti.com>
* | usb: fix: Fixing Port status and feature number constantsVivek Gautam2013-05-06-28/+51
| | | | | | | | | | | | | | Fix the Port status bit constants and Port feature number constants as a part of USB 2.0 and USB 3.0 Hub class. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: hub: Parallelize power-cycling of root-hub portsVivek Gautam2013-05-06-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | Untill now we power-cycle (aka: disable power on a port and re-enabling again) one port at a time. Delay of 20ms for Port-power to change multiplies with number of ports in this case. So better we parallelize this process: disable power on all ports, wait for port-power to stabilize and then re-enable the power subsequently. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | USB: ohci-at91: make OHCI work on at91sam9g10 SoCBo Shen2013-05-05-2/+2
| | | | | | | | | | | | The at91sam9g10 need to configure HCK0 to make OHCI work Signed-off-by: Bo Shen <voice.shen@atmel.com>
* | USB: SS: Add support for Super Speed USB interfaceVivek Gautam2013-05-05-9/+58
| | | | | | | | | | | | | | | | This adds usb framework support for super-speed usb, which will further facilitate to add stack support for xHCI. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: hub: Fix enumration timeoutVivek Gautam2013-05-05-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch b6d7852c increases timeout for enumeration, taking worst case to be 10 sec. get_timer() api returns timestamp in milliseconds, which is what we are checking in the do-while() loop in usb_hub_configure() (get_timer(start) < CONFIG_SYS_HZ * 10). This should give us a required check for 10 seconds, and thereby we don't need to add additional mdelay of 100 microseconds in each cycle. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
* | usb: Update device class in usb device's descriptorVivek Gautam2013-05-05-0/+5
| | | | | | | | | | | | | | | | Fetch the device class into usb device's dwcriptors, so that the host controller's driver can use this info to differentiate between HUB and DEVICE. Signed-off-by: Amar <amarendra.xt@samsung.com>
* | usb: hub: Power-cycle on root-hub portsVivek Gautam2013-05-05-0/+34
| | | | | | | | | | | | | | | | | | XHCI ports are powered on after a H/W reset, however EHCI ports are not. So disabling and re-enabling power on all ports invariably. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | USB: Some cleanup prior to USB 3.0 interface additionVivek Gautam2013-05-05-23/+30
| | | | | | | | | | | | | | Some cleanup in usb framework, nothing much on feature side. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: common: Weed out USB_**_PRINTFs from usb frameworkVivek Gautam2013-05-05-283/+241
| | | | | | | | | | | | | | | | USB_PRINTF, USB_HUB_PRINTF, USB_STOR_PRINTF, USB_KBD_PRINTF are nothing but conditional debug prints, depending on DEBUG. So better remove them and use debug() simply. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: Add new command to set USB 2.0 port test modesJulius Werner2013-05-05-34/+125
| | | | | | | | | | | | | | | | | | This patch adds a new 'usb test' command, that will set a port to a USB 2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes on both downstream hub ports and ordinary device's upstream ports. In addition, it supports EHCI root hub ports. Signed-off-by: Julius Werner <jwerner@chromium.org>
* | USB: EHCI: Add weak functions to support new chipJim Lin2013-05-05-12/+28
|/ | | | | | | Add ehci_get_port_speed() and ehci_set_usbmode() weak functions for platform driver to support new chip. Signed-off-by: Jim Lin <jilin@nvidia.com>
* P1022DS: Set CONFIG_SPL_MAX_SIZE directlyTom Rini2013-05-03-1/+1
| | | | | | | | | With the u-boot-with-spl.bin rule calling $(OBJCOPY) with CONFIG_SPL_PAD_TO, and CONFIG_SPL_PAD_TO defaulting to CONFIG_SPL_MAX_SIZE we cannot use math here, so set it to 4096 rather than 4 * 1024. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-05-02-72/+833
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| * powerpc/85xx: set USB2 default mode to 'device' for (super)hydra boardsShaohui Xie2013-05-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hydra and Superhydra (P3041DS, P5020DS, and P5040DS) boards have a second USB port that can be configured in either host, peripheral (aka device), or OTG (on-the-go) mode. When configured in host mode, if the port is connected to another USB host, damage to the board can occur. To avoid this, we change the default setting to peripheral mode. Ideally, we'd set it to OTG mode, but currently there is no OTG support for these boards. Setting the hwconfig variable will also update the device tree, and so Linux will configure the port for peripheral mode as well. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Timur Tabi <timur@tabi.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PCXu Jiucheng2013-05-02-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is multiplex with QE, so uboot will reserve this pin for QE and skip DDR reset. Other platforms without QE will do this reset. This patch adds a slight code to reset DDR chip by QE CE_PB8 pin for NAND and NOR FLASH boot. For booting from SPI FALSH and SD card, it seems possible to use the rom on chip to write to the GPIO pins before configuring the DDR. Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Changed LIODN offset valuesCristian Sovaiala2013-05-02-30/+30
| | | | | | | | | | | | | | | | | | | | | | Extending LIODN offset range from 1-5 to 1-10 While using a qman portal with a higher index the LIODN offset is incorrectly set, thus extending the range of offsets covers all 10 qman portals Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Acked-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Extend workaround for erratum DDR_A003 to other SoCsYork Sun2013-05-02-0/+3
| | | | | | | | | | | | | | Erratum DDR_A003 applies to P5020, P3041, P4080, P3060, P2041, P5040. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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