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* sunxi: dram: Fix CKE delay handling for sun4i/sun5iSiarhei Siamashka2014-08-12-7/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before driving the CKE pin (Clock Enable) high, the DDR3 spec requires to wait for additional 500 us after the RESET pin is de-asserted. The DRAM controller takes care of this delay by itself, using a configurable counter in the SDR_IDCR register. This works in the same way on sun4i/sun5i/sun7i hardware (even the default register value 0x00c80064 is identical). Except that the counter is ticking a bit slower on sun7i (3 DRAM clock cycles instead of 2), resulting in longer actual delays for the same settings. This patch configures the SDR_IDCR register for all sun4i/sun5i/sun7i SoC variants and not just for sun7i alone. Also an explicit udelay(500) is added immediately after DDR3 reset for extra safety. This is a duplicated functionality. But since we don't have perfect documentation, it may be reasonable to play safe. Half a millisecond boot time increase is not that significant. Boot time can be always optimized later. Preferebly by the people, who have the hardware equipment to check the actual signals on the RESET and CKE lines and verify all the timings. The old code did not configure the SDR_IDCR register for sun4i/sun5i, but performed the DDR3 reset very early for sun4i/sun5i. This resulted in a larger time gap between the DDR3 reset and the DDR3 initialization steps and reduced the chances of CKE delay timing violation to cause real troubles. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: dram: Respect the DDR3 reset timing requirementsSiarhei Siamashka2014-08-12-2/+7
| | | | | | | | | | | | | | The RESET pin needs to be kept low for at least 200 us according to the DDR3 spec. So just do it the right way. This issue did not cause any visible major problems earlier, because the DRAM RESET pin is usually already low after the board reset. And the time gap before reaching the sunxi u-boot DRAM initialization code appeared to be sufficient. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: dram: Remove broken super-standby remnantsSiarhei Siamashka2014-08-12-46/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | If the dram->ppwrsctl (SDR_DPCR) register has the lowest bit set to 1, this means that DRAM is currently in self-refresh mode and retaining the old data. Since we have no idea what to do in this situation yet, just set this register to 0 and initialize DRAM in the same way as on any normal reboot (discarding whatever was stored there). This part of code was apparently used by the Allwinner boot0 bootloader to handle resume from the so-called super-standby mode. But this particular code got somehow mangled on the way from the boot0 bootloader to the u-boot-sunxi bootloader and has no chance of doing anything even remotely sane. For example: 1. in the original boot0 code we had "mctl_write_w(SDR_DPCR, 0x16510000)" (write to the register) and in the u-boot it now looks like "setbits_le32(&dram->ppwrsctl, 0x16510000)" (set bits in the register) 2. in the original boot0 code it was issuing three commands "0x12, 0x17, 0x13" (Self-Refresh entry, Self-Refresh exit, Refresh), but in the u-boot they have become "0x12, 0x12, 0x13" (Self-Refresh entry, Self-Refresh entry, Refresh) Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: dram: Remove useless 'dramc_scan_dll_para()' functionSiarhei Siamashka2014-08-12-124/+1
| | | | | | | | | | | | | | | | | | | | The attempt to do DRAM parameters calibration in 'dramc_scan_dll_para()' function by trying different DLL adjustments and using the hardware DQS gate training result as a feedback is a great source of inspiration, but it just can't work properly the way it is implemented now. The fatal problem of this implementation is that the DQS gating window can be successfully found for almost every DLL delay adjustment setup that gets tried. Thus making it unable to see any real difference between 'good' and 'bad' settings. Also this code was supposed to be only activated by setting the highest bit in the 'dram_tpr3' variable of the 'dram_para' struct (per-board dram configuration). But none of the linux-sunxi devices has ever used it for real. Basically, this code is just a dead weight. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add environment settings to make extlinux.conf booting workHans de Goede2014-08-12-3/+39
| | | | | | | | | | | | Automatic booting using an extlinux.conf file requires various environment variables to be set. Also modify CONFIG_SYS_LOAD_ADDR and CONFIG_STANDALONE_LOAD_ADDR to match the value chosen for kernel_addr_r, see the added comment for why the new value is chosen. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* sunxi-common.h: Use new generic $bootcmdHans de Goede2014-08-12-3/+22
| | | | | | | Use the new standard bootcmd from <config_distro_bootcmd.h>. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* config: introduce a generic $bootcmdDennis Gilmore2014-08-12-0/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This generic $bootcmd, and associated support macros, automatically searches a defined set of storage devices (or network protocols) for an extlinux configuration file or U-Boot boot script in various standardized locations. Distros that install such a boot config file/script in those standard locations will get easy-to-set-up booting on HW that enables this generic $bootcmd. Boards can define the set of devices from which boot is attempted, and the order in which they are attempted. Users may later customize this set/order by edting $boot_targets. Users may interrupt the boot process and boot from a specific device simply by executing e.g.: $ run bootcmd_mmc1 or: $ run bootcmd_pxe This patch was originally written by Dennis Gilmore based on Tegra and rpi_b boot scripts. I have made the following modifications since then: * Boards must define the BOOT_TARGET_DEVICES macro in order to specify the set of devices (and order) from which to attempt boot. If needed, we can define a default directly in config_distro_bootcmd.h. * Removed $env_import and related variables; nothing used them, and I think it's better for boards to pre-load an environment customization file using CONFIG_PREBOOT if they need. * Renamed a bunch of variables to suit my whims:-) Signed-off-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* sunxi: Kconfig: move common settings into a shared code blockHans de Goede2014-08-12-26/+6
| | | | | | | | SYS_CPU, SYS_BOARD and SYS_SOC are identical for all sunxi boards, move them to a shared code block. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi-common.h: Don't undef CONFIG_CMD_NET only to redefine it again laterHans de Goede2014-08-12-3/+1
| | | | | | | | | | | | config_distro_defaults.h which is include later will redefine CONFIG_CMD_NET, drop the useless / meaningless undef of it. While at also move the undef of CONFIG_CMD_FPGA up to directly under the include of config_cmd_defaults.h, to make it clear that it overwrites the setting done from config_cmd_defaults.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi-common.h: Don't undefine CONFIG_CMD_NFSHans de Goede2014-08-12-1/+0
| | | | | | | | I see no reason to override the choice to include this from config_cmd_defauls.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi-common.h: Remove dead #ifdef CONFIG_CMD_NET code blockHans de Goede2014-08-12-8/+0
| | | | | | | | | We undef CONFIG_CMD_NET at line 167, and there is nothing re-defining it between line 167 and the #ifdef CONFIG_CMD_NET, so remove this effectively dead block. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi-common.h: Remove CONFIG_SYS_BOOT_GET_CMDLINEHans de Goede2014-08-12-2/+0
| | | | | | | | sunxi does not need this and it should never have been enabled for it in the first place. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-08-09-13/+982
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| * sun7i: Add bananapi boardHans de Goede2014-07-31-0/+37
| | | | | | | | | | | | | | | | | | | | | | The Banana Pi is an A20 based development board using Raspberry Pi compatible IO headers. It comes with 1 GB RAM, 1 Gb ethernet, 2x USB host, sata, hdmi and stereo audio out + various expansion headers: http://www.lemaker.org/ Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: HYP/non-sec: configure CNTFRQ on all CPUsMarc Zyngier2014-07-31-0/+1
| | | | | | | | | | | | | | | | | | | | CNTFRQ needs to be properly configured on all CPUs. Otherwise, virtual machines hoping to find valuable information on secondary CPUs will be disapointed... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: HYP/non-sec: add sun7i PSCI backendMarc Zyngier2014-07-31-0/+171
| | | | | | | | | | | | | | | | | | So far, only supporting the CPU_ON method. Other functions can be added later. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sun7i: Add support for a number of new sun7i boardsHans de Goede2014-07-31-0/+118
| | | | | | | | | | | | | | | | | | | | Add support for boards which I own and which already have a dts file in the upstream kernel. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun5i: Add support for a number of new sun5i boardsHans de Goede2014-07-31-0/+81
| | | | | | | | | | | | | | | | | | | | Add support for boards which I own and which already have a dts file in the upstream kernel. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun4i: Add support for a number of new sun4i boardsHans de Goede2014-07-31-2/+193
| | | | | | | | | | | | | | | | | | | | Add support for boards which I own and which already have a dts file in the upstream kernel. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Add CONFIG_MACPWR optionHans de Goede2014-07-31-0/+5
| | | | | | | | | | | | | | | | On some boards the ethernet-phy needs to be powered up through a gpio, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Enable EHCI on various sunxi boardsHans de Goede2014-07-31-5/+5
| | | | | | | | | | | | | | | | Most sunxi boards have the EHCI controller hooked up, enable it on all relevant boards. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun5i: add USB EHCI settingsHans de Goede2014-07-31-0/+5
| | | | | | | | | | | | | | | | | | | | Specific USB EHCI settings to be set for sun5i if CONFIG_USB_EHCI is enabled. Note we don't specify default VBUS gpio pins for sun5i since they vary too much from board to board. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun4i: add USB EHCI settingsHans de Goede2014-07-31-0/+12
| | | | | | | | | | | | | | Specific USB EHCI settings to be set for sun4i if CONFIG_USB_EHCI is enabled. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * cubieboard2: Enable AXP209 power controllerIan Campbell2014-07-31-2/+2
| | | | | | | | | | | | Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sun7i: cubietruck: enable USB EHCIRoman Byshko2014-07-31-2/+2
| | | | | | | | | | | | | | | | | | | | Cubietruck has two USB host controllers. This makes them usable by enabling the EHCI driver for them. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Also enable ehci for Cubietruck_FEL] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sun7i: add USB EHCI settingsRoman Byshko2014-07-31-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Specific USB EHCI settings to be set for sun7i if CONFIG_USB_EHCI is enabled. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Use SUNXI_GPH macro for SUNXI_USB_VBUS#_GPIO] [hdegoede@redhat.com: Add #ifndef SUNXI_USB_VBUS#_GPIO to allow override of the default pins from boards.cfg] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: add general USB settingsRoman Byshko2014-07-31-0/+6
| | | | | | | | | | | | | | | | | | | | General configuration settings to be set if CONFIG_USB_EHCI is enabled for an Allwinner aka sunxi SoC. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: add USB EHCI driverRoman Byshko2014-07-31-0/+202
| | | | | | | | | | | | | | | | | | The Allwinner aka sunxi SoCs have one or more USB host controllers. This adds a driver for their EHCI. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: add defines to control USB Host clocks/resetsRoman Byshko2014-07-31-0/+4
| | | | | | | | | | | | | | | | | | | | | | The commit adds three defines which will be used in the EHCI driver to enable USB clock and assert reset controllers of the corresponding PHYs. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * ahci: provide sunxi SATA driver using AHCI platform frameworkIan Campbell2014-07-31-9/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The PHY setup is derived from the Alwinner releases and Linux, but is mostly undocumented. The Allwinner AHCI controller also requires some magic (and, again, undocumented) DMA initialisation when starting a port. This is added under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Prepare v2014.10-rc1Tom Rini2014-08-06-2/+2
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | Change Andy Fleming's email addressAndy Fleming2014-08-06-5/+5
| | | | | | | | | | | | | | Messages to afleming@freescale.com now bounce, and should be directed to my personal address at afleming@gmail.com Signed-off-by: Andy Fleming <afleming@gmail.com>
* | The _config target is not present anymore, mention _defconfig insteadHolger Freyther2014-08-06-11/+11
| | | | | | | | | | The _config part is gone for sure, the _defconfig target could at least work. I have not verified this for all targets though.
* | git-mailrc: add a kconfig aliasStephen Warren2014-08-06-0/+2
| | | | | | | | | | | | | | | | It's easier to Cc Masahiro on Kconfig-related changes with a git-mailrc alias. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | doc: README.SPL: adjust for Kbuild and KconfigMasahiro Yamada2014-08-06-22/+6
| | | | | | | | | | | | Reflect the latest build system to doc/README.SPL. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | doc: delete README.ARM-SoCMasahiro Yamada2014-08-06-31/+0
| | | | | | | | | | | | This document is too old and useless. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-08-06-8/+31
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| * | spi, spi_mxc: do not hang in spi_xchg_singleHeiko Schocher2014-08-06-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | spi: Support half-duplex mode in FDT decodeSimon Glass2014-08-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This parameter should also be supported. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | exynos: spi: Fix calculation of SPI transaction start timeSimon Glass2014-08-06-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI transaction delay is supposed to be measured from the end of one transaction to the start of the next. The code does not work that way, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | cros_ec: Fix two bugs in the SPI implementationSimon Glass2014-08-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An incorrect message version is passed to the EC in some cases and the parameters of one function are switched. Fix these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: sf_ops: Stop leaking memoryMarek Vasut2014-08-06-0/+1
| |/ | | | | | | | | | | | | | | | | It's usually a common pattern to free() the memory that we allocated. Implement this here to stop leaking memory. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-08-06-1/+83
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| * | kmp204x: prepare to use CPU watchdogBoschung, Rainer2014-08-01-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch configures the qrio to trigger a core reset on a CPU reset request. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | kmp204x/qrio: support for setting the CPU reset request modeBoschung, Rainer2014-08-01-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN flag in the qrio RESCNF reg is added. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | kmp204x: set CPU watchdog reset reason flagBoschung, Rainer2014-08-01-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the core timer status register (TSR) for watchdog reset, and and set the QRIO's reset reason flag REASON1[0] accordingly. This allows the appliction SW to identify the cpu watchdog as a reset reason, by setting the REASON1[0] flag in the QRIO. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | kmp204x/qrio: prepare support for the CPU watchdog reset reasonBoschung, Rainer2014-08-01-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog flag in the REASON1 reg is added. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | kmp204x: CPU watchdog enabledBoschung, Rainer2014-08-01-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The booting of the board is now protected by the CPU watchdog. A failure during the boot phase will end up in board reset. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc: mpc85xx watchdog init added to init_funcBoschung, Rainer2014-08-01-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_WATCHDOG is defined the board initialization just performs a WATCHDOG_RESET, an initialization of the watchdog is not done. This has been modified fot the MPC85xx, the board initialization calls its watchdog initialitzation allowing for full watchdog configuration very early in the boot phase. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | mpc85xx: watchdog initialisation addedBoschung, Rainer2014-08-01-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Function to inititialize the cpu watchdog added. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> [York Sun: Add prototype in watchdog.h] Reviewed-by: York Sun <yorksun@freescale.com>
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