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| * | | | MIPS: If we don't need DDR for cache init, init cache firstPaul Burton2016-09-21-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On systems where cache initialisation doesn't require zeroed memory (ie. systems where CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD is not defined) perform cache initialisation prior to lowlevel_init & DDR initialisation. This allows for DDR initialisation code to run cached & thus significantly faster. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | MIPS: Preserve Config implementation-defined bitsPaul Burton2016-09-21-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The coprocessor 0 Config register includes 9 implementation defined bits, which in some processors do things like enable write combining or other functionality. We ought not to wipe them to 0 during boot. Rather than doing so, preserve their value & only clear the bits standardised by the MIPS architecture. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | MIPS: Enable use of the instruction cache earlierPaul Burton2016-09-21-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable use of the instruction cache immediately after it has been initialised. This will only take effect if U-Boot was linked to run from kseg0 rather than kseg1, but when this is the case the data cache initialisation code will run cached & thus significantly faster. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | MIPS: Probe cache line sizes once during bootPaul Burton2016-09-21-18/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than probing the cache line sizes on every call of any cache maintenance function, probe them once during boot & store the values in the global data structure for later use. This will reduce the overhead of the cache maintenance functions, which isn't a big deal yet but becomes more important once L2 caches which may expose their properties via coprocessor 2 or the CM are supported. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | MIPS: ath79: Use mach_cpu_init instead of arch_cpu_initPaul Burton2016-09-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to prepare for MIPS arch code making use of arch_cpu_init in a later patch, stop using it from ath79 SoC code & instead use the new mach_cpu_init which is provided for this purpose. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | board_f: Add a mach_cpu_init callbackPaul Burton2016-09-21-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we have a mismash of architectures which use arch_cpu_init from architecture-wide code (arc, avr32, blackfin, mips, nios2, xtensa) and architectures which use arch_cpu_init from machine/SoC level code (arm, x86). In order to clean this mess up & allow for both use cases, introduce a new mach_cpu_init callback which is run immediately after arch_cpu_init. This will allow for architectures to have arch-wide code without needing individual machines to all implement their own arch_cpu_init with a call to some common function. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | mips: Add MIPSfpga platform supportZubair Lutfullah Kakakhel2016-09-21-0/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPSfpga is an FPGA based dev platform. In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks The FPGA dev board used is the Nexys4DDR board by Digilent. For more information, check the Readme file in board/imgtec/xilfpga Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | mips: xilfpga: Add device tree filesZubair Lutfullah Kakakhel2016-09-21-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly the same as the Kernel upstream device tree file except for - alias for the serial console node - ethernet node as the ethernet stuff isn't upstream on kernel.org yet - uart clock-frequency passed directly in the node Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | net: emaclite: Enable driver for MIPSZubair Lutfullah Kakakhel2016-09-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | | net: emaclite: use __raw_readl/writel instead of weird defineZubair Lutfullah Kakakhel2016-09-21-41/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | out_be32 and in_be32 are actually #defined to little endian writel/readl in arch/microblaze. Just use __raw_writel/readl instead. That is also what is used in the Linux kernel driver for this IP block Tested on MIPSfpga. Can tftp a kernel. Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | | net: emaclite: Use ioremap_nocacheZubair Lutfullah Kakakhel2016-09-21-1/+3
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Virtual to physical mapping isn't necessarily 1:1 for all architectures Using ioremap_nocache allows for the arch code to translate the physical address to a virtual address. Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | Merge branch 'master' of http://git.denx.de/u-boot-mmcTom Rini2016-09-21-52/+164
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| * | | mmc: dw_mmc: push/pop all FIFO data if any data requestJacob Chen2016-09-21-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When DTO interrupt occurred, there are any remaining data still in FIFO due to RX FIFO threshold is larger than remaining data. It also causes that dwmmc didn't trigger RXDR interrupt, so is TX. It's responsibility of driver to read remaining bytes on seeing DTO interrupt. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
| * | | mmc: sdhci: Add the programmable clock mode supportWenyou Yang2016-09-20-10/+42
| | | | | | | | | | | | | | | | | | | | | | | | Add the programmable clock mode for the clock generator. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * | | mmc: sd: optimize erasePeng Fan2016-09-20-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To SD, there is no erase group, then the value erase_grp_size will be default 1. When erasing SD blocks, the blocks will be erased one by one, which is time consuming. We use AU_SIZE as a group to speed up the erasing. Erasing 4MB with a SD2.0 Card with AU_SIZE 4MB. `time mmc erase 0x100000 0x2000` time: 44.856 seconds (before optimization) time: 0.335 seconds (after optimization) Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stephen Warren <swarren@nvidia.com>
| * | | mmc: sd: extracting erase related information from sd statusPeng Fan2016-09-20-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add function to read SD_STATUS information. According to the information, get erase_timeout/erase_size/erase_offset. Add a structure sd_ssr to include the erase related information. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stephen Warren <swarren@nvidia.com>
| * | | mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_MAX_TIMEOUTMasahiro Yamada2016-09-20-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need for per-SoC adjustment for this parameter. It should be determined by the slowest hardware. Currently, no board overrides this CONFIG, so 3.2 sec is large enough. (If not, we can make it even larger.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_DEFAULT_TIMEMasahiro Yamada2016-09-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CONFIG is not configurable since it is not guarded by #ifndef. Nobody has complained about that, so there is no need to keep it as a CONFIG option. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | mmc: sdhci: move SDMA capability check to sdhci_setup_cfg()Masahiro Yamada2016-09-20-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_BLK is enabled, add_sdhci() is never called. Move this quirk handling to sdhci_setup_cfg(), which is now the central place for hardware capability checks. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | mmc: sdhci: move broken voltage quirk handling to sdhci_setup_cfg()Masahiro Yamada2016-09-20-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_BLK is enabled, add_sdhci() is never called. Move this quirk handling to sdhci_setup_cfg(), which is now the central place for hardware capability checks. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | mmc: sdhci: move error message to more relevant placeMasahiro Yamada2016-09-20-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "Hardware doesn't specify base clock frequency" may not be only the error case of sdhci_setup_cfg(). It is better to print this where the corresponding error is triggered. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | mmc: sdhci: move sdhci_reset() call to sdhci_init()Masahiro Yamada2016-09-20-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_BLK is enabled, add_sdhci() is never called. So, sdhci_reset() is not called, either. This is a problem for my board as it needs the reset to start from a sane state. Move the add_sdhci() call to sdhci_init(), which is visited by both of the with/without CONFIG_BLK cases. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2016-09-20-243/+882
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| * | | dtoc: Add methods for reading data from propertiesSimon Glass2016-09-18-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide easy helpers for reading integer, string and boolean values from device-tree properties. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Correct quotes in fdt_utilSimon Glass2016-09-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The style is to use single quotes for strings where possible. Adjust this function. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Support finding the offset of a propertySimon Glass2016-09-18-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a way to find the byte offset of a property within the device tree. This is only supported with the normal libfdt implementation since fdtget does not provide this information. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Support packing the device treeSimon Glass2016-09-18-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After any node/property deletion the device tree can be packed to remove spare space. Add a way to perform this operation. Note that for fdt_fallback, fdtput automatically packs the device tree after deletion, so no action is required here. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Support deleting device tree propertiesSimon Glass2016-09-18-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for deleting a device tree property. With the fallback implementation this uses fdtput. With libfdt it uses the API call and updates the offsets afterwards. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move to using bytearraySimon Glass2016-09-18-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we want to be able to change the in-memory device tree using libfdt, use a bytearray instead of a string. This makes interfacing from Python easier. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Prepare for supporting changing of device treesSimon Glass2016-09-18-4/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For binman we need to support deleting properties in the device tree. This will change the offsets of nodes after the deletion. In preparation, add code to keep track of when the offsets are invalid, and regenerate them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Drop the convert_dash parameter to GetProps()Simon Glass2016-09-18-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is not used anywhere in dtoc, so drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Allow the device tree to be compiled from sourceSimon Glass2016-09-18-2/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a source device tree is provide to the Fdt() constructors, compile it automatically. This will be used in tests, where we want to build a particular test .dts file and check that it works correctly in binman. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | patman: Add a library to handle logging and progressSimon Glass2016-09-18-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When tools want to display information of varying levels of importance, it helps to provide the user with control over the verbosity of these messages. Progress messages work best if they are displayed and then removed from the display when no-longer relevant. Add a new tout library (terminal out) to handle these tasks. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | patman: Add a tools library for using temporary filesSimon Glass2016-09-18-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For tools which want to use input files and temporary output, it is useful to have the handling of these dealt with in one place. Add a new library which allows input files to be read, and output files to be written, all based on a common directory structure. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move a few more common functions into fdt.pySimon Glass2016-09-18-32/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions have the same code in the subclasses. Move these into the superclass to avoid duplication. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move Widen() and GetPhandle() into the base classSimon Glass2016-09-18-83/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are identical in both subclasses. Move them into the base class. Note: In fact there is a bug in one version, which was fixed by this patch: https://patchwork.ozlabs.org/patch/651697/ Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move BytesToValue() and GetEmpty() into PropBaseSimon Glass2016-09-18-79/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are currently in a separate fdt_util file. Since they are only used from PropBase and subclasses, it makes sense for them to be in the PropBase class. Move these functions into fdt.py along with the list of types. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Create a base class for FdtSimon Glass2016-09-18-48/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we have two separate implementations of the Fdt library, one which uses fdtget/fdtput and one which uses libfdt (via swig). Before adding more functionality it makes sense to create a base class for these. This will allow common functions to be shared, and make the Fdt API a little clearer. Create a new fdt.py file with the base class, and adjust fdt_normal.py and fdt_fallback.py to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Rename fdt.py to fdt_normal.pySimon Glass2016-09-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for creating an Fdt base class, rename this file to indicate it is the normal Fdt implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move the fdt library selection into fdt_selectSimon Glass2016-09-18-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than have dtc worry about which fdt library to use, move this into a helper file. Add a function which creates a new Fdt object and scans it, regardless of the implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move the struct import into the correct orderSimon Glass2016-09-18-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | This should be in with the other system includes. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | patman: Adjust command.Output() to raise an error by defaultSimon Glass2016-09-18-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more useful to have this method raise an error when something goes wrong. Make this the default and adjust the few callers that don't want to use it this way. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Add "host size" hostfs command for fs testStefan Brüns2016-09-18-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This complements the size/fatsize/ext4size commands added in commit cf6598193aed5de8855eaf70c1994f2bc437255a load, save and ls are already implemented for hostfs, now tests can cover the same operations on hostfs and emulated block devices. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: document support of block device emulationStefan Brüns2016-09-18-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org> Changed 'Sandbox' to 'sandbox' in subject: Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | PowerPC: Update last users of CONFIG_ISO_STRING to KconfigTom Rini2016-09-20-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a few boards that use CONFIG_ISO_STRING as part of a sanity check during firmware update at run time. Move this string to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | PowerPC: Update MIP405/MIP405T to use Kconfig betterTom Rini2016-09-20-45/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config There are two boards, MIP405 and MIP405T that have a few differences. Start by checking for CONFIG_TARGET_MIP405. Then introduce CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert also convert the usage of CONFIG_ISO_STRING to be based on Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | Kconfig: Move config IDENT_STRING to KconfigSiva Durga Prasad Paladugu2016-09-20-239/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the config IDENT_STRING to Kconfig and migrate all boards [sivadur: Migrate zynq boards] Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [trini: Update configs, add some default to sunxi Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | configs: Re-syncTom Rini2016-09-20-92/+85
| |/ / |/| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"Masahiro Yamada2016-09-19-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892. I took a closer look at this after the commit was applied, and found CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is actually too big for some boards. Perhaps 0x800 is enough, but the situation varies board by board. Let's postpone our decision until we come up with a better idea. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | A20-OLinuXino-Lime2: Enable USB gadget supportTom Rini2016-09-19-0/+8
|/ / | | | | | | | | | | | | Based on A13-OLinuXino, enable DFU and UMS support. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
generated by cgit v1.1 at 2024-11-08 20:48:52 +0000