| Commit message (Collapse) | Author | Age | Lines |
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* Fix: return value of get_tbclk
* this fixes issue with prematurely restart/retry, if BOOT_RETRY_TIMEOUT is used
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
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Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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convert the board to the new soc architecture
update default config
i2c upgrade taken from eb_cpux9k2.h & board/BuS/eb_cpux9k2/cpux9k2.c
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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There was an redesign, so USB is available now.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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* convert meesc board to use c stucture SoC access
* change gpio access to at91_gpio syntax
* moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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Autodetection is undesired now
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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Typically we declare the name of gpio structure to "gpio",
so it was duplicated around the name. (e.g: gpio->gpio_a)
This patch modified the naming that is removing "gpio_".
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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New line is unnecessary at last line of macro.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Use the same configuration around S5P SoCs.
(s5pc100, s5pc110, s5pc210 and so on)
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch fixed the size of mmc structure.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Because of these are common files around s5p Socs, rename from s5pc1xx to s5p.
And getting cpu_id is SoC specific, so move to SoC's header file.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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This patch adds basic support for s5pc210.
s5p-common will be used by all of s5p SoCs.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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base address
This patch is intended to prepare the other S5P SoC. (s5pc210)
If use SoC specific defines then can't share with other SoC.
So, make the accessor functions for access the base address by common way.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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Use the standard debug macro instead of the costom macro
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Fixed kw_winctrl_calcsize() off-by-1 bug which caused mapping
windows size to be cut by half.
This corrected all windows address configuration
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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Fix orion5x_winctrl_calcsize() off-by-1 bug which caused mapping
windows to be cut by half. This afected all windows including NOR
flash (causing half the flash to be unaccessible) but DRAM was and
still is fine as its size is determined otherwise.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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The OMAP3 block read function is not following API and always returning
1 instead of read block count, fix it. Also to simplify code, merge it
with with a helper function, which was only called from the block read
function.
After this patch ext2 filesystem can be used properly.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Make driver local variables and functions static and
remove them from the arch header.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch adds support for the jadecpu board using the
MB86R01 'Jade' SoC from Fujitsu.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
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This patch adds support for the display controller in
the MB86R0x SoCs.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Matthias Weisser <weisserm@arcor.de>
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commit 47e26b1b "cmd_usage(): simplify return code handling" caused
the following compile warnings:
bedbug_860.c: In function 'bedbug860_do_break':
bedbug_860.c:73: warning: 'return' with a value, in function returning void
bedbug_860.c:121: warning: 'return' with a value, in function returning void
Fix the return type.
Actually these files could need some cleanup - commands should
return proper error codes, and there are coding style issues.
=> To be fixed later.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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From the document, if set all arguments in "OUTPUT_FORMAT" to
"tradbigmips", then even add "-EL" to gcc we still get EB format.
pb1x00 is only used in Little-endian, so its default endian should be
set to LE.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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We need to invalidate the data cache after it has been used as init-ram.
This problem was detected on the lwmon5 update.
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).
Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.
Also, a few empty lines are added to make the code better readable.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Rupjyoti Sarmah <rsarmah@amcc.com>
Cc: Victor Gallardo <vgallardo@appliedmicro.com>
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Opps, after a long time I tested recent u-boot on our
APC405 board. This simple fix makes networking work again.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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SH did not support do_bdinfo fuction.
This code based avr32 stuff.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix data size.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Update data address size and fix typo of register.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc
didn't generate correct code when the reset vector is passed as a
constant. It just generated a direct "call", which was wrong when
the reset vector was not located in the same 256MB span as u-boot.
The "Nios II Processor Reference Handbook" said,
"call can transfer execution anywhere within the 256 MByte range
determined by PC31..28. The Nios II GNU linker does not automatically
handle cases in which the address is out of this range."
So we have to use registered "callr" instruction to do the job.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
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We should check argv[3] only if there are enough args. Otherwise,
it might cause invalid memory access fault.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
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