summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
| * usb: gadget: f_thor: Allocate request up to THOR_PACKET_SIZESiva Durga Prasad Paladugu2015-09-07-1/+1
| | | | | | | | | | | | | | | | | | | | Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket as the descriptors data depend on the number of descriptors and this 64 bytes were not enough and the buffer might overflow which results in memalign failures later. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * f_thor: Dont perform reset at the end of thorSiva Durga Prasad Paladugu2015-09-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Dont perform reset at the end of thor download if configured to do reset off. Reset may not be required in all cases and hence provided an option to do so. The case would be to download the images to DDR instead of flash device. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * implement Fastboot via USB OTG on bcm28155_ap boardsJiandong Zheng2015-09-07-0/+19
| | | | | | | | | | Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-09-07-31/+4851
|\ \
| * | net: altera_tse: Zap unused variableMarek Vasut2015-09-04-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Zap variable which is set but never used. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Thomas Chou <thomas@wytron.com.tw>
| * | arm: socfpga: Add support for the Terasic DE-0 Atlas boardDinh Nguyen2015-09-04-0/+1567
| | | | | | | | | | | | | | | | | | | | | Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is also supported. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Add support for DENX MCV SoM and MCVEVK boardMarek Vasut2015-09-04-0/+1578
| | | | | | | | | | | | | | | | | | | | | | | | Add support for DENX MCV SoM, which is CycloneV based and the associated DENX MCVEVK baseboard. The board can boot from eMMC. Ethernet and USB is supported. Signed-off-by: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Add support for Terasic SoCkit boardMarek Vasut2015-09-04-0/+1622
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Terasic SoCkit, which is CycloneV based board. The board can boot either from SD/MMC or QSPI. Ethernet is also supported. Signed-off-by: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Do not call board_init_r() from board_init_f()Marek Vasut2015-09-04-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of calling board_init_r() directly from board_init_f(), just return from board_init_f(). This will make the code continue executing in crt0.S _main(), from which the board_init_r() is called. This patch aligns the SoCFPGA SPL with the correct SPL design as well as reduces the stack utilisation slightly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Zap OF_CONTROL checks, it's always enabledMarek Vasut2015-09-04-4/+3
| | | | | | | | | | | | | | | | | | | | | The CONFIG_OF_CONTROL and CONFIG_SPL_OF_CONTROL is always enabled on Altera SoCFPGA, remove the unnecessary checks. Signed-off-by: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Always enable OF_CONTROL and SPL_OF_CONTROLMarek Vasut2015-09-04-0/+2
| | | | | | | | | | | | | | | | | | | | | The SoCFPGA probes mostly from OF and the OF is mandatory both in U-Boot itself and U-Boot SPL. Enable it by default. Signed-off-by: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Assure ISWGRP 0 and 1 are initedMarek Vasut2015-09-04-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fix makes sure that the ISWGRP0 and ISWGRP1 registers are correctly inited. In case those registers are not initialized, it is not possible to access the registers synthesised in the FPGA through the bridges. Any such access produces data abort. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | mmc: dw_mmc: Probe the MMC from OFMarek Vasut2015-09-04-22/+72
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
* | arc: make AXS101 default platformAlexey Brodkin2015-09-07-4/+3
|/ | | | | | | | | | | | | | | | | | This fixes building in automated flow that doesn't use defconfigs. See discussion on that topic here: http://patchwork.ozlabs.org/patch/502558/ See similar patches for other architectures/platforms here: [1] http://git.denx.de/?p=u-boot.git;a=commit;h=ff560a13056a565a4e9ce1761bd04276a3cace88 [2] http://git.denx.de/?p=u-boot.git;a=commit;h=589907e2c187ec69b351c38ccda36730d25ab5d6 And while at it add missing shell prompt to axs103. Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* doc: document the fdtdir PXE commandStefan Brüns2015-09-03-0/+7
| | | | Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
* doc: Fix inconsistent filename in PXE config exampleStefan Brüns2015-09-03-1/+1
| | | | | | The default config includes base.menu, not linux.list Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2015-09-03-42/+11350
|\
| * rockchip: Put README image creation commands on one lineSimon Glass2015-09-02-3/+5
| | | | | | | | | | | | | | It is easier to paste these into the command line if they are a single common. Use line continuation instead of separate lines. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Update todo in README.rockchipSjoerd Simons2015-09-02-1/+0
| | | | | | | | | | | | | | | | MMC support works now, so it can be dropped from the todo Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Drop first 32kb of zeros from the rkSD image typeSjoerd Simons2015-09-02-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of creating a rockchip SPL SD card image with 32KB of zeros which can be written to the start of an SD card, create the images with only the useful data that should be written to an offset of 32KB on the SD card. The first 32 kilobytes aren't needed for bootup and only serve as convenient way of accidentally obliterating your partition table. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * arm: Turn of d-cache before i-cacheSjoerd Simons2015-09-02-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting the kernel fails on RK3288 (and probably other rockchip SoCs) when the i-cache is disabled/flushed before d-cache. I have not investigated whether this is due to U-Boot hanging or whether it's very early in the linux boot, but following the approach of the various rockchip U-Boot forks (first disable d-cache then i-cache) makes things work. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add config_distro_bootcmd supportSjoerd Simons2015-09-02-0/+21
| | | | | | | | | | | | | | | | | | | | | | Now that MMC works in U-Boot add config distro command support to start Linux in a standard fashion. One oddity here is that linux fails to load when the fdt is relocated to above 512MB, so set fdt_high to make sure it's loaded below that. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Turn off CONFIG_SPL_LED for fireflySjoerd Simons2015-09-02-1/+0
| | | | | | | | | | | | | | | | | | | | With LED support enabled the SPL easily goes over the size limit (e.g. with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support in the SPL to reduce the size just enough for those compilers. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Tweaked commit subject to remove _SUPPORT Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Disable sdio mmc slot on rk3288-fireflySjoerd Simons2015-09-02-1/+1
| | | | | | | | | | | | | | | | | | U-Boot can't use the sdio card so turn it of to prevent things getting confused/struck when trying to use the card as storage. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * mmc: Probe DM based mmc devices in u-bootSjoerd Simons2015-09-02-4/+39
| | | | | | | | | | | | | | | | | | During mmc initialize probe all devices with the MMC Uclass if build with CONFIG_DM_MMC Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * doc: Fix reference to Rock pro when Rock 2 is meantSjoerd Simons2015-09-02-3/+3
| | | | | | | | | | | | | | | | | | | | | | The Radxa Rock pro board is rk3188 based and thus won't work with U-Boot built for RK3288. Change the documentation to refer to the intended board, the Radxa Rock 2, which is an RK3288-based design very similar to the firefly Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add a simple READMESimon Glass2015-09-02-0/+246
| | | | | | | | | | | | Add a few notes on how to try out the Rockchip support so far. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add basic support for jerrySimon Glass2015-09-02-2/+1370
| | | | | | | | | | | | This builds and displays an SPL message, but does not function beyond that. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add basic support for firefly-rk3288Simon Glass2015-09-02-0/+733
| | | | | | | | | | | | | | | | | | | | | | The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add SPI driverSimon Glass2015-09-02-0/+527
| | | | | | | | | | | | | | Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add I2C driverSimon Glass2015-09-02-0/+471
| | | | | | | | | | | | | | Add an I2C driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add core SoC start-up codeSimon Glass2015-09-02-0/+432
| | | | | | | | | | | | | | Add code for starting up U-Boot SPL and U-Boot proper. This is generic and makes use of devices provided by the board- or SoC-specific code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add an MMC driverSimon Glass2015-09-02-0/+108
| | | | | | | | | | | | | | Add an MMC driver which supports RK3288, but may also support other SoCs. It uses the Designware MMC device. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add SDRAM initSimon Glass2015-09-02-0/+1455
| | | | | | | | | | | | | | | | | | Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses device tree for configuration so should be able to support other RAM configurations. It may be possible to generalise the code to support other SoCs at some point. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add pinctrl driverSimon Glass2015-09-02-0/+459
| | | | | | | | | | | | | | Add a driver which supports pin multiplexing setup for the most commonly used peripherals. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add a simple syscon driverSimon Glass2015-09-02-0/+26
| | | | | | | | | | | | Add a driver that provides access to system controllers. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add SoC reset driverSimon Glass2015-09-02-0/+54
| | | | | | | | | | | | | | We can reset the SoC using some CRU (clock/reset unit) registers. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add header files for PMU and GRFSimon Glass2015-09-02-0/+857
| | | | | | | | | | | | | | PMU is the power management unit and GRF is the general register file. Both are heavily used in U-Boot. Add header files with register definitions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add clock driverSimon Glass2015-09-02-0/+804
| | | | | | | | | | | | | | Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3288. Signed-off-by: Simon Glass <sjg@chromium.org>
| * power: regulator: Add a driver for ACT8846 regulatorsSimon Glass2015-09-02-0/+165
| | | | | | | | | | | | | | Add a full regulator driver for the ACT8846. This provides easy access to voltage and current settings for each regulator. Signed-off-by: Simon Glass <sjg@chromium.org>
| * power: Add support for ACT8846 PMICSimon Glass2015-09-02-0/+137
| | | | | | | | | | | | | | | | Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and is connected to the I2C bus. This driver supports using a regulator driver to access the regulators. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add basic peripheral and clock definitionsSimon Glass2015-09-02-0/+119
| | | | | | | | | | | | | | | | Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: gpio: Add rockchip GPIO driverSimon Glass2015-09-02-0/+161
| | | | | | | | | | | | | | This supports RK3288 at present. It does not implement functions or support for pull up/down. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add support for the SPI imageSimon Glass2015-09-02-1/+122
| | | | | | | | | | | | | | | | | | | | | | | | The Rockchip boot ROM requires a particular file format for booting from SPI. It consists of a 512-byte header encoded with RC4, some padding and then up to 32KB of executable code in 2KB blocks, separated by 2KB empty blocks. Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be converted to this format. This allows booting from SPI flash on supported machines. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add support for the SD imageSimon Glass2015-09-02-2/+106
| | | | | | | | | | | | | | | | | | | | | | The Rockchip boot ROM requires a particular file format. It consists of 64KB of zeroes, a 512-byte header encoded with RC4, and then some executable code. Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be converted to this format. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add the rkimage format to mkimageSimon Glass2015-09-02-1/+171
| | | | | | | | | | | | | | | | Rockchip SoCs require certain formats for code that they execute, The simplest format is a 4-byte header at the start of a binary file. Add support for this so that we can create images that the boot ROM understands. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mkimage: Allow the original file size to be recordedSimon Glass2015-09-02-0/+1
| | | | | | | | | | | | | | | | Allow the image handler to store the original input file size so that it can reference it later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * mkimage: Allow padding to any lengthSimon Glass2015-09-02-11/+12
| | | | | | | | | | | | | | | | At present there is an arbitrary limit of 4KB for padding. Rockchip needs more than that, so remove this restriction. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * rockchip: rk3288: dts: Make core devices available earlySimon Glass2015-09-02-0/+15
| | | | | | | | | | | | | | In SPL we need access to the CRU and other peripherals so we can set up SDRAM. Mark these so that they will remain in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Bring in RK3288 device tree file includes and bindingsSimon Glass2015-09-02-0/+2543
| | | | | | | | | | | | | | | | Bring in required device tree files from Linux. Since mainline Linux is somewhat behind, use the files from the Chromium tree. We can re-sync once further code is acccepted upstream. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-15 08:30:31 +0000