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| * | | | microblaze: Support stack protection featureMichal Simek2015-01-21-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that stack didn't rewrite important part of u-boot. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | microblaze: Enable hardware exception by defaultMichal Simek2015-01-21-1/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | Enable hardware exception by default to be able to handle it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'phys_t' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-01-22-7/+9
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| * | | | mmc: zynq: Use phys_addr_t for addressesMichal Simek2015-01-21-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | phys_addr_t is designed for physical addresses that's why use it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | net: ll_temac: Fix compilation warning because of phys_addr_tMichal Simek2015-01-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix the compilation warning w+../drivers/net/xilinx_ll_temac.c: In function 'll_temac_init': w+../drivers/net/xilinx_ll_temac.c:235:3: warning: format '%X' expects argument of type 'unsigned int', but argument 4 has type 'phys_addr_t' [-Wformat] introduced by "net: Declare physical address as phys_addr_t unsigned type" (sha1: 16ae7827226ce8b255245d1932e8069f00997a26). Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | net: gem: Use phys_addr_t instead of int for addressesMichal Simek2015-01-21-3/+5
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | Use phys_addr_t for physical address declaration. It is also unsigned type instead of sign. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-01-22-67/+158
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| * | | fpga: zynqpl: Add support for zc7035Siva Durga Prasad Paladugu2015-01-21-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support for zc7035 Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: xilinx: Show fpga info if definedMichal Simek2015-01-21-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Show fpga_op->info even if desc->iface_fns is not defined. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | fpga: xilinx: Check if fpga operations are definedMichal Simek2015-01-21-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that operations are correctly setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | fpga: xilinx: zynqpl: Setup NULL fpga_op without driverMichal Simek2015-01-21-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: xilinx: virtex2: Fix macro indentationMichal Simek2015-01-21-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: xilinx: virtex2: Setup NULL fpga_op without driverMichal Simek2015-01-21-14/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: xilinx: spartan3: Setup NULL fpga_op without driverMichal Simek2015-01-21-14/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: xilinx: spartan2: Setup NULL fpga_op without driverMichal Simek2015-01-21-11/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: Export fpga_get_desc for SPLMichal Simek2015-01-21-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL needs to detect FPGA device which will be used for loading bitstream. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: Remove extern prototypes from .hMichal Simek2015-01-21-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This problem is reported by checkpatch.pl Warnings: CHECK: extern prototypes should be avoided in .h files Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | fpga: Protect GZIP usage when LOADMK is enabledMichal Simek2015-01-21-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For case where CMD_FPGA_LOADMK is enabled and GZIP disable. Warning log: common/built-in.o: In function `do_fpga': /mnt/disk/u-boot/common/cmd_fpga.c:218: undefined reference to `gunzip' Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | | sunxi: Restore lowlevel_init usageHans de Goede2015-01-21-22/+21
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2 recent sunxi changes have removed the usage of lowlevel_init by moving some code around and then setting CONFIG_SKIP_LOWLEVEL_INIT. This is problematic for 2 reasons: 1) It does not just stop s_init from being called, it also stops cpu_init_cp15 from getting called, which is undesirable. 2) We want u-boot.bin to be usable standalone, without SPL, some people e.g. use an upstream u-boot.bin together with Allwinner's boot0 loader. So u-boot.bin must (re)initialize the gpios, timer, etc. This commit restores the lowlevel_init / s_init usage, while keeping the changes to no longer use the global-data (gd) struct in the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge git://git.denx.de/u-boot-arcTom Rini2015-01-20-71/+123
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| * | | arc: rename "arc700" in "arcv1"Alexey Brodkin2015-01-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation to ARCv2 port submission we rename "arc700" folder to "arcv1" which stands for ARCv1 ISA also known as ARCompact. This will allow us to add more flavours of binary-compatible ARCv1 CPUs like ARC600 if needed later on and all required ARCv2 CPUs (which are binary incompatible with ARCv1) in "arcv2" folder in subsequent commits. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
| * | | board/synopsys: remove selection of CPU from the boardAlexey Brodkin2015-01-15-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both ARCangel4 and AXS10x are FPGA-based boards so they may have different CPUs. For now we have only 1 option (ARC700) and we define this as default in arch Kconfig. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: move common sources in libraryAlexey Brodkin2015-01-15-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "reset.c" and "cpu.c" have no architecture-specific code at all. Others are applicable to either ARC CPU. This change is a preparation to submission of ARCv2 architecture port. Even though ARCv1 and ARCv2 ISAs are not binary compatible most of built-in modules still have the same programming model - AUX registers are mapped in the same addresses and hold the same data (new featues extend existing ones). So only low-level assembly code (start-up, interrupt handlers) is left as CPU(actually ISA)-specific. This significantyl simplifies maintenance of multiple CPUs/ISAs. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
| * | | arc: move linker script in arch/arc/cpu folderAlexey Brodkin2015-01-15-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | This way we'll be able to use the same one script for either ARC CPU. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: relocate - minor refactoring and clean-upAlexey Brodkin2015-01-15-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * use better symbols for relocatable region boundaries ("__image_copy_start" instead of "CONFIG_SYS_TEXT_BASE") * remove useless debug messages because they will only show up in case of both problem (when normal "if" branch won't be taken) and DEBUG take place which is pretty rare situation. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: introduce separate section for interrupt vector tableIgor Guryanov2015-01-15-31/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though existing implementation works fine in preparation to submission of ARCv2 architecture we need this change. In case of ARCv2 interrupt vector table consists of just addresses of corresponding handlers. And if those addresses will be in .text section then assembler will encode them as everything in .text section as middle-endian and then on real execution CPU will read swapped addresses and will jump into the wild. Once introduced new section is situated so .text section remains the first which allows us to use common linker option for linking everything to a specified CONFIG_SYS_TEXT_BASE. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
| * | | arc: add dependences on MMU presenceAlexey Brodkin2015-01-15-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on MMU presence in CPU there're differences in HW behavior. For example address of instruction that caused exception is put in ECR register if MMU exists and in ERET register otherwise. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
| * | | arc: interrupts - fix mask setupIgor Guryanov2015-01-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To disable interrupts we need to reset corresponding flags in STATUS32 register. For this we need to OR flags for interrupts level1 and level2 and then AND with current value in STATUS32. Before that implementation was incorrect. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
| * | | arc: add ECR (exception cause register) outputIgor Guryanov2015-01-15-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exception cause register (ECR) contains value that describes a reason for exception that has happened. This helps a lot to figure-out what went wrong. Now we print this register contents when dumping registers. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
| * | | arc: check caches existence before useIgor Guryanov2015-01-15-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some cache operations ({i|d}cache_{enable|disable|status} or flush_dcache_all) are built and used even if CONFIG_SYS_{I|D}CACHE_OFF is set. This is required for force disable of caches on early boot. What if something was executed before U-boot and enabled caches (low-level bootloaders, previously run kernel etc.)? But if CPU doesn't really have caches any attempt to access cache-related AUX registers triggers instruction error exception. So for convenience we'll try to avoid exceptions by checking if CPU actually has caches (we check separately data and instruction cache existence) at all. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2015-01-20-27/+1427
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| * | | | mmc: Skip changing bus width for MMC cards earlier than version 4.0Andrew Gabbasov2015-01-19-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wider bus widths (larger than default 1 bit) appeared in MMC standard version 4.0. So, for MMC cards of any earlier version trying to change the bus width (including ext_csd comparison) does not make any sense. It may work incorrectly and at least cause unnecessary timeouts. So, just skip the entire bus width related activity for earlier versions. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | | mmc: Avoid redundant switching to 1-bit bus width for MMC cardsAndrew Gabbasov2015-01-19-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If all the commands switching an MMC card to 4- or 8-bit bus width fail, and the bus width for the controller and the driver is still set to default 1 bit, there is no need to send one more command to switch the card to 1-bit bus width. Also, if the card or host controller do not support wider bus widths, there is no need to send a switch command at all. However, if one of switch commands succeeds, but the subsequent ext_csd fields comparison fails, the card should be switched to some other bus width (next in the list for the loop), or to default 1-bit bus width as a last resort. That's why it would be incorrect to just remove the 1-bit bus width case from the list, it should still be processed in some cases. panto: Minor cosmetic edit removing superfluous parentheses. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
| * | | | mmc: extend mmcinfo output to show partition write reliability settingsDiego Santa Cruz2015-01-19-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This extends the mmcinfo hardware partition info output to show partitions with write reliability enabled with the "WRREL" string. If the partition does not have write reliability enabled the "WRREL" string is omitted; this is analogous to the ehhanced attribute. Example output: Device: OMAP SD/MMC Manufacturer ID: fe OEM: 14e Name: MMC16 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.41 High Capacity: Yes Capacity: 13.8 GiB Bus Width: 4-bit Erase Group Size: 8 MiB HC WP Group Size: 16 MiB User Capacity: 13.8 GiB ENH WRREL User Enhanced Start: 0 Bytes User Enhanced Size: 512 MiB Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH GP1 Capacity: 64 MiB ENH WRREL GP2 Capacity: 64 MiB ENH WRREL Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: extend the mmc hwpartition sub-command to change write reliabilityDiego Santa Cruz2015-01-19-24/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change extends the mmc hwpartition sub-command to change the per-partition write reliability settings. It also changes the syntax used for the enhanced user data area slightly to better accomodate the write reliability option. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: extend the mmc hardware partitioning API with write reliabilityDiego Santa Cruz2015-01-19-1/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eMMC partition write reliability settings are to be set while partitioning a device, as per the eMMC spec, so changes to these attributes needs to be done in the hardware partitioning API. This commit adds such support. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: add mmc hwpartition sub-command to do eMMC hardware partitioningDiego Santa Cruz2015-01-19-1/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the mmc hwpartition sub-command to perform eMMC hardware partitioning on an mmc device. The number of arguments can be large for a complex partitioning, but as the partitioning has to be done in one go it is difficult to make it simpler. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: add API to do eMMC hardware partitioningDiego Santa Cruz2015-01-19-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds an API to do hardware partitioning on eMMC devices. The new mmc_hwpart_config() function does the partitioning in one go. As the different attributes and partitioning options on eMMC may be interdependent validation has to be done based on the complete partitioning configuration. The function accepts three modes: - MMC_HWPART_CONF_CHECK: just validates that the configuration is valid. - MMC_HWPART_CONF_SET: validates and sets all the fields in EXT_CSD but without setting the "partitioning completed" bit, and thus is reversible. - MMC_HWPART_CONF_COMPLETE: does everything and is thus not reversible. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: the ext_csd data may be used during init even if reading failedDiego Santa Cruz2015-01-19-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc_startup() function uses the ext_csd data even if reading it from the mmc device failed. This bug was introduced in commit bc897b1d4d86597311430dbe7b3e6c807c8c53e5. We now bail out if reading it fails, this should not be a problem as ext_csd was introduced in MMC 4.0 and this code is conditional on MMC >= 4.0. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: eMMC partitioning data is not effective till partitioning completedDiego Santa Cruz2015-01-19-23/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eMMC spec says that partitioning is only effective after the PARTITION_SETTING_COMPLETED is set in EXT_CSD (and a power cycle was done, but that we cannot know). Thus the partition sizes and attributes should be ignored when that bit is not set, otherwise the various capacities are not coherent (e.g., the user data capacity will be that of the unpartitioned device while partition sizes would be non-zero). Prescence of non-zero partitioning data is nevertheless still used to activate the high-capacity size definitions (EXT_CSD_ERASE_GROUP_DEF) as it is necessary to set that to write any of the partitioning fields in EXT_CSD, so having partitioning data means someone previously activated that and we should keep it activated. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: show the erase group size and HC WP group size in mmcinfo outputDiego Santa Cruz2015-01-19-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the erase group size and high-capacity WP group size to mmcinfo's output. The erase group size is necessary to properly align erase requests on eMMC. The high-capacity WP group size is necessary to properly align partitions on eMMC. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: read the high capacity WP group size for eMMCDiego Santa Cruz2015-01-19-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the eMMC high capacity write protect group size at mmc device initialization. This is useful to correctly partition an eMMC device, as partitions need to be aligned to this size. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: fix erase_grp_size computation with high-capacity size definitionDiego Santa Cruz2015-01-19-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The erase_grp_size in struct mmc is to be a size in 512-byte sectors but the code used to compute it for eMMC when EXT_CSD_ERASE_GROUP_DEF is enabled computed it as bytes, leading to erase sizes and alignment much larger than what is actually required by the mmc device. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: display size and start of eMMC enhanced user data area in mmcinfoDiego Santa Cruz2015-01-19-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds output to show the eMMC enhanced user data area size and offset along with the partition sizes in mmcinfo's output. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: read the size of eMMC enhanced user data areaDiego Santa Cruz2015-01-19-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This modification reads the size of the eMMC enhanced user data area upon initialization of an mmc device, it will be used later by mmcinfo. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: computation of eMMC GP partition size was missing 512 KiB factorDiego Santa Cruz2015-01-19-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: incomplete test to switch to high-capacity group size definitionsDiego Santa Cruz2015-01-19-22/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eMMC spec mandates that the high-capacity group size definitions should be enabled when the device is partitioned (by setting ERASE_GROUP_DEF in EXT_CSD). The current test to determine when this is required misses a few cases. In particular a device may have been partitioned without setting the enhanced attribute on any partition or partitioning may be completed without creating any extra partitions. This change moves the code to set ERASE_GROUP_DEF to after reading all partition information. It is also enabled when PARTITIONING_SETTING_COMPLETED is set as it is necessary to enable ERASE_GROUP_DEF before setting that bit, so it means that the user previously switched to the high capacity definitions. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: skip mmcinfo partition info processing for eMMC < 4.41Diego Santa Cruz2015-01-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC partitions are defined as of eMMC 4.41, but mmcinfo process partition info for eMMC >= 4.0, change it to do it for >= 4.41 Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: make eMMC general purpose partition numbering match specDiego Santa Cruz2015-01-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eMMC spec numbers general purpose partitions starting at 1, but the mmcinfo output follows the internal numbering which starts at 0. Make the mmcinfo command output number partitions as in the eMMC spec to avoid confusion. Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
| * | | | mmc: extend mmcinfo to show enhanced partition attributeDiego Santa Cruz2015-01-19-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This extends the mmcinfo command's output to show which eMMC partitions have the enhanced attribute set. Note that the eMMC spec says that if the enhanced attribute is supported then the boot and RPMB partitions are of the enhanced type. The output of mmcinfo becomes: Device: OMAP SD/MMC Manufacturer ID: fe OEM: 14e Name: MMC16 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.41 High Capacity: Yes Capacity: 13.8 GiB Bus Width: 4-bit User Capacity: 13.8 GiB ENH Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH GP1 Capacity: 64 MiB ENH GP2 Capacity: 64 MiB ENH Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
generated by cgit v1.1 at 2024-11-05 14:01:39 +0000