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* arm: socfpga: Enable DFU MMC support only if DM_MMC is enabledMarek Vasut2015-12-22-0/+2
| | | | | | | | | | It is not possible to compile DFU MMC support if the MMC support is not compiled into U-Boot. Secure the code with an ifdef to prevent compiler splat. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* arm: socfpga: Enable SPL MMC/SPI support only if DM_MMC/SPI is enabledMarek Vasut2015-12-22-0/+4
| | | | | | | | | | It is not possible to compile MMC/SPI SPL if the respective DM_MMC/DM_SPI bits are not enabled. Secure the code with an ifdef to prevent compiler splat. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* arm: socfpga: Unreset NAND in U-BootMarek Vasut2015-12-22-0/+4
| | | | | | | | Make sure the NAND reset is not asserted in full U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* arm: socfpga: Unreset NAND in SPLMarek Vasut2015-12-22-0/+1
| | | | | | | | If the system boots from NAND, make sure to de-assert the NAND IP reset, otherwise the system will get stuck. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Define NAND reset bitMarek Vasut2015-12-22-1/+2
| | | | | | | Define the NAND reset bit and fix the ordering of the macros. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Fix QSPI doesn't work on socdk boardshengjiangwu2015-12-22-7/+7
| | | | | | | | | | | | | Updated pinmux group MIXED1IO[15-20] for QSPI. Updated QSPI clock. Signed-off-by: shengjiangwu <shengjiangwu@icloud.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: Fix emac1 doesn't work on socdk boardshengjiangwu2015-12-22-15/+15
| | | | | | | | | | | | | Updated pinmux group MIXED1IO[0-13] for RGMII1. Updated EMAC1 clock. Signed-off-by: shengjiangwu <shengjiangwu@icloud.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sr1500: Update qspiboot to use UBIFSChin Liang See2015-12-22-4/+2
| | | | | | | | | | | | Update the qspiboot console command to use UBIFS instead of old jffs2 file system. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sockit: Update qspiboot to use UBIFSChin Liang See2015-12-22-0/+3
| | | | | | | | | | | | Update the qspiboot console command to use UBIFS instead of old jffs2 file system. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: arria5_socdk: Update qspiboot to use UBIFSChin Liang See2015-12-22-4/+2
| | | | | | | | | | | | Update the qspiboot console command to use UBIFS instead of old jffs2 file system. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: cyclone5_socdk: Update qspiboot to use UBIFSChin Liang See2015-12-22-4/+2
| | | | | | | | | | | | Update the qspiboot console command to use UBIFS instead of old jffs2 file system. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sr1500: Enable qspiload console commandChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | | Enabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sockit: Enable qspiload console commandChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | | Enabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: arria5_socdk: Enable qspiload console commandChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | | Enabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: cyclone5_socdk: Enable qspiload console commandChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | | Enabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sr1500: Enable ubiload console commandChin Liang See2015-12-22-1/+4
| | | | | | | | | | | | | Enabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sockit: Enable ubiload console commandChin Liang See2015-12-22-0/+3
| | | | | | | | | | | | | Enabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: arria5_socdk: Enable ubiload console commandChin Liang See2015-12-22-1/+4
| | | | | | | | | | | | | Enabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: cyclone5_socdk: Enable ubiload console commandChin Liang See2015-12-22-1/+4
| | | | | | | | | | | | | Enabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sr1500: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORSChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: arria5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORSChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORSChin Liang See2015-12-22-0/+1
| | | | | | | | | | | | Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: Enable ubi and ubifs supportChin Liang See2015-12-22-0/+8
| | | | | | | | | | | | When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: Enable simple bus in SPL on all boardsMarek Vasut2015-12-22-0/+2
| | | | | | | | The simple bus support must be enabled in SPL, otherwise the boards will not be able to parse the DT and will fail to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Make /soc available in pre-relocMarek Vasut2015-12-22-0/+4
| | | | | | | | This node must be available before relocation, otherwise the board will not find mmc and will thus not boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Enabling MTD default partitionsChin Liang See2015-12-22-1/+24
| | | | | | | | | | | | | | | | | | | | Enabling MTD default partitions if its not defined in board configuration file. The layout as below device nor0 <ff705000.spi.0>, # parts = 6 #: name size offset mask_flags 0: u-boot 0x00100000 0x00000000 0 1: env1 0x00040000 0x00100000 0 2: env2 0x00040000 0x00140000 0 3: UBI 0x03e80000 0x00180000 0 4: boot 0x00e80000 0x00180000 0 5: rootfs 0x01000000 0x01000000 0 Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: socrates: Consolidate SDMMC environmentChin Liang See2015-12-22-2/+0
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: sockit: Consolidate SDMMC environmentChin Liang See2015-12-22-2/+0
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: mcvevk: Consolidate SDMMC environmentChin Liang See2015-12-22-2/+0
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: de0_nano_soc: Consolidate SDMMC environmentChin Liang See2015-12-22-2/+0
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: arria5_socdk: Consolidate SDMMC environmentChin Liang See2015-12-22-2/+0
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: cyclone5_socdk: Consolidate SDMMC environmentChin Liang See2015-12-22-2/+0
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* arm: socfpga: Consolidate SDMMC environmentChin Liang See2015-12-22-0/+6
| | | | | | | | | | | | | Remove the duplication of SDMMC environment configuration from each boards' configuration header file into socfpga_common.h Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* net: designware: Zap trailing backslashMarek Vasut2015-12-22-7/+7
| | | | | | | | | Trailing backslashes are necessary only in macros, not in the actual code, so remove them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Zap CONFIG_DW_AUTONEGMarek Vasut2015-12-22-9/+0
| | | | | | | | | | This symbol is not used anywhere, so remove it. For spear600, remove it from the board file, since the symbol is not defined for spear600 either. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* net: eth_designware: select PHYLIB in KconfigThomas Chou2015-12-22-13/+1
| | | | | | | | | | | | | | | Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files. This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: socfpga: Actually enable L2 cacheMarek Vasut2015-12-22-2/+11
| | | | | | | | | The L2 cache was never enabled in the v7_outer_cache_enable(), fix this and enable the L2 cache. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* x86: Remove Graeme Russ from the git alias fileSimon Glass2015-12-21-2/+1
| | | | | | | As requested, remove Graeme's email address. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-12-19-553/+289
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| * arm: socfpga: fix trivial header preprocessor for socfpga_common.hDinh Nguyen2015-12-20-3/+3
| | | | | | | | | | | | | | Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with __CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: fix up a questionable macro for SDMMCDinh Nguyen2015-12-20-5/+10
| | | | | | | | | | | | | | | | Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> [fix parenthesis in the sdmmc_mask]
| * arm: socfpga: remove building scan managerDinh Nguyen2015-12-20-2/+3
| | | | | | | | | | | | | | | | The scan manager is not needed for the Arria10. Edit the makefile to build the scan manager for arria5 and cyclone5 only. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config propertyDinh Nguyen2015-12-20-0/+5
| | | | | | | | | | | | | | | | | | In order to re-use as much Cyclone5 and Arria5 code as possible to support the Arria10 platform, we need to wrap some of the code with #ifdef's. By adding CONFIG_TARGET_SOCFPGA_GEN5, we can shorten the check by not having to check for both AV || AV. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDRDinh Nguyen2015-12-20-7/+0
| | | | | | | | | | | | | | Now that the USB DWC2 probing is done from OF, remove this note to add CONFIG_USB_DWC2_REG_ADDR. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Drop the board boilerplateMarek Vasut2015-12-20-313/+0
| | | | | | | | | | | | | | | | Drop all the common board code, since it is not completely useless. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Introduce common board codeMarek Vasut2015-12-20-1/+65
| | | | | | | | | | | | | | | | | | | | The SoCFPGA has reached a point where every single board code become the same, since each and every single board is probed equally from OF. Move the common board code into arch/arm/mach-socfpga/ . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARDMarek Vasut2015-12-20-15/+4
| | | | | | | | | | | | | | | | | | | | We already have the CONFIG_SYS_BOARD variable, which defines the name of the board. The value in CONFIG_HOSTNAME is exactly the same and is thus just a duplicity, so switch it to reuse CONFIG_SYS_BOARD . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDORMarek Vasut2015-12-20-19/+1
| | | | | | | | | | | | | | | | | | | | We already have the CONFIG_SYS_VENDOR variable, which defines the manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURER is just a duplicity, so switch it to reuse CONFIG_SYS_VENDOR . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: sockit: Zap VIRTUAL_TARGETMarek Vasut2015-12-20-4/+0
| | | | | | | | | | | | | | | | There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: de0_nano: Zap VIRTUAL_TARGETMarek Vasut2015-12-20-4/+0
| | | | | | | | | | | | | | | | There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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