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| * sunxi_nand_spl: Remove NAND_SUNXI_SPL_SYNDROME_PARTITIONS_ENDHans de Goede2015-08-31-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only ever use syndrome mode for the partitions which contain the SPL, as that is required for the BROM to be able to read the SPL. Instead of using some arbritray limit for deciding whether or not to use syndrome, be smart and check if u-boot-dtb.bin is directly behind the SPL, if it is not then it is on its own partition and we should not use syndrome. Note the reason why we only use syndrome mode for the SPL is because it comeswith weaker randomization, introducing a risk for more bit errors, so we want to avoid it when possible. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Rename SPL_NAND_SUNXI to NAND_SUNXIHans de Goede2015-08-31-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We eventually want to add full nand support, since it makes no sense to build SPL with nand support and u-boot without, or the other way around, a single option will suffice. Renaming the Kconfig option now makes things easier when we add full nand support in the future. The "obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o" is moved to an "ifdef CONFIG_SPL_BUILD" block in the Makefile. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Add support for backup boot partitionsHans de Goede2015-08-31-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | The BROM does not care / use bad page markings, instead it deals with any bad pages in the first erase-block by simply trying to load "boot0" from the next erase-block. This commit implements the same strategy for the sunxi spl nand code, allowing it to boot from the backup boot partition when the main boot partition is bad (tested by erasing the main boot partition). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Auto detect nand configuration parametersHans de Goede2015-08-31-29/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Auto detect the nand configuration parameters, like the BROM does. This allows us to get rid of various Kconfig settings, and is necessary to support generic boards like the mk802 which have seen many production runs with different nands. The full blown u-boot/kernel nand driver uses the nand id to determine this info, for the SPL we do as the BROM does and simply try a few standard configs. Note the table only contains configs which are known to actually be used, rather then all the configs the BROM tries. This means that it may need to be updated in the future as we add support for nand on more boards. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Parametrize lowlevel read functionsHans de Goede2015-08-31-38/+48
| | | | | | | | | | | | | | | | | | | | | | | | Parametrize the lowlevel nand_read_page function, instead of directly using the CONFIG_foo settings for page-size, etc. there and add a few wrappers / helper functions for calling it. This is a preparation patch for adding auto-detecting of the nand parameters like the BROM does. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Properly config page-size in the nand ctl registerHans de Goede2015-08-31-0/+5
| | | | | | | | | | | | | | | | | | Properly config page-size in the nand ctl register, it seems that things work fine without doing this, but still lets play it safe and properly set the page-size. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Add support for sun4i and sun5i SoCsHans de Goede2015-08-31-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | Other then having a few less chip-select lines the nand controller on sun4i, sun5i and sun7i is identical. Note this patch also muxes GPC7 to the NAND on sun7i where as before it was not muxed this way. GPC7 is a standard NAND pin, so it should always be muxed to the NAND when in use. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Use kernel driver algorithm for determining ecc_mode / _offHans de Goede2015-08-31-46/+12
| | | | | | | | | | | | | | | | | | Sync the code for figuring out the ecc_mode and ecc_offset with the linux kernel v4.1. Keeping this in sync seems like a good idea in general, and it fixes / adds support for ecc strengths of 56, 60 and 64 bits. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Add proper cache flusingHans de Goede2015-08-31-0/+8
| | | | | | | | | | | | | | | | | | | | We are using dma, so we should flush the cache before starting the dma, and invalidate it once the dma is done. Things are working without this by mostly luck, but lets not rely on that. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Turn off clocks when we're done with the nandHans de Goede2015-08-31-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | Turn off the nand and dma clocks when we're done with the nand, this puts the nand and dma controllers back into a clean state for when the kernel boots. Without this the kernel will not boot properly when it is built with dma-controller support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Make sure the DMA controller is enabledHans de Goede2015-08-31-0/+6
| | | | | | | | | | | | | | | | We use DMA for nand data transfers in the SPL, so make sure the DMA controller is enabled. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Use SYS_NAND_SELF_INIT and only do nand init when necessaryHans de Goede2015-08-31-5/+10
| | | | | | | | | | | | | | | | Use SYS_NAND_SELF_INIT and only setup the pinmux and clocks when we are actually using the nand. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Do not bother writing the spare-area reg in syndrome modeHans de Goede2015-08-31-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | In syndrome mode we set the NFC_SEQ bit in the command register, so the spare-area register is not used. Also the value currently being written is actual wrong, the ecc sits at "column + CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE" not just CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE. So the current code only serves to confuse the user -> remove it. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: We only need to reset the nand chip onceHans de Goede2015-08-31-10/+10
| | | | | | | | | | | | | | There is no need to reset the nand chip for every ecc-block read. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Drop unnecessary temp bufHans de Goede2015-08-31-27/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_spl_load_image() always gets called with either CONFIG_SYS_TEXT_BASE or spl_image.load_addr as destination, both of which are properly aligened, and have plenty of space for "overshooting" up to CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE bytes, as we read in CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE bytes chunks. This saves CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE (typically 1k) in SPL size, which is a lot on the total 24k we have. Note this changes the dma destination from SRAM to DRAM, so this patch updates the DDMA_DST_TYPE bits in the dma controller cfg0 reg accordingly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi_nand_spl: Fix CONFIG_SPL_NAND_SUNXI handlingHans de Goede2015-08-31-6/+1
| | | | | | | | | | | | | | | | | | | | CONFIG_SPL_NAND_SUPPORT gets used via IS_ENABLED so it must be defined to 1, rather then just being defined. While at remove 2 other unused NAND related defines from sunxi-common.h. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Add CONFIG_MMC0_CD_PIN to various boardsHans de Goede2015-08-31-0/+6
| | | | | | | | | | | | | | | | | | Add CONFIG_MMC0_CD_PIN to various boards, this stops the SPL from still trying to access the sdcard when there is none (e.g. when booting from nand). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Drop LCD_MODE from A13-OLinuxIno defconfigsHans de Goede2015-08-31-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the unified / cleaned up default display output selection changes, which were done as part of adding composite video out support, our example LCD_MODE line in the A13-OLinuxIno defconfigs causes the display code to setup a LCD console by default, rather then a VGA console. Given that the LCD console is only useful for people who have hooked up the exact lcd-panel from the config, while most people will not have any lcd panel connected to these boards, this is not a good default. Dropping the LCD_MODE line which was intended as an example fixes this, instead add a link to the LCD_MODE help text pointing to http://linux-sunxi.org/LCD which contains the removed and other example modes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: musb: Drop no longer accurate comment in Kconfig help textHans de Goede2015-08-31-3/+1
| | | | | | | | | | | | | | | | | | Drop the no longer accurate part of the USB_MUSB_SUNXI Kconfig help text, since the musb-host code now supports the device-model, ehci and musb in host mode can both be enabled at the same time without issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Add support for gt90h-v4 tabletsHans de Goede2015-08-31-0/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gt90h is a pcb found in generic 9" tablets with an A23 soc, 1G RAM and 8G nand, rtl8723as usb wifi, 1 micro usb port and 1 micro sd slot. The pmic setup on this board is somewhat special, dcdc2 MUST be set to 1.1V instead of the usual 1.2V otherwise the board is very unstable. aldo1 is used to power the micro sd slot, dldo1 is used for wifi. This commit adds a defconfig + dts (as submitted to the kernel) for the gt90h-v4 pcb. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: axp221: Allow specifying dcdc2 voltage via KconfigHans de Goede2015-08-31-1/+10
| | | | | | | | | | | | | | | | Allow specifying the axp221 dcdc2 voltage via Kconfig, this is necessary because on some boards the 1.2V default does not work reliable. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge git://git.denx.de/u-boot-dmTom Rini2015-08-31-1377/+3305
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| * | dts: fix dependency of OF_SPL_REMOVE_PROPSMasahiro Yamada2015-08-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This should depend on SPL_OF_CONTROL (it is not equivalent to SPL && OF_CONTROL). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | pinctrl: sandbox: add sandbox pinctrl driverMasahiro Yamada2015-08-31-0/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver actually does nothing but test pinctrl uclass, and demonstrate how things work. To try this driver, uncomment /* #define DEBUG */ in the drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be displayed. DRAM: 128 MiB sandbox pinmux: group = 1 (serial_a), function = 1 (serial) Using default environment In: cros-ec-keyb Out: lcd Err: lcd Net: Net Initialization Skipped eth0: eth@10002000, eth1: eth@80000000, eth5: eth@90000000 => i2c dev 0 Setting bus to 0 sandbox pinmux: group = 0 (i2c), function = 0 (i2c) sandbox pinconf: group = 0 (i2c), param = 3, arg = 1 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | pinctrl: add pin control uclass supportMasahiro Yamada2015-08-31-0/+938
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This creates a new framework for handling of pin control devices, i.e. devices that control different aspects of package pins. This uclass handles pinmuxing and pin configuration; pinmuxing controls switching among silicon blocks that share certain physical pins, pin configuration handles electronic properties such as pin- biasing, load capacitance etc. This framework can support the same device tree bindings, but if you do not need full interface support, you can disable some features to reduce memory foot print. Typically around 1.5KB is necessary to include full-featured uclass support on ARM board (CONFIG_PINCTRL + CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX), for example. We are often limited on code size for SPL. Besides, we still have many boards that do not support device tree configuration. The full pinctrl, which requires OF_CONTROL, does not make sense for those boards. So, this framework also has a Do-It-Yourself (let's say simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the uclass itself provides no systematic mechanism for identifying the peripheral device, applying pinctrl settings, etc. They must be done in each low-level driver. In return, you can save much memory footprint and it might be useful especially for SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: core: allow device_bind() to not return a device pointerMasahiro Yamada2015-08-31-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | This is useful when we want to bind a device, but do not need the pointer to the device. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | tegra: nyan: Enable TPM command and driverSimon Glass2015-08-31-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The TPM is listed in the device tree. Enable the driver and 'tpm' command so that it can be used. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Enable 'tpmtest' command for Chrome OS boards with TPMsSimon Glass2015-08-31-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | This command provides a few useful tests so enable it for common boards. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: tpm: Add a 'tpmtest' commandSimon Glass2015-08-31-0/+575
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These tests come from Chrome OS code. They are not particularly tidy but can be useful for checking that the TPM is behaving correctly. Some knowledge of TPM operation is required to use these. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Add functions to access flags and permissionsSimon Glass2015-08-31-1/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few new functions which will be used by the test command in a future patch. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Add a 'tpm info' commandSimon Glass2015-08-31-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a command to display basic information about a TPM such as the model and open/close state. This can be useful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: tpm: Convert LPC driver to driver modelSimon Glass2015-08-31-155/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the tpm_tis_lpc driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: tpm: Convert I2C driver to driver modelSimon Glass2015-08-31-350/+207
| | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass2015-08-31-6/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a TPM node to the various Chromebooks so that driver can be converted to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Check that parse_byte_string() has data to parseSimon Glass2015-08-31-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rather then crashing when there is no data, print an error. The error is printed by the caller to parse_byte_string(). Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: tpm: sandbox: Convert TPM driver to driver modelSimon Glass2015-08-31-12/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the sandbox TPM driver to use driver model. Add it to the device tree so that it can be found on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Report tpm errors on the command lineSimon Glass2015-08-31-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a 'tpm' command fails, we set the return code but give no indication of failure. This can be confusing. Add an error message when any tpm command fails. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: i2c: Add a command to adjust the offset lengthSimon Glass2015-08-31-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C chips can support a register offset, with registers accessible by sending this offset as the first part of any read or write transaction. Most I2C chips have a single byte offset, thus the offset length is 1. This provides access for up 256 registers. However other offset lengths are supported, including 0. Add a command to provide access to the offset length from the command line. This allows the offset length to be read or written. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: tpm: Convert the TPM command and library to driver modelSimon Glass2015-08-31-6/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver model support to the TPM command and the TPM library. Both support only a single TPM at present. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: tpm: Add a uclass for Trusted Platform ModulesSimon Glass2015-08-31-286/+630
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new uclass for TPMs which uses almost the same TIS (TPM Interface Specification) as is currently implemented. Since init() is handled by the normal driver model probe() method, we don't need to implement that. Also rename the transfer method to xfer() which is a less clumbsy name. Once all drivers and users are converted to driver model we can remove the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Tidy up delaysSimon Glass2015-08-31-31/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a _US suffix for microseconds and a _MS suffic for milliseconds. Move all timeouts and delays into one place. Use mdelay() instead of udelay() where appropriate. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Use a consistent tpm_tis_i2c_ prefixSimon Glass2015-08-31-55/+58
| | | | | | | | | | | | | | | | | | | | | | | | Use the same prefix on each function for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Simplify init codeSimon Glass2015-08-31-23/+10
| | | | | | | | | | | | | | | | | | | | | | | | Move all the init and uninit code into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Move definitions into the header fileSimon Glass2015-08-31-335/+335
| | | | | | | | | | | | | | | | | | | | | | | | Some definitions are in the C file and some are in the header file. Move everything into the header file for consistency and to reduce clutter. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Merge struct tpm into tpm_chipSimon Glass2015-08-31-15/+10
| | | | | | | | | | | | | | | | | | | | | | | | There are too many structures storing the same sort of information. Move the fields from struct tpm into struct tpm_chip and remove the former struct. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Merge struct tpm_dev into tpm_chipSimon Glass2015-08-31-44/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are too many structures storing the same sort of information. Move the fields from struct tpm_dev into struct tpm_chip and remove the former struct. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Drop struct tpm_vendor_specificSimon Glass2015-08-31-60/+35
| | | | | | | | | | | | | | | | | | | | | | | | This function is misnamed since it only applies to a single driver. Merge its fields into its parent. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: tpm_tis_i2c: Drop unnecessary methodsSimon Glass2015-08-31-12/+4
| | | | | | | | | | | | | | | | | | | | | | | | The function methods in struct tpm_vendor_specific just call local functions. Change the code to use a direct call. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Move the I2C TPM code into one fileSimon Glass2015-08-31-618/+550
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current Infineon I2C TPM driver is written in two parts, intended to support use with other I2C devices. However we don't have any users and the Atmel I2C TPM device does not use this file. We should simplify this and remove the unused abstration. As a first step, move the code into one file. Also the name tpm_private.h suggests that the header file is generic to all TPMs but it is not. Rename it indicate that it relates only to this driver Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | tpm: Convert drivers to use SPDXSimon Glass2015-08-31-29/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add an SPDX header to two drivers that don't have it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
generated by cgit v1.1 at 2024-11-11 23:05:54 +0000