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* dm: video: Add a operation to display uclassJacob Chen2016-03-14-1/+13
| | | | | | | | | The current display class only allow to get timing from edid. So add a operation to get timing directly from driver. In driver, I will use fdtdec_decode_display_timing to get timing. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Acked-by: Simon Glass <sjg@chromium.org>
* Prepare v2016.03Tom Rini2016-03-14-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* mx6slevk: Fix the power up of the Ethernet PHYFabio Estevam2016-03-13-5/+4
| | | | | | | | | GPIO4_21 is the LAN8720 power pin, not the LAN8720 reset pin. Fix that, so that we can have Ethernet functional again. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* sf: Correct data types in stm_is_locked_sr()Marek Vasut2016-03-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The stm_is_locked_sr() function is picked from Linux kernel. For reason unknown, the 64bit data types used by the function and present in Linux were replaced with 32bit unsigned ones, which causes trouble. The testcase performed was done using ST M25P80 chip. The command used was: => sf protect unlock 0 0x10000 The call chain starts in stm_unlock(), which calls stm_is_locked_sr() with negative ofs argument. This works fine in Linux, where the "ofs" is loff_t, which is signed long long, while this fails in U-Boot, where "ofs" is u32 (unsigned int). Because of this signedness problem, the expression past the return statement to be incorrectly evaluated to 1, which in turn propagates back to stm_unlock() and results in -EINVAL. The correction is very simple, just use the correctly sized data types with correct signedness in the function to make it work as intended. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* dm: ti_qspi: Fix conversion of address to a pointerLokesh Vutla2016-03-12-3/+7
| | | | | | | | | | | | | | TI QSPI driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* exynos5: common: Enable CONFIG_USB_ETHER_RTL8152 ethernet supportAnand Moon2016-03-11-0/+1
| | | | | | | | | | | | Enable CONFIG_USB_ETHER_RTL8152 support for Odroid XU4 which has support for RTL8153-CG gigabit Ethernet adapter, connected over USB 3.0. commit 9dc8ba19c50fc0b1623c654bcfe6caa903a4c36c added support for Realtek 8152/8153 driver. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-03-10-9/+9
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| * rockchip: rk3288: correct sdram settingChris Zhong2016-03-10-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2, and it expects uboot to store the value using a same protocol. But now the ddr setting value is different with DMC, so if you enable the DMC, system would crash in kernel. Correct the sdram setting here, according to the requirements of kernel. [0] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/ chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: make configure_emmc() empty for Firefly-RK3288FUKAUMI Naoki2016-03-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for Firefly-RK3288. (it's fine for Rock2) $ gcc --version gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204 Copyright (C) 2015 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. $ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img Warning: SPL image is too large (size 0x80d0) and will not boot to reduce size of SPL image, this patch makes configure_emmc() empty for Firefly-RK3288 as same as Rock2. Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-By: Vagrant Cascadian <vagrant@debian.org>
| * rockchip: rk3036: change ddr frequency to 400MLin Huang2016-03-10-1/+1
| | | | | | | | | | | | | | | | | | emac may use dpll as clock parent, and it request the clock frequency multiples of 50, so change ddr frequency to 400M. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | MIPS: pic32mzdask: use CONFIG_USE_PRIVATE_LIBGCC=yDaniel Schwierzeck2016-03-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS EL boards should define CONFIG_USE_PRIVATE_LIBGCC=y to work with EB-only toolchains like the one from kernel.org. If one do not globally set CONFIG_USE_PRIVATE_LIBGCC=y, the build fails with: /opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): compiled for a big endian system and target is little endian /opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): endianness incompatible with that of the selected emulation /opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o) /opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): compiled for a big endian system and target is little endian /opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): endianness incompatible with that of the selected emulation /opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o) /work/git-trees/u-boot-mips/Makefile:1171: recipe for target 'u-boot' failed One example for a failing build is Travis CI. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* | MIPS: fix mips_cache fallback without __builtin_mips_cacheMatthias Schiffer2016-03-09-1/+1
|/ | | | | | | | | | | The "R" constraint supplies the address of an variable in a register. Use "r" instead and adjust asm to supply the content of addr in a register instead. Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations") Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* malloc: remove !gd handlingStephen Warren2016-03-08-1/+1
| | | | | | | | | | | | | Following the previous patch, malloc() is never called before gd is set, so we can remove the special-case check for this condition. This reverts commit 854d2b9753e4 "dlmalloc: ensure gd is set for early alloc". Cc: Rabin Vincent <rabin@rab.in> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* malloc: use hidden visibilityStephen Warren2016-03-08-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running sandbox, the following phases occur, each with different malloc implementations or behaviors: 1) Dynamic linker execution, using the dynamic linker's own malloc() implementation. This is fully functional. 2) After U-Boot's malloc symbol has been hooked into the GOT, but before any U-Boot code has run. This phase is entirely non-functional, since U-Boot's gd symbol is NULL and U-Boot's initf_malloc() and mem_malloc_init() have not been called. At least on Ubuntu Xenial, the dynamic linker does make both malloc() and free() calls during this phase. Currently these free() calls crash since they dereference gd, which is NULL. U-Boot itself makes no use of malloc() during this phase. 3) U-Boot execution after gd is set and initf_malloc() has been called. This is fully functional, albeit via a very simple malloc() implementation. 4) U-Boot execution after mem_malloc_init() has been called. This is fully functional with a complete malloc() implementation. Furthermore, if code that called malloc() during phase 1 calls free() in phase 3 or later, it is likely that heap corruption will occur, since U-Boot's malloc implementation will assume the pointer is part of its own heap, although it isn't. I have not actively observed this happening. To prevent phase 2 from happening, this patch makes all of U-Boot's malloc library public symbols have hidden visibility. This prevents them from being hooked into the GOT, so only code in the U-Boot binary itself actually calls them; any other code will call into the standard C library malloc(). This also avoids the "furthermore" issue mentioned above. I have seen references to this GCC pragma in blog posts from 2008, and RHEL5's ancient gcc appears to accept it fine, so I believe it's quite safe to use it without checking gcc version. Cc: Rabin Vincent <rabin@rab.in> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: Fix building with LLVMTom Rini2016-03-08-1/+7
| | | | | | | | | | | | - The macro __BIGGEST_ALIGNMENT__ is gcc-specific. If it is not defined we'll just assume 16. This is correct for at least the common cases and LLVM does not provide an equivalent macro. - When linking U-Boot we're passing -T to the linker, and while gcc will just pass this along with LLVM we need to be specific. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* omap3: Use raw SPL by default for mmc1Alexander Graf2016-03-08-2/+0
| | | | | | | | | | | Now that we fall back to the FS code path when we don't find u-boot at the raw sector offset, there is no good reason to not default to raw boot. With this patch, I can successfully boot u-boot from a raw sector offset on beagle-xm. Signed-off-by: Alexander Graf <agraf@suse.de>
* api: Export API structure address as an environment variableStanislav Galabov2016-03-08-0/+1
| | | | | | | | | | This patch makes the U-Boot api export its structure address as an environment variable, so it can be used to directly hint FreeBSD's loader of api's location. The relevant FreeBSD loader change is currently under review at: https://reviews.freebsd.org/D5492 Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
* OMAP3: am3517_evm: Add NAND MTD partitions with UBI/UBIFS supportDerald D. Woods2016-03-08-158/+153
| | | | | | | | | | | | - Add required UBI/UBIFS config definitions - Add reasonable MTD partition layout - Remove JFFS2 config definitions - Drop some CFI verbage and definitions - Make comment 'one-liners' truly one line - Improve readability and content arrangement Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* OMAP3: am3517_evm: Use BCH8 ECC for NANDDerald D. Woods2016-03-08-7/+16
| | | | | | | | Select 8-bit BCH ecc-scheme with s/w based error correction - OMAP_ECC_BCH8_CODE_HW_DETECTION_SW Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: uniphier: allow debug_ll_init() to do nothing for unknown SoCsMasahiro Yamada2016-03-09-0/+1
| | | | | | | This function should just return for unknown SoCs rather than writing unexpected values to registers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIERMasahiro Yamada2016-03-09-9/+9
| | | | | | | | | | CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER to guard the drivers/pinctrl/uniphier directory. The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long, so rename it into CONFIG_PINCTRL_UNIPHIER. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* pinctrl: uniphier: set input-enable before pin-muxingMasahiro Yamada2016-03-09-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | While IECTRL is disabled, input signals are pulled-down internally. If pin-muxing is set up first, glitch signals (Low to High transition) might be input to hardware blocks. Bad case scenario: [1] The hardware block is already running before pinctrl is handled. (the reset is de-asserted by default or by a firmware, for example) [2] The pin-muxing is set up. The input signals to hardware block are pulled-down by the chip-internal biasing. [3] The pins are input-enabled. The signals from the board reach the hardware block. Actually, one invalid character is input to the UART blocks for such SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the power on reset. To avoid such problems, pins should be input-enabled before muxing. [ ported from Linux commit bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460 ] Fixes: 5dc626f83619 ("pinctrl: uniphier: add UniPhier pinctrl core support") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=yMasahiro Yamada2016-03-09-16/+2
| | | | | | | | The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data"). Fixes: 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: document how-to-build for Ace and Sanji boardsMasahiro Yamada2016-03-09-0/+8
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-03-04-2/+12
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| * usb: dwc2: disable erroneous overcurrent conditionDinh Nguyen2016-03-05-1/+5
| | | | | | | | | | | | | | | | | | | | | | For the case where an external VBUS is used, we should enable the external VBUS comparator in the driver. This would prevent an unnecessary overcurrent error which would then disable the host port. The overcurrent condition was happening on the SoCFPGA Cyclone5 devkit, thus USB was not working on the devkit. This patch fixes that problem. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * usb: gadget: composite: Correct recovery path for registerSam Protsenko2016-03-01-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case when usb_composite_register() failed once (for whatever reason), it will fail further even if all conditions are correct. Example: => fastboot 2 Invalid Controller Index couldn't find an available UDC g_dnl_register: failed!, error: -19 exit not allowed from main input shell. => fastboot 0 g_dnl_register: failed!, error: -22 exit not allowed from main input shell. Despite that 0 is correct index for USB controller, "fastboot 0" command will fail, because "composite" structure wasn't cleared properly on previous fail (on "fastboot 2" command). This patch fixes that erroneous behavior, allowing us to use composite even after previous failure. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* | board: tbs2910: Fix eMMC BOOTCFG valueSoeren Moch2016-03-02-1/+1
| | | | | | | | | | | | | | | | | | Fix the BOOTCFG value for eMMC in the same way as commit 214c3f0f9921250eb336c7effadcc16158ea9df5 [imx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failure] did for sabresd. Signed-off-by: Soeren Moch <smoch@web.de>
* | mx53ard: Move to booting zImageFabio Estevam2016-03-02-8/+10
| | | | | | | | | | | | | | | | | | | | Move to booting a zImage kernel by default to align with the other i.MX boards. While at it, adjust the fdt_addr so that we can boot a standard mainline kernel. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* | mx6qarm2: Update maintainer's emailsFabio Estevam2016-03-02-2/+2
| | | | | | | | | | | | Use the new NXP emails. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* | MAINTAINERS: Update Peng Fan's email addressFabio Estevam2016-03-02-3/+3
| | | | | | | | | | | | | | Use Peng Fan's new NXP email address in MAINTAINERS files. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* | colibri-vf: Disable pull-up configuration in GPIO pin muxBhuvanchandra DV2016-03-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | During very early boot-ROM execution the pinmux configuration isi in Hi-Z state. If pull-up is enabled on GPIO pad's there will be a short period of toggle from high to low on the IO when GPIO is set low during boot. To avoid this glitch, disable pull-up configuration in GPIO pinmux. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
* | Prepare v2016.03-rc3Tom Rini2016-02-29-1/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: dra7xx: Define Android partition tableSam Protsenko2016-02-29-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "fastboot oem format" command reuses "gpt write" command, which in turn requires correct partitions defined in $partitions variable. This patch adds such definition of Android partitions for DRA7XX EVM board. By default $partitions variable contains Linux partition table. In order to prepare Android environment one can run next commands from U-Boot shell: => env set partitions $partitions_android => env save After those operations one can go to fastboot mode and perform "fastboot oem format" to create Android partition table. While at it, enable CONFIG_RANDOM_UUID to spare user from providing UUIDs for each partition manually. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | sniper: Various minor cleanups, missing Kconfig configs and reorganisationPaul Kocialkowski2016-02-29-341/+339
| | | | | | | | | | | | | | | | This introduces some minor cleanups, regarding aspects such as board name, code and headers organization as well as deprecated and missing config options. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: start.S: fix typoYuichiro Goto2016-02-29-7/+7
| | | | | | | | | | | | Fix typo in comment about position of 'A' bit in several start.S. Signed-off-by: Yuichiro Goto <goto.yuichiro@espark.co.jp>
* | amcc-common.h: Disable CONFIG_SYS_LONGHELPTom Rini2016-02-29-1/+0
| | | | | | | | | | | | | | | | There are a number of AMCC platforms which are close to, or with some toolchains exceeding, the size constraints. Disable CONFIG_SYS_LONGHELP to get us room to build with again. Signed-off-by: Tom Rini <trini@konsulko.com>
* | compiler*.h: sync include/linux/compiler*.h with Linux 4.5-rc6Tom Rini2016-02-29-235/+383
| | | | | | | | | | | | | | | | | | | | Copy these from Linux v4.5-rc6 tag. This is needed so that we can keep up with newer gcc versions. Note that we don't have the uapi/ hierarchy from the kernel so continue to use <linux/types.h> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-02-29-837/+2956
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| * | ARM: uniphier: fix warnings reported by aarch64 compilerMasahiro Yamada2016-03-01-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UniPhier SoC family has not supported ARMv8 yet, but these would cause warnings if they were compiled with a 64bit compiler. Before adding the ARMv8 support really, fix them now. Because UniPhier SoCs do not support Large Physical Address Extension, casting "phys_addr_t" into "unsigned long" would carry the address as is. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: prepare directory structure for ARMv8 SoC supportMasahiro Yamada2016-03-01-11/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before adding ARMv8 support, this commit refactors the directory structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32 to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the "select CPU_V7" to the lower-level menu because we will have to select ARM64 instead of CPU_V7 for ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: rename PH1-LD10/PH1-sLD11 to PH1-LD20/PH1-LD11Masahiro Yamada2016-02-29-14/+14
| | | | | | | | | | | | | | | | | | | | | Due to the company's awful projecting, PH1-LD10 and PH1-sLD11 have been renamed to PH1-LD20 and PH1-LD11, respectively. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: rework UniPhier SoC select in KconfigMasahiro Yamada2016-02-29-39/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The chains of "depends on <SoC_name>" in the current Kconfig is clumsy. The idea here is to allow users to choose a SoC group first (SoC group consists of some SoCs that can coexist in one binary). Then, allow to enable/disable each SoC support in the selected SoC group. This makes the Kconfig menu clearer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: merge two defconfig filesMasahiro Yamada2016-02-29-35/+3
| | | | | | | | | | | | | | | | | | | | | | | | PH1-Pro5 support and ProXstream2/PH1-LD6b support can coexist in one image and there is bit more room in SPL to accommodate all of them. Merge uniphier_pro5_defconfig into uniphier_pxs2_defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: rename variable for DRAM controller base addressMasahiro Yamada2016-02-29-114/+113
| | | | | | | | | | | | | | | | | | Rename the variable that contains the base address for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: deprecate umc_dram_init_{start, poll}Masahiro Yamada2016-02-29-23/+18
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: remove unused macros for UMC base addressesMasahiro Yamada2016-02-29-11/+0
| | | | | | | | | | | | | | | | | | | | | These macros are no longer used. These base addresses are SoC-dependent, so they should not be placed in the header. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: rework DRAM size handling in UMC init codeMasahiro Yamada2016-02-29-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, DRAM size is converted twice: size in byte -> size in Gbit -> enum Optimize the code by converting the "size in byte" into enum directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: optimize PH1-Pro4 UMC init code with "for" loopMasahiro Yamada2016-02-29-55/+59
| | | | | | | | | | | | | | | | | | | | | Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: optimize PH1-LD4 UMC init code with "for" loopMasahiro Yamada2016-02-29-41/+49
| | | | | | | | | | | | | | | | | | | | | Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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