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| * | | | x86: pci: Don't return a vesa mode when there is not videoSimon Glass2015-01-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the video has not been set up, we should not return a success code. This can be detected by seeing if any of the variables are non-zero. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | x86: video: Add a debug() to display the frame buffer addressSimon Glass2015-01-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a way to display this address when booting. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Correct ifdtool microcode calculationSimon Glass2015-01-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This currently assumes that U-Boot resides at the start of ROM. Update it to remove this assumption. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Drop RAMTOP KconfigSimon Glass2015-01-13-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need this in U-Boot since we calculate it based on available memory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Correct XIP_ROM_SIZESimon Glass2015-01-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should default to the size of the ROM for faster execution before relocation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | x86: crownbay: Add pci devices in the dts fileBin Meng2015-01-13-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Topcliff PCH has 4 UART devices integrated (Device 10, Funciton 1/2/3/4). Add the corresponding device nodes in the crownbay.dts per Open Firmware PCI bus bindings. Also a comment block is added for the 'stdout-path' property in the chosen node, mentioning that by default the legacy superio serial port (io addr 0x3f8) is still used on Crown Bay as the console port. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Use ePAPR defined properties for x86-uartBin Meng2015-01-13-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ePAPR defined properties for x86-uart: clock-frequency and current-speed. Assign the value of clock-frequency in device tree to plat->clock of x86-uart instead of using hardcoded number. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | serial: ns16550: Support ns16550 compatible pci uart devicesBin Meng2015-01-13-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are many pci uart devices which are ns16550 compatible. We can describe them in the board dts file and use it as the U-Boot serial console as specified in the chosen node 'stdout-path' property. Those pci uart devices can have their register be memory-mapped, or i/o-mapped. The driver will try to use the memory-mapped register if the reg property in the node has an entry to describe the memory-mapped register, otherwise i/o-mapped register will be used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | fdt: Add several apis to decode pci device nodeBin Meng2015-01-13-26/+257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
| * | | | x86: Simplify the fsp hob access functionsBin Meng2015-01-12-100/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the troublesome union hob_pointers so that some annoying casts are no longer needed in those hob access routines. This also improves the readability. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | pci: Make pci apis usable before relocationBin Meng2015-01-12-14/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a gd->hose to save the pci hose in the early phase so that apis in drivers/pci/pci.c can be used before relocation. Architecture codes need assign a valid gd->hose in the early phase. Some variables are declared as static so change them to be either stack variable or global data member so that they can be used before relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which just affects some print format. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Support pci bus scan in the early phaseBin Meng2015-01-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On x86, some peripherals on pci buses need to be accessed in the early phase (eg: pci uart) with a valid pci memory/io address, thus scan the pci bus and do the corresponding resource allocation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Add missing DECLARE_GLOBAL_DATA_PTR for pci.cBin Meng2015-01-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/x86/cpu/pci.c has access to the U-Boot global data thus DECLARE_GLOBAL_DATA_PTR is needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Clean up the board dts filesBin Meng2015-01-12-24/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits cleans up the board dts files. - Correct the serial port register size to 8 - Remove the misleading status = "disabled" statement in the serial.dtsi - Move the inclusion of skeleton.dtsi from serial.dtsi to board dts files - Let the board dts file define stdout-path in the chosen node - Remove device nodes in board dts files thar are duplicated to skeleton.dtsi Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Rename coreboot.dsti to serial.dtsiBin Meng2015-01-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The name of coreboot.dtsi is misleading, as it actually describes the legacy serial port device node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Remove alex.dts in arch/x86/dtsBin Meng2015-01-12-25/+0
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | No board is using alex.dts, so remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | PM9G45 adding generic board supportGeorgi Botev2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Georgi Botev <botev@ronetix.at>
* | | | PM9261 adding generic board supportGeorgi Botev2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Georgi Botev <botev@ronetix.at>
* | | | PM9263 adding generic board supportGeorgi Botev2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Georgi Botev <botev@ronetix.at>
* | | | ppc4xx: switch VOM405 to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: switch PMC405DE to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: switch PLU405 to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: switch CPCI2DP to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: cleanup CPCI4052 boardMatthias Fuchs2015-01-13-4046/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - remove some obsolete code - switch to generic board Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove some CPCI405 variantsMatthias Fuchs2015-01-13-1126/+3
| | | | | | | | | | | | | | | | | | | | | | | | only keep CPCI4052 Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove G2000 boardMatthias Fuchs2015-01-13-1432/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove WUH405 boardMatthias Fuchs2015-01-13-4273/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove VOH405 boardMatthias Fuchs2015-01-13-8521/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove PMC405 boardMatthias Fuchs2015-01-13-498/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove PCI405 boardMatthias Fuchs2015-01-13-2589/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove OCRTC boardMatthias Fuchs2015-01-13-632/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove HUB405 boardMatthias Fuchs2015-01-13-679/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove HH405 boardMatthias Fuchs2015-01-13-21529/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove DU440 boardMatthias Fuchs2015-01-13-1440/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove DU405 boardMatthias Fuchs2015-01-13-2033/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove DP405 boardMatthias Fuchs2015-01-13-481/+2
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove CPCIISER4 boardMatthias Fuchs2015-01-13-4667/+0
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove CMS700 boardMatthias Fuchs2015-01-13-626/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove ASH405 boardMatthias Fuchs2015-01-13-5636/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppc4xx: remove AR405 boardMatthias Fuchs2015-01-13-11165/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | ppx4xx: remove APC405 boardMatthias Fuchs2015-01-13-6057/+1
| | | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | | m68k: remove TASREG boardMatthias Fuchs2015-01-13-11565/+1
|/ / / | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Stefan Roese <sr@denx.de>
* | | Prepare v2015.01Tom Rini2015-01-12-1/+1
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | Nokia RX-51: Do not call secure PPA routine on non secure devicesPali Rohár2015-01-12-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 41623c91b09a0c865fab41acdaff30f060f29ad6 u-boot running in qemu is crashing in function do_omap3_emu_romcode_call(). RX-51 board uses this function for Cortex-A8 errata 430973 workaround (Set IBE bit in ACR) which is needed only on real secure device and not in qemu. This board patch just disable calling secure PPA routine on non secure devices. Qemu implements GP device and with this patch u-boot is working in qemu again. Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz>
* | | powerpc: xes: Add maintainerPeter Tyser2015-01-12-4/+4
| | | | | | | | | | | | | | | | | | Add Peter Tyser as the maintainer of Extreme Engineering Solutions products. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* | | powerpc: xes: Convert to generic boardJohn Schmoller2015-01-12-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Convert Extreme Engineering Solutions products to use generic board support. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* | | ARM: remove redudant information from Kconfig filesMasahiro Yamada2015-01-12-30/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | - "string" type for SYS_* is defined in arch/Kconfig - SYS_CPU "armv7" has been replaced with "select CPU_V7" - SYS_SOC "tegra124" is already defined in tegra124/Kconfig Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Bo Shen <voice.shen@atmel.com>
* | | omap: beagle_x15: add MAINTAINERSMasahiro Yamada2015-01-12-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Commit 1e4ad74b875f (beagle_x15: add board support for Beagle x15) missed to add board/ti/beagle_x15/MAINTAINERS. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Felipe Balbi <balbi@ti.com>
* | | stv0991: record defconfig ownership in MAINTAINERSMasahiro Yamada2015-01-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This commit fixes warnings reported by tools/genboardscfg.py. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Vikas Manocha <vikas.manocha@st.com> Acked-by: Vikas Manocha <vikas.manocha@st.com>
* | | ARM: kirkwood: dns325: Add generic board supportStefan Herbrechtsmeier2015-01-12-0/+1
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
generated by cgit v1.1 at 2024-10-26 14:24:54 +0000