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* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-07-327/+285
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| * dm: core: Enable SPL_SIMPLE_BUS by defaultMichal Simek2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | This option is needed for all SoCs which have nodes on bus. Without enabling this drivers are not found and probed. Issue was found on Zynq MMC probe. Enable this option by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: cmd: Relocate subcommands when MANUAL_RELOCMichal Simek2015-12-07-0/+14
| | | | | | | | | | | | | | | | Subcommands contain pointers to functions which are not updated when MANUAL_RELOC is enabled. This patch fix it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * i2c: cmd: Relocate subcommands when MANUAL_RELOCMichal Simek2015-12-07-4/+12
| | | | | | | | | | | | | | | | | | Subcommands contain pointers to functions which are not updated when MANUAL_RELOC is enabled. This patch fix it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * serial: zynq: Remove duplicated headerMichal Simek2015-12-07-3/+0
| | | | | | | | | | | | | | | | debug_uart.h is included twice. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * serial: zynq: Fix incorrect reference to s5p driverMichal Simek2015-12-07-2/+2
| | | | | | | | | | | | | | | | Remove this c&p error from s5p driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * zynq: sdhci: Move driver to DMMichal Simek2015-12-07-59/+37
| | | | | | | | | | | | | | Move driver to DM Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * zynq: sdhci: Remove zynq_sdhci_of_init()Michal Simek2015-12-07-28/+0
| | | | | | | | | | | | Prepare for using DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: sdhci: Calculate minimum frequency based on max frequencySiva Durga Prasad Paladugu2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | Calculate the minimum sd clock based on max clock. This will be done by add_sdhci() if we pass minimum clock as zero. It also does based on SD host contoller version. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Remove unused SERIAL macros for serial_zynqMichal Simek2015-12-07-5/+0
| | | | | | | | | | | | Remove unused macros when driver was moved to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Extend malloc sizeMichal Simek2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL DM MMC FAT requires more malloc space(3k fat buffers + dm) that it is available now. Extend SPL malloc space. Current OCM layout: 0xffff0000 - 0xfff2000 - Full malloc space 0xffff2000 - 0xffff300 - Stack location 0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space 0xfffffd00 - sizeof(GD) - GD 0xfffffe00 - 0xffffffff - SoC specific boot code Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix location of stack and malloc areasMichal Simek2015-12-07-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch "board_init: Change the logic to setup malloc_base" (sha1: 9ac4fc82071ce346e3885118242ff45d22f69b82) breaks SPL for Zynq because it puts early alloc area on the stack which caused that stack was decreased by CONFIG_SYS_MALLOC_F_LEN (0x400) and there was not enough space for regular stack. This patch changes memory layout to better utilize the last 64k OCM block. 0xffff0000 - 0xfff1000 - Full malloc space 0xffff1000 - 0xffff300 - Stack location 0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space 0xfffffd00 - sizeof(GD) - GD 0xfffffe00 - 0xffffffff - SoC specific boot code Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Moritz Fischer <moritz.fischer@ettus.com>
| * ARM: zynq: Enable debug console for zc702Michal Simek2015-12-07-0/+4
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable FIT config option via KconfigMichal Simek2015-12-07-3/+2
| | | | | | | | | | | | Remove configuration options from board file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Enable CTRL+C in wait_for_bitMichal Simek2015-12-07-0/+6
| | | | | | | | | | | | | | Enable to break waiting loop at any time. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Move gem to KconfigMichal Simek2015-12-07-27/+19
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * net: gem: Read information about interface from DTMichal Simek2015-12-07-8/+12
| | | | | | | | | | | | | | Do not set interface via configs. Read information from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * net: gem: Move driver to DMMichal Simek2015-12-07-115/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | - Enable DM_ETH by default for Zynq and ZynqMP - Remove board_eth_init code - Change miiphy_read function to return value instead of error code based on DM requirement - Do not enable EMIO DT support by default Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * net: gem: Fix miiphy_read nameMichal Simek2015-12-07-2/+2
| | | | | | | | | | | | | | Sync it with write function. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * net: gem: Remove zynq_gem_of_init()Michal Simek2015-12-07-43/+0
| | | | | | | | | | | | | | | | | | This function was used for OF init before DM. Remove this function as the part of move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * net: gem: Enable MDIO bus earlierMichal Simek2015-12-07-5/+9
| | | | | | | | | | | | | | Enable access to MDIO before zynq_gem_init is called. It enables read information about phy earlier. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Check if priv->phydev is validMichal Simek2015-12-07-0/+2
| | | | | | | | | | | | | | Check return value. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * net: gem: Extract phy init codeMichal Simek2015-12-07-17/+30
| | | | | | | | | | | | | | Move phy init code out of zynq_gem_init. DM drivers are normally calling this code from probe function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Remove phydev variableMichal Simek2015-12-07-13/+10
| | | | | | | | | | | | | | Resort code to use priv->phydev variable directly. It will simplify move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Change mii function not to use eth_device structureMichal Simek2015-12-07-13/+19
| | | | | | | | | | | | | | | | Next step to move driver to driver model. Do not use eth_device structure. Use private structure instead. Add iobase to private structure to store gem iobase. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Change mdio_wait prototype to pass regsMichal Simek2015-12-07-4/+3
| | | | | | | | | | | | | | Pass regs instead of dev because this will be chagned by driver model. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Do not continue if phy is not foundMichal Simek2015-12-07-4/+10
| | | | | | | | | | | | | | | | Add return value for phy detection algorithm to stop init function when phy is not found. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: zynq: Remove CONFIG_APIMichal Simek2015-12-07-1/+0
| | | | | | | | | | | | | | | | CONFIG_API is causing compilation error when DM_ETH is enabled because eth_get_dev() is not available. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: zynq: Remove PHYLIB from config to defconfigMichal Simek2015-12-07-1/+10
| | | | | | | | | | | | | | Move PHYLIB from board config to defconfig Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | Merge git://git.denx.de/u-boot-niosTom Rini2015-12-06-2/+97
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| * | altera_qspi: fix erase and write error codeThomas Chou2015-12-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix erase and write error code, which should be "protected". From the "Embedded Peripherals IP User Guide" of Altera, The "Illegal write" flag indicates that a write instruction is targeting a protected sector on the flash memory. This bit is set to indicate that the IP has cancelled a write instruction. The "Illegal erase" flag indicates that an erase instruction has been set to a protected sector on the flash memory. This bit is set to indicate that the IP has cancelled the erase instruction. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * | altera_qspi: add lock unlock opsThomas Chou2015-12-06-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | Add lock() and unlock() mtd ops to altera_qspi. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
* | | Merge git://git.denx.de/u-boot-usbTom Rini2015-12-06-22/+203
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| * | | usb: xhci: zynqmp: Removing unused function usb_phy_resetMarek Vasut2015-12-07-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | usb: xhci: fsl: Removing unused function usb_phy_resetRajesh Bhagat2015-12-07-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
| * | | usb: xhci: dwc3: Adding reset delay requirement as per dwc3 databookRajesh Bhagat2015-12-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per dwc3 databook, delay is required before taking the core out of reset. This delay is required so that the PHY are stable, and then we can take core out of reset. Reference is taken from linux dwc3 code, file: drivers/usb/dwc3/core.c. Signed-off-by: Sriram Dash <sriram.dash@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
| * | | usb: add support for generic EHCI devicesAlexey Brodkin2015-12-07-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is meant to be used with any EHCI-compatible host controller in case if there's no need for platform-specific glue such as setup of controller or PHY's power mode via GPIOs etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de>
| * | | sunxi: usb: Rename the sunxi usb driver DM entryMarek Vasut2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DM entry should be unique, otherwise it will collide with other drivers. Fix this by assigning the driver a more unique name than usb_ehci. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Simon Glass <sjg@chromium.org>
| * | | usb: zynqmp: Fix build warningsMarek Vasut2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver does "return 0" in function with void type. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | | drivers:usb:fsl: Add T4080 as affected soc for Erratum A007792 sw workaroundRajesh Bhagat2015-12-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apply Erratum A007792 sw workaround for T4080 Signed-off-by: Sriram Dash <sriram.dash@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
| * | | usb: dwc3: fix build warningsFelipe Balbi2015-12-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following build warnings: drivers/usb/dwc3/core.c: In function ‘dwc3_uboot_init’: drivers/usb/dwc3/core.c:625:6: warning: ‘dev’ is used uninitialized in this function [-Wuninitialized] mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); ^ drivers/usb/dwc3/dwc3-omap.c: In function ‘dwc3_omap_uboot_init’: drivers/usb/dwc3/dwc3-omap.c:380:7: warning: ‘dev’ is used uninitialized in this function [-Wuninitialized] omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL); Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | | usb: host: xhci-omap: fix build breakFelipe Balbi2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following build break: drivers/usb/host/xhci-omap.c:35:5: error: ‘board_usb_init’ aliased to external symbol ‘__board_usb_init’ int board_usb_init(int index, enum usb_init_type init) ^ Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | | usb: zynqmp: Enable USB XHCI supportSiva Durga Prasad Paladugu2015-12-07-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Enable USB XHCI support for ZynqMP Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | | usb: zynqmp: Add XHCI driver supportSiva Durga Prasad Paladugu2015-12-07-0/+146
| | |/ | |/| | | | | | | | | | | | | Added USB XHCI driver support for zynqmp. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* | | arm: socfpga: Enable CONFIG_DM_MMCMarek Vasut2015-12-07-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable driver model MMC support on SoCFPGA. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | | mmc: dwmmc: socfpga: Convert to DMMarek Vasut2015-12-07-76/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the SoCFPGA shim for registering the DWMMC driver to DM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | | arm: socfpga: Remove cpu_mmc_init()Marek Vasut2015-12-07-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function triggers the registration of the dwmmc driver on SoCFPGA, but this is not needed in case the driver is correctly probed from DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | | arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese2015-12-07-1/+1605
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* | am33xx: Update serial pdataTom Rini2015-12-06-11/+7
| | | | | | | | | | | | | | | | We now want to make sure that we have the platform data for NS16550 when we do not have OF_CONTROL set. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: tegra: Provide serial platform data for SPLSimon Glass2015-12-05-1/+1
| | | | | | | | | | | | | | | | | | | | At present an incorrect #if term is preventing this data from being compiled in. All tegra boards use driver model for serial, so we can just drop this. Fixes: fde7e18938d8 ("dm: tegra: pci: Move CONFIG_PCI_TEGRA to Kconfig") Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thomas Chou <thomas@wytron.com.tw>
generated by cgit v1.1 at 2024-11-09 08:08:18 +0000