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* cmd: dfu: Add error handling for board_usb_initMichal Simek2016-11-03-1/+5
| | | | | | board_usb_init() can failed and error should be handled properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Prepare v2016.11-rc3Tom Rini2016-10-31-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* README: fix typo candiate -> candidateJelle van der Waa2016-10-31-1/+1
| | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
* travis.yml: Add in uniphier as a job, modify aarch64 builds a bitTom Rini2016-10-31-4/+7
| | | | | | | | | | - Add in system aarch64-linux-gnu toolchain - Now that all VMs will have aarch64 available, don't exclude them from other jobs but instead exclude them from the catch-all aarch64 build - Add JOB= to the Freescale/ARM build to be clear about what it does. - Add uniphier as a stand-alone job Signed-off-by: Tom Rini <trini@konsulko.com>
* mkimage: Fix missing free() in show_valid_options()Simon Glass2016-10-31-0/+1
| | | | | | | | The allocated memory should be freed. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 150963) Reviewed-by: Tom Rini <trini@konsulko.com>
* cmd: load: align cache flushChris Packham2016-10-31-1/+1
| | | | | | | | Prevent cache misalignment message by ensuring that a whole cache line is flushed. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* Fix spelling of "resetting".Vagrant Cascadian2016-10-31-10/+13
| | | | | | | | Cover-Letter: Fixes several spelling errors for the words "resetting", "extended", "occur", and "multiple". Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix spelling of "extended".Vagrant Cascadian2016-10-31-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix spelling of "occur".Vagrant Cascadian2016-10-31-2/+2
| | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Angelo Dureghello <angelo@sysam.it> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix spelling of "multiple".Vagrant Cascadian2016-10-31-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* omap3logic: Fix Auto detect Logic PD ModelsAdam Ford2016-10-31-0/+4
| | | | | | | | The autodetect feature doesn't allow users to specify the device tree. This fix will make it only autodetect if 'fdtimage' is not defined. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* OMAP3: omap3_logic: Add scripts to boot over network.Adam Ford2016-10-31-3/+16
| | | | | | | | Not all networks have a DHCP server configured properly, so these scripts make it easier to boot in that scenario. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* OMAP3: omap3_logic: Remove LCD preboot infoAdam Ford2016-10-31-20/+0
| | | | | | | | | | The LCD isn't supported in U-Boot and the LCD is now configured in the device tree, so this code is pointless. V2: Eliminiate erroneous newline. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ti: common: board_detect: Return a valid empty string for un-initialized eepromNishanth Menon2016-10-31-15/+9
| | | | | | | | | | | | | | | | | | | | | | | Current logic for query of revision, board_name, config returns NULL. Users of these functions do a direct strncmp to compare. Unfortunately, as per conventions require two valid strings to compare against and the current implementation causes a crash when compared with NULL. We'd still like to maintain the simplistic usage of these APIs instead of redundant if (string) res=strncmp(fn(),"cmp",n); flowing all over the place. Hence, since the version, name and config is already pre-initialized with empty string, just dont check for invalid header in the first place and return the empty string to the caller. Reported-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Correct was'nt -> wasn't typo] Signed-off-by: Tom Rini <trini@konsulko.com>
* ti: common: board_detect: Setup initial default value for config as wellNishanth Menon2016-10-31-0/+2
| | | | | | | | config should have been initialized along with others as defaults. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ti: common: board_detect: Replace hardcoded value with macroNishanth Menon2016-10-31-1/+1
| | | | | | | | | We should have used TI_DEAD_EEPROM_MAGIC in the first place. Fixes: d3b98a9eb941 ("ti: common: dra7: Add standard access for board description EEPROM") Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* cosmetic: Fix indentation in READMEAlexander von Gernler2016-10-31-1/+1
| | | | Signed-off-by: Alexander von Gernler <grunk@pestilenz.org>
* Merge branch 'sun9i-a80-spl' of http://git.denx.de/u-boot-sunxiTom Rini2016-10-30-28/+1718
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| * sunxi: Add support for Cubieboard4Chen-Yu Tsai2016-10-30-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | The Cubieboard4 is an A80 SoC based development board from Cubietech. This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector, HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT combo chip, headphone and microphone jacks, IR receiver, and GPIO headers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Enable SPL support for A80 Optimus boardChen-Yu Tsai2016-10-30-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A80 Optimus Board was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii. This board has a UART port, a JTAG connector, 2 USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash, 2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig instead of adding a new defconfig] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Add default zq value for sun9i (A80)Chen-Yu Tsai2016-10-30-0/+1
| | | | | | | | | | | | | | | | | | Both the A80 Optimus board and the Cubieboard 4 use a zq value of 4145117, or 0x3f3fdd. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Add support for SID e-fuses on sun9iChen-Yu Tsai2016-10-30-0/+2
| | | | | | | | | | | | | | | | | | The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses are at an offset of 0x200 within the SID address space. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80)Chen-Yu Tsai2016-10-30-1/+1
| | | | | | | | | | | | | | | | In Allwinner's SDK the A80 is clocked to 1008 MHz by default. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: add MMC pinmux setup for SDC2 on sun9iPhilipp Tomsich2016-10-30-0/+7
| | | | | | | | | | | | | | | | The A80 can support 8-bit eMMC with reset on the PC pingroups. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: enable SPL for sun9iPhilipp Tomsich2016-10-30-0/+1
| | | | | | | | | | | | | | | | | | | | Now that DRAM initialization and clock setup is supported, we can enable SPL for the A80. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: add initial clock setup for sun9i for SPLPhilipp Tomsich2016-10-30-5/+223
| | | | | | | | | | | | | | | | | | | | This is a cleaned up version set_pll() from Allwinner's boot0 source (bootloader/basic_loader/bsp/bsp_for_a80/common/common.c). [wens@csie.org: Added commit message; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Enable SMP mode for the boot CPU on sun9i (A80)Philipp Tomsich2016-10-30-1/+2
| | | | | | | | | | | | | | | | | | | | Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: add gtbus-initialisation for sun9iPhilipp Tomsich2016-10-30-1/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On sun9i, the GTBUS manages transaction priority and bandwidth for multiple read ports when accessing DRAM. The initialisation mirrors the settings from Allwinner's boot0 for now, even though this may not be optimal for all applications (e.g. headless systems might want to give priority to IO modules). Adding a common callout to gtbus_init() from the SPL clock init with a weakly defined implementation in sunxi/clock.c to fallback to for platforms that don't require this. [wens@csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: DRAM initialisation for sun9iPhilipp Tomsich2016-10-30-15/+1273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds used. With this DRAM setup, we have verified DDR3 clocks of up to 792MHz (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration. [wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks] [hdegoede@redhat.com: Fix checkpatch warnings] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-10-30-22/+67
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| * tools: add mksunxiboot to tools-all targetStefan Brüns2016-10-30-1/+2
| | | | | | | | | | | | | | mksunxiboot is useful outside of u-boot, it is e.g. used by sunxi-tools. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: A64: enable USB supportAmit Singh Tomar2016-10-30-6/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly by adding MACH_SUN50I to some existing #ifdefs enable support for the the HCI0 USB host controller on the A64. Fix up some minor 64-bit hiccups on the way. Add the bare minimum DT bits to the A64 .dtsi and enable the controllers and the PHY on the Pine64. This is limited to the first USB controller at the moment, which is connected to the lower USB socket on the Pine64 board. [Andre: remove unneeded defines, enable OHCI, add commit message] Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Update DRAM clock for Olimex A20 boardsStefan Mavrodiev2016-10-30-1/+1
| | | | | | | | | | | | | | | | | | Originally dram clock was set to 480MHz, but this behaves unstable. To improve stability the clock is reduced to 384MHz Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: dts: Pine64: add Ethernet aliasAndre Przywara2016-10-30-0/+1
| | | | | | | | | | | | | | | | | | | | | | The sun8i-emac driver works fine with the A64 Ethernet IP, but we are missing an alias entry to trigger the driver instantiation by U-Boot. Add the line to point U-Boot to the Ethernet DT node. This enables TFTP boot on the Pine64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT definesMasahiro Yamada2016-10-30-5/+0
| | | | | | | | | | | | | | | | | | ARCH_SUNXI selects DM_USB, where CONFIG_USB_MAX_CONTROLLER_COUNT is not used. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXIJagan Teki2016-10-30-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SUNXI -> CONFIG_ARCH_SUNXI and removed CONFIG_SUNIX from config_whitelist.txt Cc: Simon Glass <sjg@chromium.org> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-10-29-2/+45
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| * | dm: mmc: socfpga: fix MMC_OPS supportSylvain Lesne2016-10-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at runtime. This adds the missing fields in the driver declaration. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See2016-10-27-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable configuration of sdr.ctrlcfg.extratime1 register which enable extra clocks for read to write command timing. This is critical to ensure successful LPDDR2 interface Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-10-29-33/+21
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| * | | drivers: USB: OHCI: allow compilation for 64-bit targetsAndre Przywara2016-10-29-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OHCI has a known limitation of allowing only 32-bit DMA buffer addresses, so we have a lot of u32 variables around, which are assigned to pointers and vice versa. This obviously creates issues with 64-bit systems, so the compiler complains here and there. To allow compilation for 64-bit boards which use only memory below 4GB anyway (and to avoid more invasive fixes), adjust some casts and types and assume that the EDs and TDs are all located in the lower 4GB. This fixes compilation of the OHCI driver for the Pine64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
| * | | usb: xhci-mvebu: use xhci_deregister() for .remove callbackMasahiro Yamada2016-10-27-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | No need to use a wrapper that is equivalent to xhci_deregister(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-11-05 11:51:12 +0000