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| | * | spi: ti_qspi: Add delay for successful bulk erase.Poddar, Sourav2014-04-17-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bulk erase is not happening properly on dra7 due to erase timing constraints, add a delay so that erase timing constraints are properly met. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Yebio Mesfin <ymesfin@ti.com>
| | * | TI:armv7: Change Falcon Mode DT load addressTom Rini2014-04-17-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In general, we want to load the DT at base+128MB, so that we ahve sufficient room for the kernel and a larger device tree. In the case of OMAP3, use 64MB instead as we have a number of boards with 128MB DDR. Signed-off-by: Tom Rini <trini@ti.com>
| | * | TI:omap5: Move CONFIG_ENV_SIZE to board config filesTom Rini2014-04-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of the environment depends on the backing store, move this to the board config files. Signed-off-by: Tom Rini <trini@ti.com>
| | * | am43xx_evm: Update the ramdisk args, we pass things in just fine via DTTom Rini2014-04-17-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| | * | am335x_evm: Update the ramdisk args, we pass things in just fine via DTTom Rini2014-04-17-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| | * | TI: Add, use a DEFAULT_LINUX_BOOT_ENV environment stringTom Rini2014-04-17-16/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To deal with a reoccurring problem properly we need to specify addresses for the Linux kernel, Flatted Device Tree and ramdisk that obey the constraints within the kernel's Documentation/arm/Booting file but also make sure that we relocate things within a valid address range. It is possible with these addresses to also set fdt_high and initrd_high to the value of 0xffffffff. We don't do this by default to allow for the most likely success of people using custom addresses however. Signed-off-by: Tom Rini <trini@ti.com>
| | * | spl_mmc/CONFIG_SPL_OS_BOOT: Allow environment to determine what to bootTom Rini2014-04-17-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We add two new environment variables, falcon_args_file and falcon_image_file, which when set will override the compiled in default values for falcon mode. Signed-off-by: Tom Rini <trini@ti.com>
| | * | a3m071: Make spl_start_uboot test like getenv_yesno doesTom Rini2014-04-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change makes the behaviour slightly more rebust and will match other implementations which can use getenv_yesno directly. Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
| | * | README.falcon: Document environment variables for falcon modeTom Rini2014-04-17-0/+9
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| | * | README: Add CONFIG_SPL_OS_BOOT to READMETom Rini2014-04-17-0/+4
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| | * | am335x_evm: Make SPL_OS also check the boot_os variable for falcon modeTom Rini2014-04-17-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the same variable as a3m071 in the environment to determine if we should boot into Linux or U-Boot. This is useful on boards like Beaglebone Black or AM335x GP EVM where we have persistent storage for the environment. Signed-off-by: Tom Rini <trini@ti.com>
| | * | mtd: Build nand_util.o for CONFIG_ENV_IS_IN_NAND in SPLTom Rini2014-04-17-0/+3
| | | | | | | | | | | | | | | | | | | | Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
| | * | mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPLTom Rini2014-04-17-27/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mainly converts the am335x_spl_bch driver to the "normal" format which means a slight change to nand_info within the driver. Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
| | * | env_mmc.c: Remove NULL check on tmp_env1/2Tom Rini2014-04-17-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With 452a272 we moved to allocating these variables on the stack. So they will never now be NULL so remove these checks. Signed-off-by: Tom Rini <trini@ti.com>
| | * | env_mmc.c: Allow environment to be used within SPLTom Rini2014-04-17-8/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Inside of SPL we only concern ourself with one MMC device, so instead of being able to use CONFIG_SYS_MMC_ENV_DEV we need to use 0 in SPL. Switch the code to use a 'dev' variable to facilitate this. Signed-off-by: Tom Rini <trini@ti.com>
| | * | fw_env.c: Switch get_config to use '%ms' in sscanfTom Rini2014-04-17-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently limit ourself to 16 characters for the device name to read the environment from. This is insufficient for /dev/mmcblk0boot1 to work for example. Switch to '%ms' which gives us a dynamically allocated buffer instead. We're short lived enough to not bother free()ing the buffer. Signed-off-by: Tom Rini <trini@ti.com>
| | * | OMAP3: beagle-xm: generate fake USB ethernet MAC address from dieidNishanth Menon2014-04-17-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to OMAP5uEVM, PandaBoard, BeagleBoard-XM has a USB based ethernet without MAC address embedded. So fake a MAC address following the similar strategy used on OMAP5 and PandaBoard family. Signed-off-by: Nishanth Menon <nm@ti.com>
| | * | omap3/sys_info: provide interface to read die idNishanth Menon2014-04-17-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | introduce get_die_id() function which allows generation of information such as fake MAC address from the processor ID code. Signed-off-by: Nishanth Menon <nm@ti.com>
| | * | OMAP: common: consolidate fake USB ethernet MAC address creationNishanth Menon2014-04-17-32/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TI platforms such as OMAP5uevm, PandaBoard, use equivalent logic to generate fake USB MAC address from device unique DIE ID. Consolidate this to a generic location such that other TI platforms such as BeagleBoard-XM can also use the same. NOTE: at this point in time, I dont yet see a need for a generic dummy ethernet MAC address creation function, but if there is a need in the future, this can be further abstracted out. Signed-off-by: Nishanth Menon <nm@ti.com>
| | * | ARM: OMAP: replace custom sr32() by standard I/O accessorsWolfgang Denk2014-04-17-163/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the custom bit manipulation function sr32() by standard I/O accessors. A major motivation for this cleanup was the fact, that a number of calls of that function resulted in 32 bit wide shift operations on u32 data, which according to the C-ISO/IEC-9899-Standard provokes undefined behaviour: 6.5.7 Bitwise shift operators ... If the value of the right operand is negative or is greater than or equal to the width of the promoted left operand, the behavior is undefined. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * | ARM: OMAP: hide custom bit manipulation function sr32()Wolfgang Denk2014-04-17-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only remaining user of the custom bit manipulation function sr32() is arch/arm/cpu/armv7/omap3/clock.c, so make it a static function in that file to prepare complete removal. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * | ARM: OMAP: remove sr32() from OMAP board codeWolfgang Denk2014-04-17-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the custom sr32() bit manipulation function in arch/arm/cpu/armv7/omap3/board.c and board/ti/panda/panda.c by standard I/O accessors. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | | Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-21-6108/+4384
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| | * | | ARM: tegra: pack pinmux data tables tighterStephen Warren2014-04-17-41/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use smaller fields in the Tegra pinmux structures in order to pack the data tables into a smaller space. This saves around 1-3KB for the SPL and around 3-8KB for the main build of U-Boot, depending on the board, which SoC it uses, and how many pinmux table entries there are. In order to pack PMUX_FUNC_* into a smaller space, don't hard-code the values of PMUX_FUNC_RSVD* to values which require 16 bits to store them, but instead let their values be assigned automatically, so they end up fitting into 8 bits. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | usb: tegra: combine header fileStefan Agner2014-04-17-755/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Combine the Tegra USB header file into one header file for all SoCs. Use ifdef to account for the difference, especially Tegra20 is quite different from newer SoCs. This avoids duplication, mainly for Tegra30 and newer devices. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | usb: tegra: fix PHY configurationStefan Agner2014-04-17-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra30 and later, the PTS (parallel transceiver select) and STS (serial transceiver select) are part of the HOSTPC1_DEVLC_0 register rather than PORTSC1_0 register. Since the reset configuration usually matches the intended configuration, this error did not show up on Tegra30 devices. Also use the slightly different bit fields of first USB, (USBD) on Tegra20 and move those definitions to the Tegra20 specific header file. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | usb: tegra: fix USB2 powerdown for Tegra30 and laterStefan Agner2014-04-17-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register which brings USB2 in UTMI mode to work. This was clearly missing since the forced powerdown bit is set in reset by default for all USB ports. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: add Jetson TK1 boardStephen Warren2014-04-17-0/+428
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Tegra124 pinmux cleanupStephen Warren2014-04-17-744/+706
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra124_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. There are differences in the set of drive groups. I have validated this against the TRM. There are differences order of pin definitions in pinmux.c; these previously had significant mismatches with the correct order:-( I adjusted a few entries in pinmux-config-venice2.h since the set of legal functions for some pins was updated to match the TRM. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Tegra114 pinmux cleanupStephen Warren2014-04-17-753/+680
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra114_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted a few entries in pinmux-config-dalmore.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Tegra30 pinmux cleanupStephen Warren2014-04-17-1151/+1082
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra30_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted one entry in pinmux-config-cardhu.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Tegra20 pinmux cleanupStephen Warren2014-04-17-412/+397
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: pinmux naming consistency fixesStephen Warren2014-04-17-217/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: reduce public pinmux APIStephen Warren2014-04-17-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove a few unused functions from the pinmux header. They aren't currently used, and removing them prevents any new usage from appearing. This will ease moving to just pinmux_config_table() and padgrp_config_table() in the future. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: pinctrl: remove duplicationStephen Warren2014-04-17-2072/+732
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the duplication by creating pinmux-common.c for all the identical code. This leaves: * arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of the various pins/pin groups, drive groups, and mux functions. * arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table stating which pin groups support which mux functions. The code in pinmux-common.c is semantically identical to that in the various original pinmux.c, but had some consistency and cleanup fixes applied during migration. I removed the definition of struct pmux_tri_ctlr, since this is different between SoCs (especially Tegra20 vs all others), and it's much simpler to deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c, and warmboot_avp.c needed updates due to this, since they previously hijacked this struct to encode the location of some non-pinmux registers. Now, that code simply calculates these register addresses directly using simple and obvious math. I like this method better irrespective of the pinmux code cleanup anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: use apb_misc.h in more placesStephen Warren2014-04-17-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's "APB misc" register region contains various miscellaneous registers and the Tegra pinmux registers. Some code that touches the misc registers currently uses struct pmux_tri_ctlr, which is intended to be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl, which is intended to be a definition of the miscellaneous registers. Convert all such code to use struct apb_misc_pp_ctrl, since struct pmux_tri_ctlr goes away in the next patch. This requires adding a missing field definition to struct apb_misc_pp_ctrl, and moving the header into a more common location. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: prototype pinmux_init() in board.hStephen Warren2014-04-17-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pinmux_init() is a board-level function, not a pinmux driver function. Move the prototype to a board header rather than the driver header. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: pinctrl: make pmux_func values consistent on Tegra20Stephen Warren2014-04-17-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For consistency with other SoCs, modify Tegra20's enum pmux_func to: * Remove PMUX_FUNC values that aren't real * Use the same PMUX_FUNC_RSVD[1-4] values, and ensure (RSVD1 & 3)==0; this will be assumed by pinmux_set_func() in a future patch. Unfortunately, PMUX_FUNC_RSVD is still used in the pin macros. Use a private define inside the driver to prevent this from causing compilaton errors. This will be cleaned up when the pin tables are re-written in a later patch in this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: pinctrl: remove vddioStephen Warren2014-04-17-86/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: pinctrl: remove func_safeStephen Warren2014-04-17-24/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-sparcTom Rini2014-05-09-16/+28
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| * | | | leon: implement missing get_tbclk()Daniel Hellstrom2014-05-08-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch SPARC/LEON does not build. Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | | | leon: use CONFIG_SYS_HZ to config timer prescalerDaniel Hellstrom2014-05-08-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before it was hardcoded to 1000 ticks per second. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | | | serial: zynq: Fix typo in suffix function nameMichal Simek2014-05-08-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 's/zynq_serial_initalize/zynq_serial_initialize/g' serial_initialize is used by all serial drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | serial: zynq: Remove sparse warningsMichal Simek2014-05-08-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warnings: drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_init' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_setbrg' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_getc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_tstc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_putc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_puts' was not declared. Should it be static? drivers/serial/serial_zynq.c:182:22: warning: symbol 'uart_zynq_serial0_device' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_init' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_setbrg' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_getc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_tstc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_putc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_puts' was not declared. Should it be static? drivers/serial/serial_zynq.c:185:22: warning: symbol 'uart_zynq_serial1_device' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | i2c: zynq: Fixed compilation errors when using DEBUGJesper B. Christensen2014-05-08-2/+2
| |_|_|/ |/| | | | | | | | | | | | | | | Signed-off-by: Jesper B. Christensen <jesper.christensen@cobham.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'serial' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-05-06-11/+11
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| * | | serial: zynq: Fix typo in suffix function nameMichal Simek2014-05-06-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 's/zynq_serial_initalize/zynq_serial_initialize/g' serial_initialize is used by all serial drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | serial: zynq: Remove sparse warningsMichal Simek2014-05-06-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warnings: drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_init' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_setbrg' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_getc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_tstc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_putc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_puts' was not declared. Should it be static? drivers/serial/serial_zynq.c:182:22: warning: symbol 'uart_zynq_serial0_device' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_init' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_setbrg' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_getc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_tstc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_putc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_puts' was not declared. Should it be static? drivers/serial/serial_zynq.c:185:22: warning: symbol 'uart_zynq_serial1_device' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-05-06-1/+1
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