summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
* Fix spelling of "supported/unsupported".Vagrant Cascadian2016-03-22-2/+2
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
* Fix spelling of "comment".Vagrant Cascadian2016-03-22-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* cmd: Fix license commandTom Rini2016-03-22-8/+15
| | | | | | | | | | | | The license command isn't usually built and has a few problems: - The rules to generate license.h haven't worked in a long time, re-write these based on the bmp_logo.h rules. - 'tok' is unused and the license text size has increased - bin2header.c wasn't grabbing unistd.h to know the prototype for read(). Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* serial: pl01x: Add support for devices with the rate pre-configured.Eric Anholt2016-03-22-3/+12
| | | | | | | | | | | | | For Raspberry Pi, we had the input clock rate to the pl011 fixed in the rpi.c file, but it may be changed by firmware due to user changes to config.txt. Since the firmware always sets up the uart (default 115200 output unless the user changes it), we can just skip our own uart init to simplify the boot process and more reliably get serial output. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* Drop various features when the command line is not availableSimon Glass2016-03-22-0/+10
| | | | | | | | | Some features are only useful or meaningful when the command line is present. Ensure that these features are not compiled in when CONFIG_CMDLINE is not enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Allow command-line files to be droppedSimon Glass2016-03-22-2/+2
| | | | | | | | These files do not need to be compiled when CONFIG_CMDLINE is disabled. Update the Makefile to reflect this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Allow command code to compile to nothingSimon Glass2016-03-22-4/+27
| | | | | | | | | | | When CONFIG_CMDLINE is disabled we need to remove all the command-line code. Most can be removed by dropping the appropriate linker lists from the images, but sub-commands must be dealt with specially. A simple mechanism is used to avoid 'unused static function' errors. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Panic when no command line processing can be performedSimon Glass2016-03-22-0/+1
| | | | | | | | Normally board_run_command() will handle command processed. But if for some reason it returns then we should panic to avoid further processing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* sandbox: Avoid calling commands when not availableSimon Glass2016-03-22-1/+9
| | | | | | | Don't try to run commands when not supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: x86: Drop command-line code when CONFIG_CMDLINE is disabledSimon Glass2016-03-22-0/+7
| | | | | | | | Update the link script to drop this code when not needed. This is only done for two architectures at present. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Add an option to enable the command lineSimon Glass2016-03-22-0/+20
| | | | | | | | Add a new Kconfig option for the command line. This is enabled by default, but when disabled it will remove the command line. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* cbfs: Update a function to be staticSimon Glass2016-03-22-4/+8
| | | | | | | | All command functions should be static. Update the CBFS functions to follow this rule. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ti: k2g: increase phy autoneg timeoutVitaly Andrianov2016-03-22-1/+2
| | | | | | | | After power cycle of a K2G EVM dhcp fails due to a auto-negotiation timeout. This commit increases the timeout to fix the issue. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-22-334/+591
|\
| * driver: net: fsl-mc: Return from DPAA_exit if boot_status !=0Prabhakar Kushwaha2016-03-21-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Return value of get_mc_boot_status() in case of failure is not necessary to be -1. So update the error condition check. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Yao Yuan <yao.yuan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043aqds: Enable ID_EEPROM support for ls1043aqdsWenbin Song2016-03-21-0/+10
| | | | | | | | | | Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043aqds: Return i2c mux to default chennelWenbin Song2016-03-21-2/+4
| | | | | | | | | | | | | | Return i2c mux to the default channel after accessing retimer. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * freescale: vid: Return i2c mux to default channelWenbin Song2016-03-21-3/+9
| | | | | | | | | | | | | | | | IR chip is on one of the channels on multiplexed I2C-bus. Reset to default channel after accessing. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls102xa: Enable CONFIG_SYS_CONSOLE_IS_IN_ENV supportAlison Wang2016-03-21-0/+2
| | | | | | | | | | | | | | | | | | CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout environment variable to specify the vga for the console output when LCD/HDMI is connected to the boards. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/fsl-lsch2: fix sdhc clock frequency valueYangbo Lu2016-03-21-0/+4
| | | | | | | | | | | | | | | | | | The eSDHC could select to use platform clock or peripheral clock to generate SD clock. The default selection is platform clock. So, fix the clock frequency value that's calculated for eSDHC. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2085a: Remove phy configuration from QDS and RDBPrabhakar Kushwaha2016-03-21-64/+0
| | | | | | | | | | | | | | | | | | As phy_connect and phy_config are being called from DPAA2 driver. Remove calling of mentioned function from board file. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: ldpaa_eth: Add support of PHY frameworkPrabhakar Kushwaha2016-03-21-34/+87
| | | | | | | | | | | | | | | | | | | | | | This patch integrate DPAA2 ethernet driver existing PHY framework. Call phy_connect and phy_config as per available DPMAC id defined in SerDes Protcol. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Updating entries in Serdes TablePratiyush Srivastava2016-03-21-7/+7
| | | | | | | | | | | | | | | | | | | | | | The serdes protocol entries in Serdes table 1 for protocol 0x03, 0x33, 0x35 and in Serdes table 2 for protocols 0x45 and 0x47 are updated to reflect the entries in current Reference Manual. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Reported-by: Jose Rivera <german.rivera@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add workaround for erratum A-009803Shengzhou Liu2016-03-21-5/+40
| | | | | | | | | | | | | | | | | | During initial DDR training, false parity errors may be detected. This patch adds workaround to fix the erratum. Tested on LS2085QDS and LS2080RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discreteShengzhou Liu2016-03-21-8/+82
| | | | | | | | | | | | | | | | | | | | Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * pci/layerscape: set LUT and msi-map for discovered PCI devicesStuart Yoder2016-03-21-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | msi-map properties are used to tell an OS how PCI requester IDs are mapped to ARM SMMU stream IDs. for all PCI devices discovered in a system: -allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device -program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the LUT mapping basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus(). Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * pci/layerscape: add defines for LUTStuart Yoder2016-03-21-0/+4
| | | | | | | | | | | | | | | | | | | | The per-PCI controller LUT (Look-Up-Table) is a 32-entry table that maps PCI requester IDs (bus/dev/fun) to a stream ID. Add defines for the register offsets. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * pci: make pci_get_hose_head() available to external usersStuart Yoder2016-03-21-0/+1
| | | | | | | | | | | | | | | | | | Put pci_get_hose_head() prototype in header so it is available to external users, allowing them to find and iterate over all pci controllers. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: update stream ID partitioning infoStuart Yoder2016-03-21-21/+34
| | | | | | | | | | | | | | | | | | Update comments around how stream IDs are partitioned. Stream IDs allocated to PCI are no longer divided up by controller, but are instead a contiguous range Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: remove obsolete stream ID partitioning supportStuart Yoder2016-03-21-183/+0
| | | | | | | | | | | | | | | | | | | | Remove stream ID partitioning support that has been made obsolete by upstream device tree bindings that specify how representing how PCI requester IDs are mapped to MSI specifiers and SMMU stream IDs. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * boards: ls2080: Fix default bootargsYork Sun2016-03-21-2/+2
| | | | | | | | | | | | A white space is missing in multiple-line string for bootargs. Signed-off-by: York Sun <york.sun@nxp.com>
| * arm: ls102xa: fdt: Update FSL_QSPI_COMPAT and FSL_DSPI_COMPATAlison Wang2016-03-21-2/+2
| | | | | | | | | | | | | | | | | | As the compatible property values for QSPI and DSPI dts nodes are changed in kernel, FSL_QSPI_COMPAT and FSL_DSPI_COMPAT need to be updated too. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/crypto/fsl: define structures for PDBAneesh Bansal2016-03-21-0/+55
| | | | | | | | | | | | | | | | | | | | | | Structures are defined for PDB (Protocol Data Blcks) for various operations. These structure will be used to add PDB data while creating the PDB descriptors. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> CC: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/crypto/fsl: add constructs for protocol descriptorsAneesh Bansal2016-03-21-0/+52
| | | | | | | | | | | | | | | | | | | | Construct APIs are added to create Protocol Descriptors for CAAM block. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> CC: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/crypto/fsl: correct error checking in run_descriptorAneesh Bansal2016-03-21-1/+1
| | | | | | | | | | | | | | | | | | When CAAM runs a descriptor and an error occurs, a non-zero value is set in Output Status Register. The if condition should check the status for a non-zero value. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: invert irq pins polarity for AQR405 PHYShaohui Xie2016-03-21-0/+9
| | | | | | | | | | | | | | | | | | To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: lsch3: Enable WUO config for RNI-20 nodePrabhakar Kushwaha2016-03-21-0/+31
| | | | | | | | | | | | | | | | | | | | Enable wuo config to accelerate coherent ordered writes for LS2080A and LS2085A. WRIOP IP is connected to RNI-20 Node. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: Fix layerscape mmu setupAlexander Graf2016-03-21-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit 7985cdf we converted all systems except for the Layerscape SoCs to the generic descriptor table based page table setup. On the Layerscape SoCs however, we just provide an empty table stub and do the setup ourselves. To reserve enough memory for the tables, we need to override the default counting mechanism which would end up with an empty table because we have no maps. Fixes: 7985cdf Reported-by: York Sun <york.sun@nxp.com> CC: Alison Wang <alison.wang@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | strider: use optimised bus timing for FPGA accessReinhard Pfau2016-03-21-6/+5
| | | | | | | | | | | | | | | | Use optimised bus timing for FPGA access. Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | strider: Define pca593x widthsDirk Eibach2016-03-21-0/+5
| | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* | strider: Add DP501 support for cpu modelDirk Eibach2016-03-21-26/+59
| | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-03-20-11/+26
|\ \
| * | arm: socfpga: sr1500: Misc updates (SPI speed, env location)Stefan Roese2016-03-20-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the following changes to the SR1500 board port: - Update defconfig to support SPI NOR (use make savedefconfig). - Increase SPI speed to a maximum of 100MHz for faster system bootup. - Change environment location, so that its not between SPL and main U-Boot. This way the combined SPL / U-Boot image can be used for updates. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Allow boards to define a custom environment sizeStefan Roese2016-03-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes it possible that boards can define a board-specific env size. This is used by the SR1500 SoCFPGA board port. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Fix SR1500 env positionMarek Vasut2016-03-20-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the inclusion of the common socfpga configuration file further down in the sr1500 configuration, so that the socfpga_common.h can check if environment is in SPI NOR and it's location is defined and if it is not, define default location. This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI" which introduced a minor warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
| * | arm: socfpga: Enabling U-Boot environment support in QSPIChin Liang See2016-03-20-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling the support of storing U-Boot environment within serial NOR flash. By default, its still store into SDMMC Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
* | | usb: xhci: Fix vendor command error if the request type is ↵Ted Chen2016-03-20-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION. Add test into xhci_submit_control_message for usb requesttype in USB vendor request being of standardized type. This fixes detection of certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized requesttype in USB vendor request will be ignored. Signed-off-by: Ted Chen <tedchen@realtek.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
* | | usb: Change power-on / scanning timeout handlingStefan Roese2016-03-20-94/+227
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the USB port scanning procedure and timeout handling in the following ways: a) The power-on delay in usb_hub_power_on() is now reduced to a value of max(100ms, "hub->desc.bPwrOn2PwrGood * 2"). The code does not wait using mdelay, instead usb_hub_power_on() will wait before querying the device in the scanning loop later. The total timeout for this hub, which is 1 second + "hub->desc.bPwrOn2PwrGood * 2" is calculated and will be used in the following per-port scanning loop as the timeout to detect active USB devices on this hub. b) Don't delay the minimum delay (for power to stabilize) in usb_hub_power_on(). Instead skip querying these devices in the scannig loop until the delay time is reached. c) The ports are now scanned in a quasi parallel way. The current code did wait for each (unconnected) port to reach its timeout and only then continue with the next port. This patch now changes this to scan all ports of all USB hubs quasi simultaneously. For this, all ports are added to a scanning list. This list is scanned until all ports are ready by either a) reaching the connection timeout (calculated earlier), or by b) detecting a USB device. This results in a faster USB scan time as the recursive scanning of USB hubs connected to the hub that's currently being scanned will start earlier. One small functional change to the original code is, that ports with overcurrent detection will now get rescanned multiple times (PORT_OVERCURRENT_MAX_SCAN_COUNT). Without this patch: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 20.163 seconds With this patch: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 1.822 seconds So ~18.3 seconds of USB scanning time reduction. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* | | usb: Don't reset the USB hub a 2nd timeStefan Roese2016-03-20-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Debugging has shown, that all USB hubs are being reset twice while USB scanning. This introduces additional delays and makes USB scanning even more slow. Testing has shown that this 2nd USB hub reset doesn't seem to be necessary. This patch now removes this 2nd USB hub reset. Resulting in faster USB scan time. Here the current numbers: Without this patch: => time usb start starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 24.003 seconds With this patch: => time usb start starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 20.392 seconds So ~3.6 seconds of USB scanning time reduction. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
* | | usb: Remove 200 ms delay in usb_hub_port_connect_change()Stefan Roese2016-03-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes 2 mdelay(200) calls from usb_hub_port_connect_change(). These delays don't seem to be necessary. At least not in my tests. Here the number for a custom x86 Bay Trail board (not in mainline yet) with a quite large and complex USB hub infrastructure. Without this patch: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 28.415 seconds With this patch: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 24.003 seconds So ~4.5 seconds of USB scanning time reduction. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
generated by cgit v1.1 at 2024-11-12 21:08:36 +0000