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* sunxi: ehci: Convert to the driver-modelHans de Goede2015-05-14-29/+67
| | | | | | | | Convert sunxi-boards which use the sunxi-ehci code to the driver-model. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* usb: ohci: Add dm supportHans de Goede2015-05-14-0/+91
| | | | | | | Add driver-model support to the ohci code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Marek Vasut <marex@denx.de>
* usb: ohci: Skip unnecessary mdelay(1) calls in various placesHans de Goede2015-05-14-9/+20
| | | | | | | | | | | | | | | | | For some reason the ohci code is full with: #ifdef DEBUG pkt_print(...) #else mdelay(1); #endif AFAICT there is no reason for the mdelay(1) calls. This commit disables them when building the ohci code for new driver-model using boards. It leaves the mdelay(1) calls in place when building for older boards, so as to avoid causing any regressions there. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* usb: ohci: Remove unnecessary delays from hc_start and power power-on pathsHans de Goede2015-05-14-4/+0
| | | | | | | | | | | | The usb spec says that we must wait a minimum amount of time after port power on (exact time is in the hub descriptor), this is something which we must not only do for root ports but also for external hub ports, which is why the common usb_hub code already waits a full second after powering up ports. Having a separate wait for just the root hub in the ohci-hcd code only leads to doing the waiting twice for the root ports, so drop the wait from the ohci-hcd code. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* usb: ohci: Do not resubmit and leak urbs for interrupt packetsHans de Goede2015-05-14-39/+2
| | | | | | | | | | | The u-boot usb code uses polling for all endpoints, including interrupt endpoints, so urbs should never be automatically resubmitted. This also fixes a leak of the urb, as submit_int_msg() did not check if an already re-submitted urb exists before creating a new one. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Marek Vasut <marex@denx.de>
* dm: usb: Do not scan companion buses if no devices where handed overHans de Goede2015-05-14-8/+34
| | | | | | | | | | | | USB scanning is slow, and there is no need to scan the companion buses if no usb devices where handed over to the companinon controllers by any of the main controllers. This saves e.g. 2 seconds when booting a A10 OLinuxIno Lime with no USB-1 devices plugged into the root usb ports. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: usb: Add support for companion controllersHans de Goede2015-05-14-5/+31
| | | | | | | | | | | | | | USB companion controllers must be scanned after the main controller has been scanned, so that any devices which the main controller which to hand over to the companion have actually been handed over before we scan the companion. As there are no guarantees that this will magically happen in the right order, split the scanning of the buses in 2 phases, first main controllers, and then companion controllers. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: usb: Move printing of usb scan status to usb_scan_bus()Hans de Goede2015-05-14-13/+9
| | | | | | | | | | Move printing of usb scan status to usb_scan_bus(). This is a preparation patch for adding companion controller support to the usb uclass. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: usb: Add support for interrupt queues to the dm usb codeHans de Goede2015-05-14-1/+109
| | | | | | | | | | | | | | | Interrupt endpoints typically are polled for a long time by the usb controller before they return anything, so calls to submit_int_msg() can take a long time to complete this. To avoid this the u-boot code has the an interrupt queue mechanism / API, add support for this to the driver-model usb code and implement it for the dm ehci code. See the added doc comments for more details. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: usb: Prefix ehci interrupt-queue functions with _ehci_Hans de Goede2015-05-14-9/+28
| | | | | | | | This is a preparation patch for adding interrupt-queue support to the ehci dm code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* usb: Stop reset procedure when a dev is handed over to a companion hcdHans de Goede2015-05-14-2/+4
| | | | | | | | | | Short circuit the retry loop in legacy_hub_port_reset() by returning an error from usb_control_msg() when a device was handed over to a companion by the ehci code. This avoids trying to reset low / fullspeed devices 5 times needlessly. Also do not print an error when a device has been handed over. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* usb: legacy_hub_port_reset() check and propagate usb_set_port_feature() errorsHans de Goede2015-05-14-2/+4
| | | | | | | Actually check for usb_set_port_feature() errors and propagate these if they happen. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* usb: usb_control_msg() propagate controller error codeHans de Goede2015-05-14-2/+4
| | | | | | | Propagate the error returned by submit_control_msg() rather then always returning -EIO when the hcd code indicates an error. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* usb: Fix handover of full-speed devices from ehci to companionHans de Goede2015-05-14-3/+13
| | | | | | | | When after a reset the port status connection bit is still set and the enable bit is not then we're dealing with a full-speed device and should hand it over to the companion controller. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* arch/arm/lib/bootm-fdt.c: Guard the include of <asm/armv7.h>Tom Rini2015-05-14-0/+2
| | | | | | | | | With d6b72da0 we started including this file unconditionally. This isn't allowed in a file that we also use on armv8. This will get cleaned up a bit better once we really start using these same features (and have similar fdt updates needed) on armv8. Signed-off-by: Tom Rini <trini@konsulko.com>
* Use map_sysmem when accessing memory in setexprJoe Hershberger2015-05-14-9/+23
| | | | | | | | | The setexpr command used to segfault when accessing memory in sandbox. The pointer accesses should be mapped. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-05-14-301/+7102
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| * ARM: tegra: move NVIDIA common files to arch/arm/mach-tegraMasahiro Yamada2015-05-13-26/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the Tegra boards borrow the files from board/nvidia/common/ directory, i.e., board/nvidia/common/* are not vendor-common files, but SoC-common files. Move NVIDIA common files to arch/arm/mach-tegra/ to clean up Makefiles. As arch/arm/mach-tegra/board.c already exists, this commit renames board/nvidia/common/board.c to arch/arm/mach-tegra/board2.c, expecting they will be consolidated as a second step. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * jetson-tk1: Add PSCI configuration options and reserve secure codeIan Campbell2015-05-13-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The secure world code is relocated to the MB just below the top of 4G, we reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is not protected in h/w. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Boot in non-secure mode by defaultJan Kiszka2015-05-13-1/+1
| | | | | | | | | | | | | | | | | | | | Upstream Linux is broken with default configs when PSCI, thus non-secure mode is enabled. So the user should explicitly enable this mode, e.g. when she disabled CONFIG_CPU_IDLE in Linux (in which case it's safe to use). We can revert this workaround once Linux got fixed. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Enable SMMU when going non-secureThierry Reding2015-05-13-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | Make sure to enable the SMMU when booting the kernel in non-secure mode. This is necessary because some of the SMMU registers are restricted to TrustZone-secured requestors, hence the kernel wouldn't be able to turn the SMMU on. At the same time, enable translation for all memory clients for the same reasons. The kernel will still be able to control SMMU IOVA translation using the per-SWGROUP enable bits. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Set CNTFRQ for secondary CPUsJan Kiszka2015-05-13-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to happen for all cores. Fixing this resolves problems of KVM with emulating the generic timer/counter. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0Ian Campbell2015-05-13-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These registers can be used to prevent non-secure world from accessing a megabyte aligned region of RAM, use them to protect the u-boot secure monitor code. At first I tried to do this from s_init(), however this inexplicably causes u-boot's networking (e.g. DHCP) to fail, while networking under Linux was fine. So instead I have added a new weak arch function protect_secure_section() called from relocate_secure_section() and reserved the region there. This is better overall since it defers the reservation until after the sec vs. non-sec decision (which can be influenced by an envvar) has been made when booting the os. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> [Jan: tiny style adjustment] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra124: Add PSCI support for Tegra124Jan Kiszka2015-05-13-0/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on Thierry Reding's work and uses Ian Campell's preparatory patches. It comes with full support for CPU_ON/OFF PSCI services. The algorithm used in this version for turning CPUs on and off was proposed by Peter De Schrijver and Thierry Reding in http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/210881. It consists of first enabling CPU1..3 via the PMC, just to powergate them again with the help of the Flow Controller. Once the Flow Controller is in place, we can leave the PMC alone while processing CPU_ON and CPU_OFF PSCI requests. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Add board-specific initialization hook for PSCIJan Kiszka2015-05-13-0/+7
| | | | | | | | | | | | | | | | Tegra boards will have to initialize power management for the PSCI support this way. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Make tegra_powergate_power_on publicJan Kiszka2015-05-13-1/+2
| | | | | | | | | | | | | | | | | | | | | | Will be used for unpowergating CPUs. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * virt-dt: Allow reservation of secure region when in a RAM carveoutJan Kiszka2015-05-13-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In this case the secure code lives in RAM, and hence the memory node in the device tree needs to be adjusted. This avoids that the OS will map and possibly access the reservation. Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to carve out such a region. We only support cutting off memory from the beginning or the end of a RAM bank as we do not want to increase their number (which would happen if punching a hole) for simplicity reasons This will be used in a subsequent patch for Jetson-TK1. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra124: Add more registers to struct mc_ctlrIan Campbell2015-05-13-2/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | I will need mc_security_cfg0/1 in a future patch and I added the rest while debugging, so thought I might as well commit them. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Put target PC for PSCI CPU_ON on per-CPU stackJan Kiszka2015-05-13-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a per-CPU variable for saving the target PC during CPU_ON operations. This allows us to run this service independently on targets that have more than 2 cores and also core-local power control. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Factor out reusable psci_get_cpu_stack_topJan Kiszka2015-05-13-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | This algorithm will be useful on Tegra as well, plus we will need it for making _psci_target_pc per-CPU. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Factor out reusable psci_cpu_entryJan Kiszka2015-05-13-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _sunxi_cpu_entry can be converted completely into a reusable psci_cpu_entry. Tegra124 will use it as well. As with psci_disable_smp, also the enabling is designed to be overloaded in cased SMP is not controlled via ACTLR. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Factor out reusable psci_cpu_off_commonJan Kiszka2015-05-13-62/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely cache disabling and flushing, clrex and the disabling of SMP for the dying CPU. These steps are apparently generic for ARMv7 and will be reused for Tegra124 support. As the way of disabled SMP is not architectural, though commonly done via ACLTR, the related function can be overloaded. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Factor out common psci_get_cpu_idJan Kiszka2015-05-13-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Will be required for obtaining the ID of the current CPU in shared PSCI functions. The default implementation requires a dense ID space and only supports a single cluster. Therefore, the functions can be overloaded in cases where these assumptions do not hold. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditionsJan Kiszka2015-05-13-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to be taken into account additionally. CONFIG_ARMV7_PSCI is only set on boards that support CONFIG_ARMV7_NONSEC, and it only works on those. CC: Tang Yuantian <Yuantian.Tang@freescale.com> CC: York Sun <yorksun@freescale.com> CC: Steve Rae <srae@broadcom.com> CC: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Tested-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: enable STDIO deregistrationStephen Warren2015-05-13-0/+3
| | | | | | | | | | | | | | | | | | | | | | At the very least when USB keyboard support is enabled, we need to enable CONFIG_SYS_STDIO_DEREGISTER, so the "usb reset" is able to re-scan USB ports and find new devices. Enable it everywhere per request from Simon Glass. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: CONFIG_{SYS_, }LOAD{_, }ADDR rationalizationStephen Warren2015-05-13-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As best I can tell, CONFIG_SYS_LOAD_ADDR and CONFIG_LOADADDR/$loadaddr serve essentially the same purpose. Roughly, if a command takes a load address, then CONFIG_SYS_LOAD_ADDR or $loadaddr (or both) are the default if the command-line does not specify the address. Different U-Boot commands are inconsistent re: which of the two default values they use. As such, set the two to the same value, and move the logic that does this into tegra-common-post.h so it's not duplicated. A number of other non- Tegra boards do this too. The values chosen for these macros are no longer consistent with anything in MEM_LAYOUT_ENV_SETTINGS. Regain consistency by setting $kernel_addr_r to CONFIG_LOADADDR. Older scripts tend to use $loadaddr for the default kernel load address, whereas newer scripts and features tend to use $kernel_addr_r, along with other variables for other purposes such as DTBs and initrds. Hence, it's logical they should share the same value. I had originally thought to make the $kernel_addr_r and CONFIG_LOADADDR have different values. This would guarantee no interference if a script used the two variables for different purposes. However, that scenario is unlikely given the semantic meaning associated with the two variables. The lowest available value is 0x90200000; see comments for MEM_LAYOUT_ENV_SETTINGS in tegra30-common-post.h for details. However, that value would be problematic for a script that loaded a raw zImage to $loadaddr, since it's more than 128MB beyond the start of SDRAM, which would interfere with the kernel's CONFIG_AUTO_ZRELADDR. So, let's not do that. The only potential fallout I could foresee from this patch is if someone has a script that loads the kernel to $loadaddr, but some other file (DTB, initrd) to a hard-coded address that the new value of $loadaddr interferes with. This seems unlikely. A user should not do that; they should either hard-code all load addresses, or use U-Boot-supplied variables for all load addresses. Equally, any fallout due to this change is trivial to fix; simply modify the load addresses in that script. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Paul Walmsley <pwalmsley@nvidia.com> Reviewed-by: Simon Glass Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra124: video: Add full link training for eDPSimon Glass2015-05-13-64/+1084
| | | | | | | | | | | | | | | | | | Add full link training as a fallback in case the fast link training fails. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: config: nyan-big: Enable LCDSimon Glass2015-05-13-0/+16
| | | | | | | | | | | | | | | | Add the PMIC, LCD settings, PWM and also show the board info at the top of the LCD when starting up. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: video: support eDP displays on Tegra124 devicesSimon Glass2015-05-13-0/+523
| | | | | | | | | | | | | | | | | | Connect up the clocks and the eDP driver to make these displays work with Tegra124-based devices. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: video: Add Embedded DisplayPort driverSimon Glass2015-05-13-0/+1265
| | | | | | | | | | | | | | | | | | | | This interface is used on laptop devices based on Tegra. Add a driver which provides access to the eDP interface. The driver uses the display port uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: video: Support serial output resource (SOR) on tegra124Simon Glass2015-05-13-0/+1815
| | | | | | | | | | | | | | | | | | The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: dts: nyan-big: Add definitions for eDP displaySimon Glass2015-05-13-0/+43
| | | | | | | | | | | | | | Add the various host1x peripherals to allow an eDP display to be connected. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * dm: video: Add a uclass for display portSimon Glass2015-05-13-0/+106
| | | | | | | | | | | | | | | | | | eDP (Embedded DisplayPort) is a standard widely used in laptops to drive LCD panels. Add a uclass for this which supports a few simple operations. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * edid: Add a function to read detailed monitor timingsSimon Glass2015-05-13-0/+124
| | | | | | | | | | | | | | | | | | For digital displays (such as EDP LCDs) we would like to read the EDID information and use that to set display timings. Provide a function to do this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * video: Add drm_dp_helper.hSimon Glass2015-05-13-0/+405
| | | | | | | | | | | | | | | | | | This file (from Linux 3.17) provides defines for display port. Use it so that our naming is consistent with Linux. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Move display controller header into commonSimon Glass2015-05-13-12/+55
| | | | | | | | | | | | | | Allow this to be used by other Tegra SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra124: clock: Add display clocks and functionsSimon Glass2015-05-13-9/+173
| | | | | | | | | | | | | | | | Add functions to provide access to the display clocks on Tegra124 including setting the clock rate for an EDP display. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: clock: Split the clock source code into a separate functionSimon Glass2015-05-13-22/+40
| | | | | | | | | | | | | | | | | | Create a function which sets the source clock for a peripheral, given the number of mux bits to adjust. This can then be used more generally. For now, don't export it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: clock: Add checking for invalid clock IDsSimon Glass2015-05-13-4/+29
| | | | | | | | | | | | | | | | | | The get_pll() function can do the wrong thing if passed values that are out of range. Add checks for this and add a function which can return a 'simple' PLL. This can be defined by SoCs with their own clocks. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: config: Use CONFIG_LCD to detect LCD presenceSimon Glass2015-05-13-1/+1
| | | | | | | | | | | | | | | | Instead of CONFIG_VIDEO_TEGRA, use CONFIG_LCD to determine whether an LCD is present. Tegra124 uses a different driver. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-13 02:02:17 +0000