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| | * | | linux/compat.h: move dev_err, dev_info and dev_dbg from usb driver to compat.hWu, Josh2013-08-22-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since kernel code current use many dev_xxx() instead of using printk. To compatible, move those dev_xxx from usb driver to linux/compat.h. Then all driver code can use dev_err, dev_info and dev_vdbg. This patch also removed duplicated macro definitions in usb driver. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | ARM: at91: sama5d3: remove unused definition about PMECC alpha table offsetWu, Josh2013-08-22-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | ARM: at91: atmel_nand: pmecc driver will select the galois table by sector sizeWu, Josh2013-08-22-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> [rebased on master] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: atmel: add nand trimffs subcommand for at91sam9n12 and at91sam9x5Bo Shen2013-08-22-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as the at91sam9n12 and at91sam9x5 soc support PMECC, when use u-boot to flash the rootfs, in order to avoid flash one sector with all 0xff into NAND, so use nand trimffs subcommand to avoid it Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: atmel: add gmac support for sama5d3xek boardBo Shen2013-08-22-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add gmac support for sama5d3xek board, the gmac embedded in: - sama5d33, sama5d34, sama5d35 Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | net: macb: fix the following building warningBo Shen2013-08-22-3/+9
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following building warning ---8>--- macb.c: In function 'macb_init': macb.c:400:14: warning: 'phydev' may be used uninitialized in this function macb.c:377:21: note: 'phydev' was declared here ---<8--- Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-03-5/+10
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| | * | | ARM: tegra: support raw ramdisksStephen Warren2013-08-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way, we don't have to run mkimage on them. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Enable data cache on DalmoreThierry Reding2013-08-19-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disabling the data cache is no longer required to boot Dalmore, so enable it. This results in notably better performance when loading and booting the Linux kernel. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Make cache line size SoC specificThierry Reding2013-08-19-2/+9
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently all Tegra SoCs are assumed to have 32 byte cache lines. This isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and therefore uses a cache line size of 64 bytes. Move the cache line size setting to the per-SoC common configuration file. Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'Albert ARIBAUD2013-09-03-1/+80
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/include/asm/arch-zynq/hardware.h The conflict above was trivial and solved during merge.
| | * | | zynq: Enable axi ethernet and emaclite driver initializationMichal Simek2013-08-12-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq can have axi ethernet and emaclite IPs in programmable logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: slcr: Wait 100ms till clk is properly setupMichal Simek2013-08-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you don't wait you will loose the first sent packet even all bits in emacps are correctly setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add new ddrc driver for ECC supportMichal Simek2013-08-12-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first 1MB is not initialized by first stage bootloader. Check if memory is setup to 16bit mode and ECC is enabled. If it is, clear the first 1MB. Also u-boot should report only the half size of memory. Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | cam_enc_4xx: Move CONFIG_SPL_PAD_TO to a config headerMasahiro Yamada2013-09-06-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For most boards which define CONFIG_SPL_PAD_TO, it is defined in config header files. Currently, there exists only one exception, cam_enc_4xx board. This patch moves CONFIG_SPL_PAD_TO definition from board/ait/cam_enc_4xx/config.mk to include/configs/cam_enc_4xx.h. With this modification, we can delete a glue code in the top level config.mk: ifneq ($(CONFIG_SPL_PAD_TO),) CPPFLAGS += -DCONFIG_SPL_PAD_TO=$(CONFIG_SPL_PAD_TO) endif Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de>
* | | | | config.mk: Delete unnecessary codeMasahiro Yamada2013-09-06-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently no makefiles (board-specific config.mk) set the following variables: CONFIG_SPL_TEXT_BASE CONFIG_UBOOT_PAD_TO CONFIG_RESET_VECTOR_ADDRESS CONFIG_TPL_PAD_TO For all target boards using above macros they are set in header files (include/configs/*.h), so we do not need to set them as CPPFLAGS. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | fw_env: fix writing environment for mtd devicesOliver Metz2013-09-06-28/+42
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Oliver Metz <oliver@freetz.org> Tested-by: Luka Perkov <luka@openwrt.org>
* | | | | fw_env: add redundant env support for MTD_ABSENTOliver Metz2013-09-06-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Oliver Metz <oliver@freetz.org> Tested-by: Luka Perkov <luka@openwrt.org>
* | | | | mail: Fix email addressMarek Vasut2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix my email address. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
* | | | | Always build u-boot.img when using CONFIG_SPL_FRAMEWORKHenrik Nordström2013-09-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use of uImage formatted u-boot have long been preferred, and recent changes to better support Falcon mode on MMC now enforces it on MMC. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
* | | | | ahci: convert to use libata functions and definitionsRob Herring2013-09-06-79/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libata already has similar functions as implemented in the ahci code. Refactor the code to use the libata variants and remove the dependency on ata.h. Convert some defines to use the version from libata.h. Also, remove some unnecessary memset's of bss data. This is a step toward hopefully merging ahci.c and dw_ahsata.c which are essentially the same driver. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: increase spin-up timeout to 20 secRob Herring2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Linux libata code, most drives are less than 10 sec, but some need up to 20 sec. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: handle COMINIT received during spin-upRob Herring2013-09-06-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes the link to go down and we need to re-initialize the link. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: move link bring-up handling to separate functionRob Herring2013-09-06-15/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the link bring-up handling to a separate weak function in order to allow platforms to override it. This is needed on highbank platform which needs special phy handling. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: add defines for PORT_SCR_STAT register bitsRob Herring2013-09-06-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace hard-coded register values with proper defines for PORT_SCR_STAT register. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: fix memory leak in ata_scsiop_inquiryRob Herring2013-09-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a memory leak when scsi inquiry fails. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: fix unaligned accessRob Herring2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc 4.7 will generate unaligned accesses to local char arrays, so make them static to avoid that. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: use ports implemented map instead of num_portsRichard Gibbs2013-09-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI driver was incorrectly using the Capabilities register NP (number of ports) field to determine which ports to activate. This commit changes it to correctly use the PORTS_IMPL register as a port map. Signed-off-by: Richard Gibbs <richard.gibbs@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | standalone-examples: support custom GCC libJack Mitchell2013-09-06-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for defining the gcc lib in standalone examples as is done in the main u-boot Makefile Signed-off-by: Jack Mitchell <jack.mitchell@dbbroadcast.co.uk>
* | | | | fs: fat: don't call disk_write with zero sector numWu, Josh2013-09-06-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the set_cluster() function, it will convert the buffer size to sector numbers. Then call disk_write() to write by sector. For remaining buffer, the size is less than a sector, call disk_write() again to write them in one sector. But if the total buffer size is less then one sector, the original code will call disk_write() with zero sector number. It is unnecessary. So this patch fix this. Now it will not call disk_write() if total buffer size is less than one sector. Signed-off-by: Josh Wu <josh.wu@atmel.com>
* | | | | compiler_gcc: do not redefine __gnu_attributesJeroen Hofstee2013-09-06-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc allows extensions to be non compiler specific by defining __* macros for the attributes supported by gcc. Having a different definition causes many warnings during the build (cdefs.h on FreeBSD uses __attribute((__pure__)) where u-boot uses __attribute__((pure)) for example). Do not redefine these macros to suppress these warnings. This patch ignores the checkpatch warning: WARNING: __packed is preferred over __attribute__((packed)) Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | | | | git-mailrc: Update MMC custodianPantelis Antoniou2013-09-06-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update git-mailrc with my nick and replace afleming as mmc custodian. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-niosTom Rini2013-09-06-0/+1
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| * | | | | nios2: fix missing comment terminator from SPDX License commitThomas Chou2013-09-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 1a4596601fd395f3afb8f82f3f840c5e00bdd57a Add GPL-2.0+ SPDX-License-Identifier to source files generated a warning due to a missing comment terminator. longlong.h:7:1: warning: "/*" within comment Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | | | | | am335x_evm.h: Add back the actual load of the kernel imageRobert P. J. Day2013-09-06-1/+3
|/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Somewhere along the line of refactoring the am335x header files, the kernel image load was lost, so put it back in. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | | | | bootm: allow correct bounds-check of destinationKees Cook2013-09-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While nothing presently examines the destination size, it should at least be correct so that future users of sys_mapmem() will not be surprised. Without this, it might be possible to overflow memory. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | lzo: correctly bounds-check output bufferKees Cook2013-09-03-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This checks the size of the output buffer and fails if it was going to overflow the buffer during lzo decompression. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | lzma: correctly bounds-check output bufferKees Cook2013-09-03-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The output buffer size must be correctly passed to the lzma decoder or there is a risk of overflowing memory during decompression. Switching to the LZMA_FINISH_END mode means nothing is left in an unknown state once the buffer becomes full. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | gzip: correctly bounds-check output bufferKees Cook2013-09-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The output buffer size must not be reset by the gzip decoder or there is a risk of overflowing memory during decompression. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | documentation: add more compression configsKees Cook2013-09-03-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the missing compression config items to the README. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | sandbox: add compression testsKees Cook2013-09-03-0/+341
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the "test_compression" command when building the sandbox. This tests the existing compression and decompression routines for simple sanity and for buffer overflow conditions. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | sandbox: Correct compiler warnings in cmd_bootm/cmd_ximgSimon Glass2013-09-03-6/+9
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the following warnings found with sandbox when compression is enabled. cmd_bootm.c: In function 'bootm_load_os': cmd_bootm.c:443:11: warning: passing argument 4 of 'lzop_decompress' from incompatible pointer type [enabled by default] /usr/local/google/c/cosarm/src/third_party/u-boot/files/include/linux/lzo.h:31:5: note: expected 'size_t *' but argument is of type 'uint *' cmd_ximg.c: In function 'do_imgextract': cmd_ximg.c:225:6: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] cmd_ximg.c:225:14: warning: 'hdr' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Kees Cook <keescook@chromium.org>
* | | | Prepare v2013.10-rc2Tom Rini2013-09-02-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | | omap5: Correct include order, drop CONFIG_SYS_PROMPT defineTom Rini2013-08-27-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new include structure for TI platforms, we need to not define our own CONFIG_SYS_PROMPT and also need to include <configs/omap5_common.h> much sooner, so do both of these. Also drop the unused CONFIG_NET_MULTI Signed-off-by: Tom Rini <trini@ti.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2013-08-27-58/+388
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| * | | | console: usb: kbd: To fix slow TFTP bootingJim Lin2013-08-26-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TFTP booting is slow when a USB keyboard is installed and stdin has usbkbd added. This fix is to change Ctrl-C polling for USB keyboard to every second when NET transfer is running. My previous patch is expected to be put into usb_kbd_testc(). But it went into usb_kbd_getc() after applied. This patch is to put change in correct place. Signed-off-by: Jim Lin <jilin@nvidia.com>
| * | | | console: usb: kbd: To improve TFTP booting performanceJim Lin2013-08-26-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TFTP booting is slow when a USB keyboard is installed and stdin has usbkbd added. This fix is to change Ctrl-C polling for USB keyboard to every second when NET transfer is running. Signed-off-by: Jim Lin <jilin@nvidia.com>
| * | | | NET: Add net_busy_flag if CONFIG_USB_KEYBOARD is definedJim Lin2013-08-26-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This flag is to make console aware that NET transfer is running or not. Signed-off-by: Jim Lin <jilin@nvidia.com>
| * | | | usb: ehci-mx5: Use 'bool' instead of 'unsigned char'Fabio Estevam2013-08-26-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'enable' argument can be better expressed as boolean. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | | usb: ehci-mx5: Remove unneeded write to cscmr1 registerFabio Estevam2013-08-26-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we have the following behavior in ehci_hcd_init() - Read csmr1 register, clear bit 26 and then set bit 26. However a little bit later we call set_usb_phy_clk() which clears bit 26, so let's get rid of the unnecessary code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>