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* dm: Don't attach the device tree to SPL with of-platdataSimon Glass2016-07-14-1/+1
| | | | | | | | When of-platdata is used in SPL we don't use the device tree. So there is no point in attaching it. Adjust the Makefile to skip attaching the device tree when of-platdata is enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* dtoc: Ignore the u-boot, dm-pre-reloc propertySimon Glass2016-07-14-0/+1
| | | | | | This property is not useful for of-platdata, so omit it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Rename DM_NAME_ALLOCED to DM_FLAG_NAME_ALLOCEDSimon Glass2016-07-14-4/+4
| | | | | | This is a flag. Adjust the name to be consistent with the other flags. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: spl: Bind in all devices in SPL with of-platdataSimon Glass2016-07-14-1/+2
| | | | | | | | | | | | | | When CONFIG_OF_PLATDATA is enabled, we cannot use the u-boot,dm-pre-reloc device tree property since the device tree is not available. However, dt-platdata.c only includes devices which would have been present in the device tree, and we can assume that all such devices are needed for SPL. If they were not needed, they would have been omitted to save space. So in this case, bind all devices regardless of the u-boot,dm-pre-reloc setting. This avoids needing to add a DM_FLAG_PRE_RELOC to every driver, thus affecting U-Boot proper also. Signed-off-by: Simon Glass <sjg@chromium.org>
* tiny-printf: Support assert()Simon Glass2016-07-14-0/+9
| | | | | | | | | | At present assert() is not supported with tiny-printf, so when DEBUG is enabled a build error is generated for each assert(). Add an __assert_fail() function to correct this. It prints a message and then hangs. Signed-off-by: Simon Glass <sjg@chromium.org>
* Only build the libfdt python module if 'swig' is availableSimon Glass2016-07-14-1/+4
| | | | | | | When swig is not available, we can still build correctly. So make this optional. Add a comment about how to enable this build. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a more efficient libfdt librarySimon Glass2016-07-14-2/+339
| | | | | | | | Add a Python version of the libfdt library which contains enough features to support the dtoc tool. This is only a very bare-bones implementation. It requires the 'swig' to build. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Makefile: Build of-platdata files when the feature is enabledSimon Glass2016-07-14-3/+36
| | | | | | | Update the Makefile to call dtoc to create the C header and source files, then build these into the image. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a tool to generate C code from a device treeSimon Glass2016-07-14-0/+392
| | | | | | | This tool can produce C struct definitions and C platform data tables. This is used to support the of-platdata feature. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a library to provide simple device-tree accessSimon Glass2016-07-14-0/+294
| | | | | | | This Python library provides a way to access the contents of the device tree. It uses fdtget, so is inefficient for larger device tree files. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a README for of-platdataSimon Glass2016-07-14-0/+268
| | | | | | Add documentation on how this works, including the benefits and drawbacks. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add an option to enable the of-platdata featureSimon Glass2016-07-14-0/+21
| | | | | | Add a Kconfig option to enable this feature. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Don't include fdtdec functions when of-platdata is enabledSimon Glass2016-07-14-3/+2
| | | | | | | We cannot access the device tree in this case, so avoid compiling in the various device-tree helper functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: serial: Add support for of-platdataSimon Glass2016-07-14-1/+7
| | | | | | | When this feature is enabled, we cannot access the device tree to find out which serial device to use. Just use the first serial driver we find. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: clk: Add support for of-platdataSimon Glass2016-07-14-2/+26
| | | | | | Add support for this feature in the core clock code. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a header that provides access to the of-platdata structsSimon Glass2016-07-14-0/+19
| | | | | | | | This header can be included from anywhere, but will only pull in the of-platdata struct definitions when this feature is enabled (and only in SPL). Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Add a simple driver to test of-platdataSimon Glass2016-07-14-0/+58
| | | | | | | | Add a driver which uses of-platdata to obtain its platform data. This can be used to test the feature in sandbox. It displays the contents of its platform data. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: syscon: Add support for of-platdataSimon Glass2016-07-14-0/+24
| | | | | | | Provide a new function which can cope with obtaining information from of-platdata instead of the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: regmap: Add a dummy implementation for of-platdataSimon Glass2016-07-14-0/+12
| | | | | | | Add a placeholder for now so that this code will compile. It currently does nothing. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Don't use device tree with of-platdataSimon Glass2016-07-14-4/+4
| | | | | | | When CONFIG_SPL_OF_PLATDATA is enabled we should not access the device tree. Remove all references to this in the core driver-model code. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Makefile: Build of-platdata before SPLSimon Glass2016-07-14-1/+2
| | | | | | | Since SPL needs the of-platdata structures, build these before starting to build any SPL components. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: spl: Don't set up device tree with of-platdataSimon Glass2016-07-14-1/+1
| | | | | | When this feature is enabled, we should not access the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add a test device that uses of-platdataSimon Glass2016-07-14-0/+50
| | | | | | | | | | Start up the test devices. These print out of-platdata contents, providing a check that the of-platdata feature is working correctly. The device-tree changes are made to sandbox.dts rather than test.dts. since the former controls the of-platdata generation. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add a new sandbox_spl boardSimon Glass2016-07-14-1/+237
| | | | | | | | | | | | It is useful to be able to build SPL for sandbox. It provides additional build coverage and allows SPL features to be tested in sandbox. However it does not need worthwhile to always create an SPL build. It nearly doubles the build time and the feature is (so far) seldom used. So for now, create a separate build target for sandbox SPL. This allows experimentation with this new feature without impacting existing workflows. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: serial: Don't sync video in SPLSimon Glass2016-07-14-0/+2
| | | | | | | SPL does not support an LCD display so there is no need to sync the video when there is serial output. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Don't use IDE and iotrace in SPLSimon Glass2016-07-14-0/+4
| | | | | | These functions are not supported in SPL, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add basic SPL implementationSimon Glass2016-07-14-0/+75
| | | | | | | Add an sandbox implementation for the generic SPL framework. This supports locating and running U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Don't include the main loop in SPLSimon Glass2016-07-14-0/+2
| | | | | | | SPL does not have a command interface so we should not include the main loop code. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Don't use PCI in SPLSimon Glass2016-07-14-1/+3
| | | | | | PCI is not supported in SPL for sandbox, so avoid using it. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add some missing headers in cpu.cSimon Glass2016-07-14-0/+2
| | | | | | These headers are needed in case they are not transitively included. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Correct header file order in cpu.cSimon Glass2016-07-14-1/+1
| | | | | | The dm/ file should go at the end. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Support building an SPL imageSimon Glass2016-07-14-0/+5
| | | | | | | When building an SPL image, override the link flags so that it uses the system libraries. This is similar to the way the non-SPL image is built. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Allow chaining from SPL to U-Boot properSimon Glass2016-07-14-0/+76
| | | | | | | | SPL is expected to load and run U-Boot. This needs to work with sandbox also. Provide a function to locate the U-Boot image, and another to start it. This allows SPL to function on sandbox as it does on other archs. Signed-off-by: Simon Glass <sjg@chromium.org>
* Makefile: Allow the SPL final link rule to be overriddenSimon Glass2016-07-14-2/+4
| | | | | | | | | | Overriding the final link rule is possible with U-Boot proper. It us used to create a sandbox image links with host libraries. To build a sandbox SPL image we need the same feature for SPL. To support this, update the SPL link rule so sandbox can override it. Signed-off-by: Simon Glass <sjg@chromium.org>
* spl: Drop include of i2c.hSimon Glass2016-07-14-1/+0
| | | | | | This file does not appear to use I2C, so drop this include. Signed-off-by: Simon Glass <sjg@chromium.org>
* README: Remove CONFIG_SYS_MALLOC_F_LEN commentSimon Glass2016-07-14-3/+0
| | | | | | | This option is now widely available, so remove the comment that it is only available on ARM and sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Don't print a warning for CONFIG_I2C_COMPATSimon Glass2016-07-14-1/+1
| | | | | | | | | | | Sandbox includes this code to provide build coverage. While we retain this feature we should have sandbox build it. Sandbox does not in fact use the I2C compatibility mode. Showing a warning for sandbox is just confusing, since no conversion is expected. Drop the warning for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* Revert "armv8: Enable CPUECTLR.SMPEN for coherency"Tom Rini2016-07-14-8/+0
| | | | | | | | | Upon further review this breaks most other platforms as we need to check what core we're running on before touching it at all. This reverts commit d73718f3236c520a92efa401084c658e6cc067f3. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-07-12-23/+773
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| * x86: link: Correct a failure in DRAM initSimon Glass2016-07-12-0/+5
| | | | | | | | | | | | | | | | | | | | With the change to set up pinctrl after relocation, link fails to boot. Add a special case in the link code to handle this. Fixes: d8906c1f (x86: Probe pinctrl driver in cpu_init_r()) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Add Advantech SOM-DB5800/SOM-6867 supportGeorge McCollister2016-07-12-1/+524
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Advantech SOM-DB5800 with the SOM-6867 installed. This is very similar to conga-qeval20-qa3-e3845 in that there is a reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867) installed. Currently supported: - 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on SOM-DB5800. - 4x USB 2.0 (EHCI) - Video - SATA - Ethernet - PCIe - Realtek ALC892 HD Audio Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO HDA_SDI0 is set in DT to enable HD Audio codec. Pin defaults for codec pin complexs are not changed. Not supported: - Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500) - USB 3.0 (XHCI) - TPM Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: baytrail: acpi: Hide internal UART per GNVS settingBin Meng2016-07-12-11/+8
| | | | | | | | | | | | | | | | | | | | If global NVS says internal UART is not enabled, hide it in the ASL code so that OS won't see it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: acpi: Pack global NVS into ACPI tableBin Meng2016-07-12-2/+32
| | | | | | | | | | | | | | | | | | | | Now that platform-specific ACPI global NVS is added, pack it into ACPI table and get its address fixed up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: quark: Introduce ACPI global NVSBin Meng2016-07-12-0/+41
| | | | | | | | | | | | | | | | This introduces quark-specific ACPI global NVS structure, defined in both C header file and ASL file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: baytrail: Introduce ACPI global NVSBin Meng2016-07-12-0/+81
| | | | | | | | | | | | | | | | | | | | This introduces baytrail-specific ACPI global NVS structure, defined in both C header file and ASL file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: conga-qeval20-qa3: Add support for internal UARTStefan Roese2016-07-12-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to enable and use the internal BayTrail UART instead of the one integrated in the Super IO Winbond chip. For this, a 2nd defconfig file is added. This is useful for tests done for the congatec SoM used on baseboards without such a Super IO chip. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Wrap setup_internal_uart() call with CONFIG_INTERNAL_UARTBin Meng2016-07-12-1/+1
| | | | | | | | | | | | | | | | | | | | For any FSP-enabled boards that want to enable debug UART support, setup_internal_uart() will be called, but this API is only available on BayTrail platform. Change to wrap it with CONFIG_INTERNAL_UART. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: baytrail: Introduce a Kconfig option for the internal UARTBin Meng2016-07-12-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | There are quite a number of BayTrail boards that uses an external SuperIO chipset to provide the legacy UART. For such cases, it's better to have a Kconfig option to enable the internal UART. So far BayleyBay and MinnowMax boards are using internal UART as the U-Boot console, enable this on these two boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pci: Add board_ prefix to should_load_oprom() and make it weakBin Meng2016-07-12-2/+2
| | | | | | | | | | | | | | | | | | For consistency with board_should_run_oprom(), do the same to should_load_oprom(). Board support codes can provide this one to override the default weak one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pci: Make load_oprom and run_oprom independentBin Meng2016-07-12-4/+1
| | | | | | | | | | | | | | | | | | At present should_load_oprom() calls board_should_run_oprom() to determine whether oprom should be loaded. But sometimes we just want to load oprom without running. Make them independent. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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