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* ENGR00283354 fastboot:enlarge max transfer buffer sizeJianzheng Zhou2013-12-03-25/+25
| | | | | | | Along with larger size of system image,old restrict is no longer resonable. Keep this value align with system partition's size to solve this issue. Signed-off-by: Jianzheng Zhou <jianzheng.zhou@freescale.com>
* ENGR00285890 imx6:plugin: update the ROM_API_TABLE_BASE_ADDR for plugin codeJason Liu2013-11-15-5/+20
| | | | | | | | | | | | | | i.MX6DQ TO1.5 and i.MX6DL/SOLO change the ROM_API_TABLE_BASE_ADDR from 0xc0 to 0xc4.Need update the plugin code to sync with this change. The change as the following for the new TO with i.MX6DQ, i.MX6DL/SOLO: For i.MX6DQ, if the TO >=1.5, will use the new ROM_API_TABLE_BASE_ADDR=0xc4 For i.MX6DL/S, if the TO >=1.2, will use the new ROM_API_TABLE_BASE_ADDR=0xc4 For the old TO, we will still use the 0xc0 to keep compatible. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00287268 mx6: fix the secure boot issue on the new tapout chipJason Liu2013-11-13-13/+70
| | | | | | | | | | The new TO(i.MX6Q TO1.5 and i.MX6DL TO1.2) of ROM change the HAB API table address, thus the secure boot can't boot up on the new TO. This patch fix this issue by fix up the HAB API table address according to the TO revision. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00276287 Adjust key mapping for 6sl evkjb4.3_1.1.1-gajb4.3_1.1.0-gajb4.3_1.0.0-gajb4.3_1.0.0-betaguoyin.chen2013-08-22-36/+8
| | | | | | | | Unify ways to enter recovery mode manually with CONFIG_MXC_KPD Each board config should define the key CONFIG_VOL_DOWN_KEY&CONFIG_POWER_KEY which are used to enter recovery mode manually Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* ENGR00272558 fastboot_dev and bootcmd cannot be configured for i.MX6 SabreSDrel_imx_3.0.35_4.1.0_rc3rel_imx_3.0.35_4.1.0_rc2rel_imx_3.0.35_4.1.0_rc1rel_imx_3.0.35_4.1.0guoyin.chen2013-07-25-4/+8
| | | | | | Only init the fastboot_dev and bootcmd env in the first boot Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* ENGR00255779 mx6dl/sabreauto: change the u-boot prompt from SOLO to DLJason Liu2013-07-10-15/+15
| | | | | | change the mx6dl/sabreauto u-boot prompt from SOLO to DL for better indication Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00268063 imx6x android: Fix build errorLin Fuzhen2013-06-21-0/+3
| | | | | | Fix build error when build Android Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00266869-2 imx6x sabresd: correct the bootargs for androidLin Fuzhen2013-06-19-6/+17
| | | | | | | The original design set the boot params default for eMMC on sabrsd This patch corrects env setting according boot device which is selected. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00266869-1 imx6x sarebsd: Fix recovery fail issue on SDLin Fuzhen2013-06-19-4/+9
| | | | | | | Correct the recovery environment setting when boot from SD card on sabresd board Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00267118-2 IPU disp:Align setting with kernelLiu Ying2013-06-17-7/+10
| | | | | | | | | | | | To align with kernel display setting so that we may avoid a blank interval during smooth UI transition from uboot to Android desktop on LVDS0(LVDS1 is OK). The code change refers to the following CR: "ENGR00214565 MX6x, IPUv3: Display lack last horizontal pixel" Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00267118-1 IPU disp:Align setting with kernelLiu Ying2013-06-17-22/+35
| | | | | | | | | | | | To align with kernel display setting so that we may avoid a blank interval during smooth UI transition from uboot to Android desktop on LVDS0(LVDS1 is OK). The code change refers to the following CR: "ENGR00127358 ipuv3: make display data signal negative during blanking period" Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00266247 Do not limit HAB code for closed systems onlyMahesh Mahadevan2013-06-07-41/+35
| | | | | | | | | | 1. It is very useful to print the HAB event details when the system is not closed to help debug issues before blowing the fuse to secure the system. 2. Also need to authenticate a signed uImage in a open system to help debug issues. Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
* ENGR00265720 Enlarge command line buffer sizeguoyin.chen2013-06-05-2/+2
| | | | | | | | Align mx6q_sabreauto_nand config to other mx6q_* config for command line buffer size The buffer size is too short for dule display nand config Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* ENGR00231572 mx6solo: Add Android solo uboot configureXinyu Chen2013-06-05-0/+87
| | | | | | | Add fastboot and recovery, add default bootargs and bootcmd for Android. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00260356: i.MX6SL: uboot: reset can NOT work on TO1.2Anson Huang2013-04-25-0/+3
| | | | | | | | | Boot ROM fix the "glitchless mux" issue on TO1.2 which will mask MMDC_CH0_MASK in CCM_CCDR, it will cause different behavior of reset, need to clear this MMDC_CHx_MASK field to make sure all the i.MX6 series SOCs have same behavior of reset. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00258651 mx6: update thermal equation for i.MX6slAnson Huang2013-04-16-2/+2
| | | | | | | New thermal equation is working for all i.MX6 series SOCs, so update it for i.MX6SL as well. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00255977 mx6sl: correct the information for chip and board revisionRobby Cai2013-04-16-10/+20
| | | | | | | | | | mx6sl chip revision is from different-offset register in anatop module comparing to other mx6 series. This patch fixes it and also uses board 'RevC' to indicate the latest board revision if this information can not be obtained from fuse. Signed-off-by: Robby Cai <R63905@freescale.com> (cherry picked from commit 39e36b5e5a7cfe53fd6e286d9fe9024b365f1a29)
* ENGR00254470-4 mx6q-hdmidongle:sata device can't work properly on most boardsRichard Zhu2013-04-16-16/+0
| | | | | | | | | | | | | | | | Revert "ENGR00241595-4 mx6q-hdmidongle:Enable SATA PHY PDDQ default" This reverts commit d33eefe083563a082840a46ec9cac21f98fad550. Reasons: * according to SATA Power mode (in SATA protocol) PHY TX/RX/CLK is powered down automatically according to SATA controller power mode SATA port support Disable/Slumber/Partial/Enabled(OOB) The SATA PHY PDDQ mode is one-shot and recommeded to be used for test, SATA would not work properly if the PHY PDDQ mode is enabled in U-boot. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00254470-3 mx6q-sabreauto:sata device can't work properly on most boardsRichard Zhu2013-04-16-21/+0
| | | | | | | | | | | | | | | | Revert "ENGR00241595-3 mx6q-sabreauto:Enable SATA PHY PDDQ default" This reverts commit 027af67a25773a0872659788eab0c09b72e2bbe0. Reasons: * according to SATA Power mode (in SATA protocol) PHY TX/RX/CLK is powered down automatically according to SATA controller power mode SATA port support Disable/Slumber/Partial/Enabled(OOB) The SATA PHY PDDQ mode is one-shot and recommeded to be used for test, SATA would not work properly if the PHY PDDQ mode is enabled in U-boot. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00254470-2 mx6q-arm2:sata device can't work properly on most boardsRichard Zhu2013-04-16-21/+0
| | | | | | | | | | | | | | | | Revert "ENGR00241595-2 mx6q-arm2:Enable SATA PHY PDDQ default" This reverts commit b10e0c4559602adacb22670506a1956a50cfd247. Reasons: * according to SATA Power mode (in SATA protocol) PHY TX/RX/CLK is powered down automatically according to SATA controller power mode SATA port support Disable/Slumber/Partial/Enabled(OOB) The SATA PHY PDDQ mode is one-shot and recommeded to be used for test, SATA would not work properly if the PHY PDDQ mode is enabled in U-boot. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00254470-1 mx6q-sd:sata device can't work properly on most boardsRichard Zhu2013-04-16-22/+0
| | | | | | | | | | | | | | | | Revert "ENGR00241595-1 mx6q-sabresd:Enable SATA PHY PDDQ default" This reverts commit 9cb937432d1dc8d2c31afa5194f1ef0d8bdc0392. Reasons: * according to SATA Power mode (in SATA protocol) PHY TX/RX/CLK is powered down automatically according to SATA controller power mode SATA port support Disable/Slumber/Partial/Enabled(OOB) The SATA PHY PDDQ mode is one-shot and recommeded to be used for test, SATA would not work properly if the PHY PDDQ mode is enabled in U-boot. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00256543 mx6: Update equation for thermal sensor on i.MX6DLAnson Huang2013-03-29-1/+1
| | | | | | | Use universal equation and 25C's calibration data to get thermal sensor's ratio on i.MX6DL. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00255481 mx6: Update equation for thermal sensorAnson Huang2013-03-27-1/+22
| | | | | | | Use universal equation and 25C's calibration data to get thermal sensor's ratio. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00254091 fastboot: add reboot command for quick fastbootLin Fuzhen2013-03-20-2/+10
| | | | | | | Quick fastboot just support download and flash commands. Add reboot command support when launch fastboot by "fastboot q" Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00244769-3 [NOR FLASH]-Improve WEIM NOR speedOliver Brown2013-02-13-3/+3
| | | | | | | | Improvements for WEIM NOR read performance. Changed burst and page size to 8 words. Changed read wait states to 10 and page read wait states to 4. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
* ENGR00243038: make get_mmc_env_devno to be a generic functionJason Liu2013-02-04-96/+14
| | | | | | | | | | | | | Currently, each board has one same function called get_mmc_env_devno, this will make the code a little bit duplication. We can make the get_mmc_env_devno to be a generic function, thus we can remove all the scattered function definition in each board file. And the patch also remove the boot check. Firstly, this check is needless, secondly, this will break the second boot support,for example: first boot from SPI, then switch to SD/MMC boot. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00242042 MX6DQ/DL: fix boot fail issue on mx6dl boardsjb4.2.1_1.0.0-alphaLin Fuzhen2013-01-28-10/+35
| | | | | | | | MX6DQ and MX6DL share the common board file, but only MX6DQ has built-in SATA, for the SATA PDDQ should be enabled default, so it needs to add code to distinguish different chip ID. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-4 mx6q-hdmidongle:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-20/+29
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-3 mx6q-sabreauto:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-16/+18
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-2 mx6q-arm2:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-18/+18
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-1 mx6q-sabresd:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-29/+32
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00240261 support fastboot for nand boot in sabreauto_androidb022472013-01-16-0/+6
| | | | | | Add partition table for nand boot. Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00239610: Enhance the quick fastboot stabilityLiGang2013-01-11-28/+24
| | | | | | | 1. Correct oversight of setup and endpoint complete irq handler sequence 2. Add check to string descriptor index Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00239607 add nand config for android sabreautob022472013-01-10-11/+404
| | | | | | Add nand config for android sabreauto Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00239366: Add support for nand storage in quick fastbootLiGang2013-01-09-25/+76
| | | | | | | 1. Add more check before writing image to storage 2. Fix failure when using nand storagea Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00230437: mx6: epdc: EPDC I/O setup after V3p3 is enableFugang Duan2013-01-08-243/+380
| | | | | | | | | | EPDC will be used when splash screen is shown, EPDC io setup is done before 3V3 digitial power, which cause critical chip burn-out for all platforms. To follow the E-Ink specification, setup EPDC I/O after V3p3 is enable. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00238363: mx6dl: epdc: remove epdc macro redefinition in config fileFugang Duan2013-01-08-4/+0
| | | | | | | Remove mx6dl_arm2 and mx6dl_sabresd config file epdc macro redefinition to avoid build warning. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00238834: mx6solo: add MFG support for mx6solo sabresd boardJason Liu2013-01-04-0/+304
| | | | | | add MFG support for mx6solo sabresd board Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00238371: mx6solo: sabresd: make system prompt indicate solo configJason Liu2012-12-27-1/+1
| | | | | | | make system prompt indicate solo config when using mx6solo_sabresd: "MX6Solo SABRESD U-Boot > " Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00238300: enhance the download speed for fastbootLiGang2012-12-27-2/+1044
| | | | | | | | | | 1. the new fastboot is an add-on feature, the original fastboot is reserved 2. the new fastboot is a subset of original fastboot, only support "download" and "flash" command 3. type "fastboot" in uboot to launch the original fastboot utility, type "fastboot q" in uboot to launch the new fastboot utility Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00238048: Add support for processor serial ATAG in uboot for iMX53Nitin Garg2012-12-21-0/+31
| | | | | | | Add support for Processor UID ATAG in uboot for iMX53. The UID is present in Fuses bank 0 at offset 0x20. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00235540 add sabreauto_6q config for androidb022472012-12-18-0/+130
| | | | | | Support fastboot and recovery Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00236472 Update DDR script of ARD solo emulationAlejandro Sierra2012-12-13-77/+56
| | | | | | | | Update DDR script of ARD solo emulation, the ddr script based on the following commit from ddr-scripts-rel git: dfde48e Added MX6Solo ARD DDR3 init. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00236902: mx6solo_sabresd: update the DDR script for solo-sabresdJason Liu2012-12-13-107/+71
| | | | | | | | | This patch update the DDR script for mx6solo_sabresd board. The DDR script based on the following commit from ddr-scripts-rel.git 9d4e11a Added MX6Solo SabreSD DDR3 script Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00235821 mx6: correct work flow of PFDsAnson Huang2012-12-13-0/+31
| | | | | | | | | | PFDs need to be gate/ungate after PLL lock to reset PFDs to right state. Otherwise PFDs may lose correct state in state-machine, then no output clock. For i.MX6DL and i.MX6SL, ROM have taken care of PFD396 already since the bus clock needs it. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00236620: Add Android fastboot and recovery reboot supportNitin Garg2012-12-11-92/+53
| | | | | | | Add support for Android fastboot and recovery reboot commands for iMX5. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00235817 mx6: use SNVS LPGPR register to store boot mode value.Zhang Jiejing2012-12-11-4/+7
| | | | | | | | | | | | | | | | | After using POR reset, the content in SRC will be reset. See RM: 63.5.1.2.3 IPP_RESET_B(POR) Because POR reset will reset most of register in IC, so use SNVS_LP General Purpose Register (LPGPR) to store the boot mode value. Below copy from SNVS_BlockGuide.pdf: The SNVS_LP General Purpose Register provides a 32 bit read write register, which can be used by any application for retaining 32 bit data during a power-down mode This Patch will use [7,8] bits of this register. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00236337: mx6/clock: emi_slow clock rate is not printed out correctlyJason Liu2012-12-10-1/+1
| | | | | | | This issue due to PODF is not used correcly, need use the following instead: ACLK_EMI_SLOW_PODF_OFFSET, the original used ACLK_EMI_PODF_OFFSET was wrong. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR000234991 MX6DL/ARD: Two boards met kernel dump during boot upjb4.1.2_1.0.0-betaJason Liu2012-12-05-8/+8
| | | | | | | | | | | | The issue is caused by DDR script changed io pads to DDR differential mode but forget to do the calibration data update. This patch updated the DDR script on MX6DL ARD board based on the commit on the ddr-scripts-rel: 53121e0 Updated MX6DL and MX6DQ ARD and SabreSD scripts with new calibration values for IO pads set to differential mode; Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00235564: i.mx6 u-boot: change plugin to use ROM API table for code jumpEric Sun2012-12-03-12/+21
| | | | | | | | | | | | | | The original plugin code uses hard coded assembly address for the code jump to "pu_irom_hwcnfg_setup", it can only works for specific chip version, for a new TO, the assembly address will change, and the plugin code simply fails. In fact there is an API entry table in a fixed ROM location, it contains the entry to the "pu_irom_hwcnfg_setup". This patch retrieve the jump address from this API table, thus avoid the limitation for current implementation. Apply to all plugin enabled platforms, MX6Q/DL ARM2, MX6SL ARM2/EVK Signed-off-by: Eric Sun <jian.sun@freescale.com>
generated by cgit v1.1 at 2024-11-25 06:53:24 +0000