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| | | * | designware_i2c: Fixed the setting of the i2c bus speedArmando Visconti2012-12-11-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three couple (hcnt/lcnt) of registers for each speed (SS/FS/HS). The driver needs to set the proper couple of regs according to what speed we are setting. Signed-off-by: Armando Visconti <armando.visconti@st.com>
| | | * | designware_i2c: Added s/w generation of stop bitArmando Visconti2012-12-11-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the newer versions of designware i2c IP there is the possibility of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically requires the s/w to generate the stop bit condition directly, as the h/w will not automatically generate it when TX_FIFO is empty. To avoid generation of an extra 0x0 byte sent as data, the IC_STOP command must be sent along with the last IC_CMD. This patch always writes bit[9] of ic_data_cmd even in the older versions, assuming that it is a noop there. Signed-off-by: Armando Visconti <armando.visconti@st.com>
| | | * | designware_i2c.c: Added the support for MULTI_BUSArmando Visconti2012-12-11-1/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the capability to switch between 10 different I2C busses (from 0 to 9). Signed-off-by: Armando Visconti <armando.visconti@st.com>
| | | * | drivers:i2c: Modify I2C driver for Exynos4Piotr Wilczek2012-12-11-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | exynos:pinmux: Add pinmux support for i2cPiotr Wilczek2012-12-11-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinmux for I2C for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | exynos:cpu: Add Exynos4 I2C spacingPiotr Wilczek2012-12-11-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add the spacing for i2c for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | exynos:clock: Add i2c clockPiotr Wilczek2012-12-11-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds i2c clock for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | omap24xx_i2c: Handle OMAP5 like OMAP2,3,4Vincent Stehlé2012-12-11-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP5 has 8b i2c data register field, like OMAP2, 3 and 4. Handle in the same way. This fixes the following error on OMAP5: OMAP5430 EVM # mmc rescan timed out in wait_for_bb: I2C_STAT=1410 twl6035: could not turn on LDO9. Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
| | | * | mxs: i2c: Implement algorithm to set up arbitrary i2c speedMarek Vasut2012-12-11-53/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This algorithm computes the values of TIMING{0,1,2} registers for the MX28 I2C block. This algorithm was derived by using a scope, but the result seems correct. The resulting values programmed into the registers do not correlate with the contents in datasheet. When using the values from the datasheet, the I2C clock were completely wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
| | | * | mxs: i2c: Restore speed setting after block resetMarek Vasut2012-12-11-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C block reset configures the I2C bus speed to strange value. Read the I2C speed from the block before reseting the block and restore it afterwards, so the I2C operates correctly. This issue can be replicated by doing unsuccessful I2C transfer, after such transfer finishes, the I2C block clock speed is misconfigured. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | | * | i2c: mxs: Fix TIMING2 register valueMarek Vasut2012-12-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to FSL, the value in the TIMING2 register shall be 0x00300030 instead of what's written in the datasheet. This new value correlates with older STMP36xx datasheet. Issues were detected in Linux when this register was misconfigured, so write this correct value. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | | * | i2c: mxs: Use i2c_set_bus_speed() in i2c_init()Marek Vasut2012-12-11-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use i2c_set_bus_speed() in i2c_init() within the mxs i2c driver to avoid duplication of code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | | * | i2c: mxs: Implement i2c_get/set_bus_speed()Marek Vasut2012-12-11-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the setup and retrieval functions for the I2C bus speed on the MXS I2C IP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | | * | i2c: mxs: Abstract out the MXS I2C speed setupMarek Vasut2012-12-11-20/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch pulls out the I2C speed setup from the i2c_init() call and implements the bus configuration lookup table with register values that needs to be programmed into the I2C IP to run at particular speed. This patch is a first step towards implementing run-time I2C bus speed configuration for the MXS I2C IP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | | * | i2c: kerneldoc: Add kerneldoc annotations to cmd_i2c.cMarek Vasut2012-12-11-15/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add kerneldoc style documentation into cmd_i2c.c to properly describe all overridable functions and most of the command interface. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| | | * | i2c: Staticize local functions in mxc i2c driverMarek Vasut2012-12-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions in the MXC i2c driver were not static, fix this by making them so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | | * | i2c: Use __weak instead of __attribute__((weak, alias))Marek Vasut2012-12-11-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use __weak from linux/compiler.h instead of __attribute__((weak, alias)) to define overridable function. This patch is intended as a cleanup patch to bring some consistency into the code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| | | * | soft_i2c: add necessary includes for AVR32Andreas Bießmann2012-12-11-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| | | * | Correct comment to show the parameters as defined in tools/mkimage.hLars Rasmusson2012-12-11-1/+1
| | | |/ | | | | | | | | | | | | Signed-off-by: Lars Rasmusson <Lars.Rasmusson@sics.se>
| | | * MIPS: constify address pointer in test_bit()Daniel Schwierzeck2012-12-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix several warnings when enabling UBIFS on MIPS: In file included from ubifs.h:2137:0, from ubifs.c:26: misc.h: In function 'ubifs_zn_dirty': misc.h:38:2: warning: passing argument 2 of 'test_bit' discards 'const' qualifier from pointer target type [enabled by default] ../include/asm/bitops.h:569:23: note: expected 'volatile void *' but argument is of type 'const long unsigned int *' Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | | * MIPS: fix a latent bug on initialize $gpZhi-zhou Zhang2012-12-08-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If bal is 8 bytes aligned, the _gp will not be 8 bytes aligned. then the following ld insntrustion generates a Adel exception. So here make _gp be always aligned in 8 bytes. Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | * | mx25pdk: Allow booting a device tree kernelFabio Estevam2012-12-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Select CONFIG_OF_LIBFDT so that a device tree kernel can be launched. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mx53loco: Fix PMIC nameFabio Estevam2012-12-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c73368150 (pmic: Extend PMIC framework to support multiple instances of PMIC devices) has incorrectly passed the PMIC name under the FSL PMIC case. Fix that by passing "FSL_PMIC" as the parameter of pmic_get. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | woodburn: Set gpio value in gpio_direction_output()Fabio Estevam2012-12-11-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the gpio value in gpio_direction_output() instead of an extra gpio_set_value call. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | mx25pdk: Adapt it for the new PMIC frameworkFabio Estevam2012-12-11-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the necessary adaptions for the new PMIC framework, so that mx25pdk can be built again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic2012-12-08-2509/+23900
| | |\ \ | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/woodburn_common.h board/woodburn/woodburn.c These boards still use the old old PMIC framework, so they do not merge properly after the power framework was merged into mainline. Fix all conflicts and update woodburn to use Power Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | mxs: SPL: Generalize memory initializationOtavio Salvador2012-12-07-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a generic 'dram_vals[]' array that has the full initialization sequence and rename the initialization method so it doesn't has a frequency on its name. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | mxs: Staticize SPL functionsMarek Vasut2012-12-04-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MXS SPL didn't mark local functions "static". Fix it. This also makes the SPL smaller by roughly 300 bytes. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Properly setup VDDD in power supply setup codeMarek Vasut2012-12-04-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory setup code adjusted the VDDD voltage. Remove this adjustment and configure the VDDD voltage correctly in the power supply setup code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Implement common function to setup VDDxMarek Vasut2012-12-04-170/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement common function to setup the VDDIO, VDDD and VDDA voltage. Right now, there are two almost identical functions to setup VDDIO and VDDD, which is prone to breakage. Pull out the differences into constant structure and pass them as an argument to the common function. Moreover, the function has almost identical loops for setting higher and lower VDDx voltage. Merge these two loops. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Silence elftosbMarek Vasut2012-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The elftosb tool is now called with -d switch, which produces debug output to the stdout. The debug output is completely useless for regular operation, so silence it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | mx28: Rename regs-power.h to regs-power-mx28.hMarek Vasut2012-12-04-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX23 has different register layout and bit placement in the power supply. Thus, in order to be able to add support for MX23, rename the MX28's regs-power.h to regs-power-mx28.h . Moreover, add ifdef around inclusion of regs-*-mx28.h in imx-regs.h so the MX23 boards will include proper set of registers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registersMarek Vasut2012-12-04-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These registers don't have _SET, _CLR and _TOG at the respective offsets available, these registers has to be toggled via R-M-W if needed. Thus do not export these offsets anymore. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | universal_c210: check the NULL pointer when get the PMICMinkyu Kang2012-12-11-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PMIC 2.0 require to test return pointer from pmic_get() Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | SMDK5250: Enable pmic MAX77686Rajeshwari Shinde2012-12-11-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabled pmic MAX77686 for SMDK5250. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | POWER: MAX77686: Modified as per the latest ImplementationRajeshwari Shinde2012-12-11-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moved the pmic_max77686.c max77686_pmic.h to drivers/power and made required changes accordingly Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | universal_c210: fix compiler error and compiler warningMinkyu Kang2012-12-10-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix following errors universal.c: In function 'init_pmic_lcd': universal.c:340: warning: implicit declaration of function 'get_pmic' universal.c:340: warning: initialization makes pointer from integer without a cast universal.c: In function 'lcd_power_on': universal.c:431: warning: initialization makes pointer from integer without a cast universal.c: At top level: universal.c:335: warning: 'init_pmic_lcd' defined but not used Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Donghwa Lee <dh09.lee@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Piotr Wilczek <p.wilczek@samsung.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-2516/+23889
| |\ \ \ |/ / / / | | | _ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2012-12-07-128/+2347
| |\ \
| | * | x86: Fix coreboot config to boot on ChromebookSimon Glass2012-12-06-14/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The config is current broken. It compiles but does not boot because IDE is enabled. Remove all IDE options, and enable SCSI instead. Also add a working boot command and Linux bootargs, and enable command line editing to make it easier to work with. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Turn on support for EFI's GPT in the coreboot configGabe Black2012-12-06-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows u-boot to figure out the partitions of a chrome-os install. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: coreboot: Enable video displaySimon Glass2012-12-06-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | Enable the display on coreboot, using CFB. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Build vga video code only if CONFIG_VIDEO_VGA is definedSimon Glass2012-12-06-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When running from coreboot we don't want this code, so make it optional. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Remove video_init() prototype from u-boot-x86.hSimon Glass2012-12-06-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is not intended to be exported from the video drivers, so remove the prototype. This fixes an error: cfb_console.c:1793:12: error: static declaration of 'video_init' follows non-static declaration Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | video: Check for valid FB pointer before clearingDuncan Laurie2012-12-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command will start erasing at memory address zero if there is not a valid framebuffer address that was found during video_init(). This is a common case with Chrome OS devices in normal mode when we do not execute the video option rom in coreboot. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: drop unused code in coreboot.cStefan Reinauer2012-12-06-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function setup_pcat_compatibility() is weak and implemented as empty function in board.c hence we don't have to override that with another empty function. monitor_flash_len is unused, drop it. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Remove coreboot_ from file nameStefan Reinauer2012-12-06-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ... because that information is already "encoded" in the directory name. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Provide a way to throttle port80 accessesVadim Bendebury2012-12-06-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems (like Google Link device) provide the ability to keep a history of the target CPU port80 accesses, which is extremely handy for debugging. The problem is that the EC handling port 80 access is orders of magnitude slower than the AP. This causes random loss of trace data. This change allows to throttle port 80 accesses such that in case the AP is trying to post faster than the EC can handle, a delay is introduced to make sure that the post rate is throttled. Experiments have shown that on Link the delay should be at least 350,000 of tsc clocks. Throttling is not being enabled by default: to enable it one would have to set MIN_PORT80_KCLOCKS_DELAY to something like 400 and rebuild the u-boot image. With upcoming EC code optimizations this number could be decreased (new new value should be established experimentally). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Provide tick counter and frequency reference for Intel core architectureVadim Bendebury2012-12-06-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some u-boot modules rely on availability of get_ticks() and get_tbclk() functions, reporting a free running clock and its frequency respectively. Traditionally these functions return number and frequency of timer interrupts. Intel's core architecture processors however are known to run the rdtsc instruction at a constant rate of the so called 'Max Non Turbo ratio' times the external clock frequency which is 100MHz. This is just as good for the timer tick functions in question. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Issue SMI to finalize Coreboot in final stageDuncan Laurie2012-12-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will write magic value to APMC command port which will trigger an SMI and cause coreboot to lock down the ME, chipset, and CPU. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>