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| * rockchip: Add an MMC driverSimon Glass2015-09-02-0/+108
| | | | | | | | | | | | | | Add an MMC driver which supports RK3288, but may also support other SoCs. It uses the Designware MMC device. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add SDRAM initSimon Glass2015-09-02-0/+1455
| | | | | | | | | | | | | | | | | | Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses device tree for configuration so should be able to support other RAM configurations. It may be possible to generalise the code to support other SoCs at some point. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add pinctrl driverSimon Glass2015-09-02-0/+459
| | | | | | | | | | | | | | Add a driver which supports pin multiplexing setup for the most commonly used peripherals. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add a simple syscon driverSimon Glass2015-09-02-0/+26
| | | | | | | | | | | | Add a driver that provides access to system controllers. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add SoC reset driverSimon Glass2015-09-02-0/+54
| | | | | | | | | | | | | | We can reset the SoC using some CRU (clock/reset unit) registers. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add header files for PMU and GRFSimon Glass2015-09-02-0/+857
| | | | | | | | | | | | | | PMU is the power management unit and GRF is the general register file. Both are heavily used in U-Boot. Add header files with register definitions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: Add clock driverSimon Glass2015-09-02-0/+804
| | | | | | | | | | | | | | Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3288. Signed-off-by: Simon Glass <sjg@chromium.org>
| * power: regulator: Add a driver for ACT8846 regulatorsSimon Glass2015-09-02-0/+165
| | | | | | | | | | | | | | Add a full regulator driver for the ACT8846. This provides easy access to voltage and current settings for each regulator. Signed-off-by: Simon Glass <sjg@chromium.org>
| * power: Add support for ACT8846 PMICSimon Glass2015-09-02-0/+137
| | | | | | | | | | | | | | | | Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and is connected to the I2C bus. This driver supports using a regulator driver to access the regulators. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add basic peripheral and clock definitionsSimon Glass2015-09-02-0/+119
| | | | | | | | | | | | | | | | Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: gpio: Add rockchip GPIO driverSimon Glass2015-09-02-0/+161
| | | | | | | | | | | | | | This supports RK3288 at present. It does not implement functions or support for pull up/down. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add support for the SPI imageSimon Glass2015-09-02-1/+122
| | | | | | | | | | | | | | | | | | | | | | | | The Rockchip boot ROM requires a particular file format for booting from SPI. It consists of a 512-byte header encoded with RC4, some padding and then up to 32KB of executable code in 2KB blocks, separated by 2KB empty blocks. Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be converted to this format. This allows booting from SPI flash on supported machines. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add support for the SD imageSimon Glass2015-09-02-2/+106
| | | | | | | | | | | | | | | | | | | | | | The Rockchip boot ROM requires a particular file format. It consists of 64KB of zeroes, a 512-byte header encoded with RC4, and then some executable code. Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be converted to this format. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add the rkimage format to mkimageSimon Glass2015-09-02-1/+171
| | | | | | | | | | | | | | | | Rockchip SoCs require certain formats for code that they execute, The simplest format is a 4-byte header at the start of a binary file. Add support for this so that we can create images that the boot ROM understands. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mkimage: Allow the original file size to be recordedSimon Glass2015-09-02-0/+1
| | | | | | | | | | | | | | | | Allow the image handler to store the original input file size so that it can reference it later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * mkimage: Allow padding to any lengthSimon Glass2015-09-02-11/+12
| | | | | | | | | | | | | | | | At present there is an arbitrary limit of 4KB for padding. Rockchip needs more than that, so remove this restriction. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * rockchip: rk3288: dts: Make core devices available earlySimon Glass2015-09-02-0/+15
| | | | | | | | | | | | | | In SPL we need access to the CRU and other peripherals so we can set up SDRAM. Mark these so that they will remain in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Bring in RK3288 device tree file includes and bindingsSimon Glass2015-09-02-0/+2543
| | | | | | | | | | | | | | | | Bring in required device tree files from Linux. Since mainline Linux is somewhat behind, use the files from the Chromium tree. We can re-sync once further code is acccepted upstream. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Add serial supportSimon Glass2015-09-02-0/+53
| | | | | | | | | | | | | | Add support for the Rockchip serial device using the ns16550 driver. This uses driver model and device tree for both SPL and U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
| * arm: reset: Avoid a build error when the reset uclass is enabledSimon Glass2015-09-02-0/+2
| | | | | | | | | | | | | | There can be only one do_reset(). When CONFIG_RESET is enabled this is provided by the reset uclass, and ARM's version should be disabled. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Provide better debugging when a device fails to bindSimon Glass2015-09-02-1/+4
| | | | | | | | | | | | | | | | | | | | All devices should bind without error. But when they don't, they can cause driver model init to fail. A real situation where this can happen is when there is a missing uclass. Add a debug() call to dm_scan_fdt_node to make this easier to track. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Improve handling of a missing uclassSimon Glass2015-09-02-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a uclass definition is missing, no drivers in that uclass can operate. This can happen if a board has a strange collection of options (e.g. the driver is enabled but the uclass is not). Unfortunately this is very confusing at present. Starting up driver model results in a -ENOENT error, which is pretty generic. Quite a big of digging is needed to get to the root cause. To help with this, change the error to a very strange one with no other users in U-Boot. Also add a debug message. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mmc: Support bypass mode with the get_mmc_clk() methodSimon Glass2015-09-02-3/+17
| | | | | | | | | | | | | | | | | | Some SoCs want to adjust the input clock to the DWMMC block as a way of controlling the MMC bus clock. Update the get_mmc_clk() method to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
| * dm: led: Tidy up SPL options for the led and led-gpioSimon Glass2015-09-02-3/+10
| | | | | | | | | | | | | | | | At present SPL does not have its own option. But these features can increase SPL code size. Adjust the Kconfig and Makefile so that separate a SPL option can be selected. Signed-off-by: Simon Glass <sjg@chromium.org>
| * pinctrl: Add the concept of peripheral IDsSimon Glass2015-09-02-9/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | My original pinctrl patch operating using a peripheral ID enum. This was shared between pinmux and clock and provides an easy way to specify a device that needs to be controlled, even it is does not (yet) have a driver within driver model. Masahiro's new simple pinctrl gets around this by providing a set_state_simple() pinctrl method. By passing a device to that call the peripheral ID becomes unnecessary. If the driver needs it, it can calculate it itself and use it internally. However this does not solve the problem for peripheral clocks. The 'pure' solution would be to pass a driver to the clock uclass also. But this requires that all devices should have a driver, and a struct udevide. Also a key optimisation of the clock uclass is allowing a peripheral clock to be set even when there is no device for that clock. There may be a better way to achive the same goal, but for now it seems expedient to add in peripheral ID to the pinctrl uclass. Two methods are added - one to get the peripheral ID and one to select it. The existing set_state_simple() is effectively the union of these. Signed-off-by: Simon Glass <sjg@chromium.org>
| * pinctrl: Add help text to KconfigSimon Glass2015-09-02-1/+10
| | | | | | | | | | | | | | The pinctrl Kconfig options should have help messages. Add this to a few options. Signed-off-by: Simon Glass <sjg@chromium.org>
* | configs/titanium_defconfig: Select MX6Tom Rini2015-09-02-0/+1
| | | | | | | | | | | | In 2178282 this config wasn't updated by accident, so update it. Signed-off-by: Tom Rini <trini@konsulko.com>
* | arch/arm/Kconfig: Add back in missing entries.Tom Rini2015-09-02-0/+2
| | | | | | | | | | | | | | In 2178282 we accidentally dropped out hilsilicon and cm_t43. Bring these back in. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Convert omap3_logic to ti_omap3_common.hAdam Ford2015-09-02-48/+28
| | | | | | | | | | | | | | Convert to using the common config files. Signed-off-by: Adam Ford <adam.ford@logicpd.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | powerpc: mpc85xx: remove stxgp3, stxssa supportMasahiro Yamada2015-09-02-2460/+2
| | | | | | | | | | | | | | | | These have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Dan Malek <dan@embeddedalley.com>
* | powerpc: mpc5xx: remove cmi_mpc5xx supportMasahiro Yamada2015-09-02-928/+1
| | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | powerpc: ppc4xx: remove zeus supportMasahiro Yamada2015-09-02-968/+1
| | | | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stefan Roese <sr@denx.de>
* | powerpc: ppc4xx: remove sbc405 supportMasahiro Yamada2015-09-02-1148/+1
| | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | powerpc: ppc4xx: remove pcs440ep supportMasahiro Yamada2015-09-02-1930/+1
| | | | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stefan Roese <sr@denx.de>
* | powerpc: ppc4xx: remove p3p440 supportMasahiro Yamada2015-09-02-592/+1
| | | | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stefan Roese <sr@denx.de>
* | powerpc: ppc4xx: remove lwmon5 supportMasahiro Yamada2015-09-02-2128/+2
| | | | | | | | | | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Remove CONFIG_LWMON5 references. (Also, remove undefined CONFIG_WD_MAX_RATE while I am here.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stefan Roese <sr@denx.de>
* | powerpc: ppc4xx: remove csb272, csb472 supportMasahiro Yamada2015-09-02-1324/+1
| | | | | | | | | | | | | | | | These have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tolunay Orkun <torkun@nextio.com>
* | powerpc: ppc4xx: remove alpr supportMasahiro Yamada2015-09-02-1037/+2
| | | | | | | | | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stefan Roese <sr@denx.de>
* | ea20: Convert to generic boardStefano Babic2015-09-02-0/+2
| | | | | | | | | | | | | | Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | serial: drop redundant depends onMasahiro Yamada2015-09-02-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | SANDBOX_SERIAL depends on SANDBOX, and SANDBOX selects DM. So, "SANDBOX_SERIAL depends on DM" is redundant. Likewise, UNIPHIER_SERIAL depends on ARCH_UNIPHIER, and ARCH_UNIPHIER selects DM_SERIAL. So, "UNIPHIER_SERIAL depends on DM_SERIAL" is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-09-02-53/+193
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| * | powerpc/t1023rdb: change default core frequency to 1200MHzShengzhou Liu2015-09-01-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Per new requirement, change default core frequency from previous 1400MHz to 1200MHz to save power. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc: convert selected boards to generic board structureYork Sun2015-09-01-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Convert MPC8540ADS, MPC8541CDS, MPC8544CDS, MPC8548CDS, MPC8555CDS, MPC8560ADS, MPC8568MDS, MPC8569MDS, MPC8610HPCD to use generic board structure. Signed-off-by: York Sun <yorksun@freescale.com>
| * | net/fman: Support both new and legacy FMan CompatiblesIgal Liberman2015-09-01-35/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently the FMan Port and MAC compatibles were changed. This patch aligns the FMan Port and MAC compatibles to the new FMan device tree binding document. The FMan device tree binding document can be found in the Linux kernel: ./Documentation/devicetree/bindings/powerpc/fsl/fman.txt This patch doesn't affect legacy compatibles support. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Tested-by: Xing Lei <xing.lei@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ramYork Sun2015-09-01-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | MPC85xx has been using locked L1 cache as init_ram. L1 cache is a write through cache on E6500. L2 cache is enabled to to hold the data. This patch locks/unlocks L2 cache to ensure no data cast out from L2 cache. Signed-off-by: York Sun <yorksun@freescale.com> Reported-by: Jeffery Zhu <Jefferry.Zhu@freescale.com>
| * | powerpc: configs: Fix init_ram physical address for several boardsYork Sun2015-09-01-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | For e6500 and e5500 SoCs, it was intended to put init_ram address in ccsr reserved space. It is no longer true since SerDes module took the space. Move it to another reserved space at CCSR + 0x03c000. Signed-off-by: York Sun <yorksun@freescale.com>
| * | powerpc/defconfig: Rename defconfig file for T1040QDS/T1024QDS DDR4 targetsYork Sun2015-09-01-3/+3
| | | | | | | | | | | | | | | | | | | | | Previously the DDR4 targets were named with _D4. Rename them with _DDR4 for easy identification. Signed-off-by: York Sun <yorksun@freescale.com>
| * | powerpc/t1024qds: Add missing T1024QDS_DDR4_defconfigYork Sun2015-09-01-0/+5
| |/ | | | | | | | | | | | | T1024QDS with DDR4 has been supported. Add the missing defconfig. Signed-off-by: York Sun <yorksun@freescale.com> CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-09-02-605/+4146
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| * | imx: vf610 add get_cpu_revPeng Fan2015-09-02-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we need to support runtime check for different drivers, we need to add get_cpu_rev for vf610, otherwise there will be build errors. This patch introduces a dummy CPU id which is not read from chip silicon. Later when we can get the real id from chip, can fix the value of MXC_CPU_VF610 then. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Suggested-by: Stefano Babic <sbabic@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
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