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| * | x86: Add DFI BT700 BayTrail board supportStefan Roese2016-08-16-0/+611
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the DFI BayTrail BT700 QSeven SoM installed on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton NCT6102D Super IO chip providing the UART as console. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: conga-qeval20-qa3: Add SMBus support and SMSC2513 config codeStefan Roese2016-08-16-12/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the following changes: - Remove Designware I2C support from dts as its not used - Configure SMBus PADs in dts - Enable I2C commands and I2C support - Configure SMSC2513 USB hub via SMBus upon startup - Move environment location to match Minnowmax example - Enhancement of the default environment Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)Stefan Roese2016-08-16-47/+269
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed. This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable. Tested on a congatec BayTrail board to configure the SMSC2513 USB hub. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | cbfs: Fix incorrect CBFS file header size being usedYaroslav K2016-08-16-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes incorrect filenames in cbfsls output. Signed-off-by: Yaroslav K. <yar444@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> [clean up checkpatch errors and warnings] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: bdinfo: Drop meaningless valuesSimon Glass2016-08-16-10/+0
| | | | | | | | | | | | | | | | | | | | | These are not useful on x86 so do not print them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | bdinfo: Don't print out empty DRAM banksSimon Glass2016-08-16-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no sense in printing out DRAM banks of size 0 since this means they are empty. Skip them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: bayleybay: Add PS/2 keyboard and mouse to ASL fileBin Meng2016-08-16-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | Without PS/2 keyboard and mouse in the ASL file, Windows does not see them. No problem for Linux as it probes keyboard and mouse via the legacy 8042 I/O port. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: som-db5800-som-6867: fix SERIRQ on resetGeorge McCollister2016-08-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Explicitly enable ILB_SERIRQ function 1 in cfio_regs_pad_ilb_serirq_PCONF0. Pad configuration for SERIRQ is not set to enable the SERIRQ function after a reset though strangely, it is on initial boot. Rebooting from Linux, reset command in u-boot and even pushing the reset button on the development board all lead to the SERIRQ function being disabled (address 0xfed0c560 with value of 0x2003cc80). Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | misc: Add simple driver for some Nuvoton NCT6102D devicesStefan Roese2016-08-16-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
| * | x86: baytrail: Add SIO HS-UART clock setupStefan Roese2016-08-16-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support the BayTrail internal SIO HS UART, the internal UART clock needs to get configured. This patch adds support for this clock configuration which will be done, if the PCI device(s) are found. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: cache.h: Add default for CONFIG_SYS_CACHELINE_SIZEStefan Roese2016-08-16-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't just define ARCH_DMA_MINALIGN but also CONFIG_SYS_CACHELINE_SIZE if it's undefined. This is needed for the xhci driver to compile. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Mention running U-Boot in 64-bit mode in the READMESimon Glass2016-08-16-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | This feature is not supported. Document this, and add some details on how it might be implemented. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Add a reference to README.efiSimon Glass2016-08-16-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | UEFI is commonly used on x86. Add a reference to U-Boot's support for this in the x86 README. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Mention how to boot a 64-bit kernel from U-BootSimon Glass2016-08-16-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | The README indicates that this is not supported, but this is no-longer true. Update the text to indicate this and describe the FIT changes required. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: doc: Add note about the debug FSP usage on BayTrailStefan Roese2016-08-16-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The debug FSP image is bigger in size than the normal FSP image. This patch adds a small description on how to use this FSP debug version by changing CONFIG_FSP_ADDR. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: conga-qeval20-qa3: Add missing MAINTERNERS entryStefan Roese2016-08-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add entry for the missing internal UART defconfig to the MAINTAINERS file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | mmc: mmc_legacy: fix the compiler error with disabled CONFIG_DM_MMC_OPSJaehoon Chung2016-08-16-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To prevent the compiler error, split the checking condition whether cfg->ops is NULL or not. It's more clearly, because it's not included in mmc_config structure when CONFIG_DM_MMC_OPS is disabled. drivers/mmc/mmc_legacy.c: In function ‘mmc_create’: drivers/mmc/mmc_legacy.c:118:31: error: ‘const struct mmc_config’ has no member named ‘ops’ drivers/mmc/mmc_legacy.c:118:58: error: ‘const struct mmc_config’ has no member named ‘ops’ make[1]: *** [drivers/mmc/mmc_legacy.o] Error 1 Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | mmc: send CMD0 before CMD1 for some MMC cardsYangbo Lu2016-08-16-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the MMC framework was added in u-boot, the mmc_go_idle was added before mmc_send_op_cond_iter in function mmc_send_op_cond annotating that some cards seemed to need this. Actually, we still need to do this in function mmc_complete_op_cond for those cards. This has been verified on Micron MTFC4GACAECN eMMC chip. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
* | | defconfig: k2g_evm_defconfig: Enable mmc driver modelSekhar Nori2016-08-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | K2G can benefit from driver model support in the MMC/SD driver it uses: omap_hsmmc Enable driver model MMC support for K2G. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ARM: dts: k2g-evm: enable mmc/sd suppportSekhar Nori2016-08-16-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The K2G EVM from TI has an SD card slot as well as onboard eMMC for data storage. Enable support for these. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ARM: dts: K2G: Add support for MMC controllerSekhar Nori2016-08-16-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | K2G SoC from TI has two MMC/SD controllers. Add device tree data for these. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | drivers: mmc: omap_hsmmc: fix build breakageSekhar Nori2016-08-16-0/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | structure member 'cd_inverted' of omap_hsmmc_data is available only when OMAP_HSMMC_USE_GPIO is defined. When CONFIG_DM_MMC is defined, but not CONFIG_OMAP_GPIO, this will cause build breakage in omap_hsmmc driver of the sort: CC drivers/mmc/omap_hsmmc.o ../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata': ../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted' priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted"); ^ Fix this by accessing cd_inverted only when OMAP_HSMMC_USE_GPIO is defined. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | common: env_nand: Ensure that we have nand_info[0] prior to useTom Rini2016-08-15-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that nand_info[] is an array of pointers we need to ensure that it's been populated prior to use. We may for example have ENV in NAND set in configurations that run on boards with and without NAND (where default env is fine enough, such as omap3_beagle and beagleboard (NAND) vs beagle xM (no NAND)). Fixes: b616d9b0a708 ("nand: Embed mtd_info in struct nand_chip") Cc: Scott Wood <oss@buserror.net> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Scott Wood <oss@buserror.net>
* | tools/env: ensure environment starts at erase block boundaryAndreas Fenkart2016-08-15-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 56086921 added support for unaligned environments access. U-boot itself does not support this: - env_nand.c fails when using an unaligned offset. It produces an error in nand_erase_opts{drivers/mtd/nand/nand_util.c} - in env_sf/env_flash the unused space at the end is preserved, but not in the beginning. block alignment is assumed - env_sata/env_mmc aligns offset/length to the block size of the underlying device. data is silently redirected to the beginning of a block There is seems no use case for unaligned environment. If there is some useful data at the beginning of the the block (e.g. end of u-boot) that would be very unsafe. If the redundant environments are hosted by the same erase block then that invalidates the idea of double buffering. It might be that unaligned access was allowed in the past, and that people with legacy u-boot are trapped. But at the time of 56086921 it wasn't supported and due to reasons above I guess it was never introduced. I prefer to remove that (unused) feature in favor of simplicity Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
* | xtensa: add support for the 'xtfpga' evaluation boardChris Zankel2016-08-15-0/+884
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'xtfpga' board is actually a set of FPGA evaluation boards that can be configured to run an Xtensa processor. - Avnet Xilinx LX60 - Avnet Xilinx LX110 - Avnet Xilinx LX200 - Xilinx ML605 - Xilinx KC705 These boards share the same components (open-ethernet, ns16550 serial, lcd display, flash, etc.). Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add core information for the de212 processorMax Filippov2016-08-15-0/+839
| | | | | | | | | | | | | | | | | | | | DE212 is a general purpose xtensa processor without full MMU. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add core information for the dc233c processorMax Filippov2016-08-15-0/+757
| | | | | | | | | | | | | | | | | | | | DC233C is an xtensa processor with full MMUv3 capable of running Linux. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add core information for the dc232b processorChris Zankel2016-08-15-0/+674
| | | | | | | | | | | | | | | | | | | | | | DC232B is an xtensa processor with full MMUv2 capable of running Linux. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add support for the xtensa processor architecture [2/2]Chris Zankel2016-08-15-0/+3107
| | | | | | | | | | | | | | | | | | | | | | | | | | The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add support for the xtensa processor architecture [1/2]Chris Zankel2016-08-15-6/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | vexpress: Check TC2 firmware support before defaulting to nonsec bootingJon Medhurst \(Tixy\)2016-08-15-5/+44
| | | | | | | | | | | | | | | | | | | | The firmware on TC2 needs to be configured appropriately before booting in nonsec mode will work as expected, so test for this and fall back to sec mode if required. Signed-off-by: Jon Medhurst <tixy@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-08-15-78/+3686
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| * | mmc: atmel_sdhci: Convert to the driver model supportWenyou Yang2016-08-15-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the driver to the driver model while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | dm: atmel: Add driver model support for the ehci driverWenyou Yang2016-08-15-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | ARM: at91/dt: Add device tree for SAMA5D2 XplainedWenyou Yang2016-08-15-0/+874
| | | | | | | | | | | | | | | | | | Add device tree for SAMA5D2 Xplained board. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * | atmel: Bring in at91 pio4 device tree file and bindingsWenyou Yang2016-08-15-0/+946
| | | | | | | | | | | | | | | | | | | | | | | | Bring in required device tree file and bindings from Linux. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | pinctrl: at91-pio4: Add pinctrl driverWenyou Yang2016-08-15-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. The pin configuration is performed on specific registers which are shared along with the gpio controller. So regard the pinctrl device as a child of atmel_pio4 device. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | gpio: atmel_pio4: Rework to support DM & DTWenyou Yang2016-08-15-23/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the driver to support driver model and device tree, and support to regard the pio4 pinctrl device as a child of atmel_pio4 device. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | gpio: atmel_pio4: Move PIO4 definitions to head fileWenyou Yang2016-08-15-53/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to make these PIO4 definitions shared with AT91 PIO4 pinctrl driver, move them from the existing gpio driver to the head file, and rephrase them. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | clk.h: inline clk_get_by_name()Andreas Bießmann2016-08-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compile warning for non OF_CONTROL builds: ---8<--- In file included from /Volumes/devel/u-boot/drivers/gpio/atmel_pio4.c:10:0: /Volumes/devel/u-boot/include/clk.h:107:12: warning: 'clk_get_by_name' defined but not used [-Wunused-function] --->8--- Signed-off-by: Andreas Bießmann <andreas@biessmann.org> Acked-by: Stephen Warren <swarren@nvidia.com>
| * | clk: at91: Add clock driverWenyou Yang2016-08-15-3/+784
| | | | | | | | | | | | | | | | | | | | | | | | The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | tpm: atmel_twi: Make compatible with DM I2C bussesmario.six@gdsys.cc2016-08-15-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 302c5db ("dm: tpm: Add Driver Model support for tpm_atmel_twi driver") converted the Atmel TWI TPM driver itself to driver model, but kept the legacy-style i2c_write/i2c_read calls. Commit 3e7d940 ("dm: tpm: Every TPM drivers should depends on DM_TPM") then made DM_I2C a dependency of the driver, effectively forcing users to turn on CONFIG_DM_I2C_COMPAT to get it to work. This patch adds the necessary dm_i2c_write/dm_i2c_read calls to make the driver compatible with DM, but also keeps the legacy calls in ifdefs, so that the driver is now compatible with both DM and non-DM setups. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | i2c: atmel: DT binding for i2c driverSongjun Wu2016-08-15-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | DT binding documentation for atmel i2c driver. Signed-off-by: Songjun Wu <songjun.wu@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * | i2c: atmel: add i2c driverSongjun Wu2016-08-15-0/+426
| | | | | | | | | | | | | | | | | | | | | | | | Add i2c driver. Signed-off-by: Songjun Wu <songjun.wu@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-08-15-516/+1326
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| * | | net: mii: Clean up legacy glue that is not usedJoe Hershberger2016-08-15-86/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cleanup of the legacy mii registration API that's no longer used now that the drivers have been converted to use the (more) modern API. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net: mii: Changes not made by spatchJoe Hershberger2016-08-15-65/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the functions passed to the registration function are not in the same C file (extern) then spatch will not handle the dependent changes. Make those changes manually. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> For the 4xx related files: Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net: mii: Fix changes made by spatchJoe Hershberger2016-08-15-41/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the changes were a bit too complex. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net: mii: Use spatch to update miiphy_registerJoe Hershberger2016-08-15-188/+543
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | scripts: Add a cocci patch for miiphy_registerJoe Hershberger2016-08-15-0/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many Ethernet drivers still use the legacy miiphy API to register their mdio interface for access to the mdio commands. This semantic patch will convert the drivers from the legacy adapter API to the more modern alloc/register API. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit v1.1 at 2024-11-10 04:39:23 +0000