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* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-11-16-106/+420
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning drivers/qe/uec.c: Fix GCC 4.6 build warning drivers/usb/host/ehci-fsl.c: Fix GCC 4.6 build warning drivers/net/fm/fm.c: Fix GCC 4.6 build warning board/sbc8560/sbc8560.c: Fix GCC 4.6 build warning board/sbc8548/sbc8548.c: Fix GCC 4.6 build warning board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warning board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning board/freescale/common/pixis.c: Fix GCC 4.6 build warning board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning phylib: Enable AR8021 phy support powerpc/85xx: Set max alloc length to 10MB on P1022DS powerpc/mpc85xx: Set SYSCLK to the required frequency powerpc/85xx: Fix NAND SPL support powerpc/85xx: Fix MPC8572DS NAND build fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399 powerpc/85xx: Add support for Book-E MMU Arch v2.0 powerpc/85xx: Make inclusion of USB device fixup conditional powerpc/85xx: Fix warning for USB device-fixup powerpc/85xx: resize the boot page TLB before relocating CCSR powerpc/85xx: verify the current address of CCSR before relocating it powerpc/85xx: add some missing sync instructions in the CCSR relocation code powerpc/85xx: fix some comments in the CCSR relocation code powerpc/85xx: fix definition of MAS register macros powerpc/mpc8548cds: Fix network initialization powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129 powerpc/QorIQ: fix network frame manager TBI PHY address settings
| * powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NANDKumar Gala2011-11-11-4/+6
| | | | | | | | | | | | | | Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing LAW entries not needed during SPL phase. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix: ctrl_regs.c: In function 'set_ddr_sdram_cfg_2': ctrl_regs.c:641:15: warning: variable 'rcw_en' set but not used [-Wunused-but-set-variable] ctrl_regs.c: In function 'compute_fsl_memctl_config_regs': ctrl_regs.c:951:31: warning: array subscript is above array bounds [-Warray-bounds] ctrl_regs.c:752:34: warning: array subscript is above array bounds [-Warray-bounds] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-1/+6
| | | | | | | | | | | | | | | | | | | | Fix: fsl_corenet_serdes.c: In function 'fsl_serdes_init': fsl_corenet_serdes.c:511:8: warning: variable 'buf' set but not used [-Wunused-but-set-variable] fsl_corenet_serdes.c:498:18: warning: variable 'lane_prtcl' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-0/+4
| | | | | | | | | | | | | | | | | | Fix: options.c: In function 'populate_memctl_options': options.c:486:28: warning: variable 'pdodt' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe/uec.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-7/+0
| | | | | | | | | | | | | | | | | | | | | | uec.c: In function 'uec_stop': uec.c:267:22: warning: variable 'uccf' set but not used [-Wunused-but-set-variable] uec.c: In function 'uec_set_mac_if_mode': uec.c:328:15: warning: variable 'uec_info' set but not used [-Wunused-but-set-variable] uec.c: In function 'adjust_link': uec.c:519:11: warning: variable 'uec_regs' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/usb/host/ehci-fsl.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-1/+3
| | | | | | | | | | | | | | | | | | Fix: ehci-fsl.c: In function 'ehci_hcd_init': ehci-fsl.c:43:7: warning: variable 'usb_phy' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/net/fm/fm.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+1
| | | | | | | | | | | | | | | | | | Fix: fm.c: In function 'fm_init_common': fm.c:398:6: warning: variable 'n' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/sbc8560/sbc8560.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+1
| | | | | | | | | | | | | | | | | | Fix: sbc8560.c: In function 'ft_board_setup': sbc8560.c:351:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/sbc8548/sbc8548.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+0
| | | | | | | | | | | | | | | | | | Fix: sbc8548.c: In function 'local_bus_init': sbc8548.c:80:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+0
| | | | | | | | | | | | | | mpc8569mds.c: In function 'local_bus_init': mpc8569mds.c:306:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+1
| | | | | | | | | | | | | | | | | | | | | | Fix: mpc8568mds.c: In function 'local_bus_init': mpc8568mds.c:150:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8568mds.c: In function 'pib_init': mpc8568mds.c:271:11: warning: variable 'orig_i2c_bus' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-4/+0
| | | | | | | | | | | | | | | | | | | | | | Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/freescale/common/pixis.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-3/+1
| | | | | | | | | | | | | | | | | | Fix: pixis.c: In function 'strfractoint': pixis.c:383:6: warning: variable 'intarr_len' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+1
| | | | | | | | | | | | | | | | | | Fix: cds_pci_ft.c: In function 'cds_pci_fixup': cds_pci_ft.c:31:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+2
| | | | | | | | | | | | | | | | | | Fix: fsl_lbc.c: In function 'upmconfig': fsl_lbc.c:110:9: warning: variable 'mdr' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-3/+2
| | | | | | | | | | | | | | | | | | Fix: tlb.c: In function 'disable_tlb': tlb.c:175:34: warning: variable '_mas7' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+1
| | | | | | | | | | | | | | | | | | Fix: cpu_init.c: In function 'cpu_init_r': cpu_init.c:320:7: warning: variable 'l2srbar' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * phylib: Enable AR8021 phy supportXie Xiaobo2011-11-11-0/+1
| | | | | | | | | | | | | | | | Enable AR8021 as it used on Freescale boards: P1020RDB-PC, P1021RDB-PC, P2020RDB-PC, P1020UTM-PC, and P1020MSBG-PC. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Set max alloc length to 10MB on P1022DSJerry Huang2011-11-11-1/+1
| | | | | | | | | | | | | | | | | | | | In order to support 1920x01080 resolution, we must increase the alloc length. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Anatolij Gustschin <agust@denx.de> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mpc85xx: Set SYSCLK to the required frequencyJerry Huang2011-11-11-1/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For ICS307-02, there is one general expression to generate SYSCLK: CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD) If we want the required frequency for SYSCLK, we must find one solution to generate this frequency, this solution includes VDW, RDW and OD. For OD, there are only eight option value: 10, 2, 8, 4, 5, 7, 3, 6. For RDW, the range is 1 to 127. For VDW, the range is 4 to 511. First, we use one OD, RDW and required SYSCLK to calculate the VDW, if VDW is in it's range, we will calculate the CLK1Frequency with the OD, RDW and VDW calculated, and we will check this percent (CLK1Frequency / required SYSCLK), and the precision is 1/1000. if the percent is less than 1/1000, we think the CLK1Frequency is we want. Otherwise, We will continue to calculate it with the next OD and RDW. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Fix NAND SPL supportKumar Gala2011-11-09-5/+5
| | | | | | | | | | | | | | | | We cause CCSRBAR to be relocated in the SPL phase of NAND boot which isn't expected and breaks things. Fixing the board config.h to NOT relocate CCSR during the CONFIG_NAND_SPL phase. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Fix MPC8572DS NAND buildKumar Gala2011-11-08-0/+2
| | | | | | | | | | | | | | Reduce NAND SPL build size by not include TLB entries that arent used by it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399Poonam Aggrwal2011-11-08-2/+2
| | | | | | | | | | | | | | | | Wrong pointer was being used to copy code into L2SRAM. Also removed the unreferenced variable l2srbar. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for Book-E MMU Arch v2.0Kumar Gala2011-11-08-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | A few of the config registers changed definition between MMU v1.0 and MMUv2.0. The new e6500 core from Freescale implements v2.0 of the architecture. Specifically, how we determine the size of TLB entries we support in the variable size (or TLBCAM/TLB1) array is specified in a new register (TLBnPS - TLB n Page size) instead of via TLBnCFG. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Make inclusion of USB device fixup conditionalRamneek Mehresh2011-11-08-0/+7
| | | | | | | | | | | | | | | | Include call to usb device-fixup only when CONFIG_HAS_FSL_DR_USB is defined for the platform - P1020RDB, P1010RDB, P1020-PC Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Fix warning for USB device-fixupRamneek Mehresh2011-11-08-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | Fix USB device-fixup warning "node not found". This was occuring because of static nature of start_offset variable Static start_offset was storing offset of last node modified, and was becoming issue if node fixup is carried multiple times, resulting in "node not found" warning Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: resize the boot page TLB before relocating CCSRTimur Tabi2011-11-08-0/+49
| | | | | | | | | | | | | | | | | | | | On some Freescale systems (e.g. those booted from the on-chip ROM), the TLB that covers the boot page can also cover CCSR, which breaks the CCSR relocation code. To fix this, we resize the boot page TLB so that it only covers the 4KB boot page. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: verify the current address of CCSR before relocating itTimur Tabi2011-11-08-0/+27
| | | | | | | | | | | | | | | | | | | | | | Verify that CCSR is actually located where it is supposed to be before we relocate it. This is useful in detecting U-Boot configurations that are broken (e.g. an incorrect value for CONFIG_SYS_CCSRBAR_DEFAULT). If the current value is wrong, we enter an infinite loop, which is handy for debuggers. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: add some missing sync instructions in the CCSR relocation codeTimur Tabi2011-11-08-0/+4
| | | | | | | | | | | | | | Calls to tlbwe and tlbsx should be preceded with an isync/msync pair. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: fix some comments in the CCSR relocation codeTimur Tabi2011-11-08-2/+2
| | | | | | | | | | Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: fix definition of MAS register macrosTimur Tabi2011-11-08-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Some of the MAS register macros do not protect the parameter with parentheses, which could cause wrong values if the parameter includes operators. Also fix the definition of TSIZE_TO_BYTES() so that it actually uses the parameter. This hasn't caused any problems to date because the parameter was always been 'tsize'. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mpc8548cds: Fix network initializationchenhui zhao2011-11-08-7/+60
| | | | | | | | | | | | | | | | | | Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
| * powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129chenhui zhao2011-11-08-0/+98
| | | | | | | | | | | | | | | | | | | | Erratum NMG_eTSEC129 (eTSEC86 in MPC8548 document) applies to some early verion silicons. This workaround detects if the eTSEC Rx logic is properly initialized, and reinitialize the eTSEC Rx logic. Signed-off-by: Gong Chen <g.chen@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/QorIQ: fix network frame manager TBI PHY address settingsRoy Zang2011-11-08-24/+0
| | | | | | | | | | | | | | | | | | | | | | | | TBI PHY address (TBIPA) register has been set in general frame manager phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c So remove the duplicate code on QorIQ frame manager Ethernet related platforms, which include Hydra board, P4080DS board and P2041rdb board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Wolfgang Denk2011-11-16-1/+1237
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nds32: adp-ag101p: add product into MAINTAINERS list adp-ag101p: Add SoC and board support of ag101p nds32: fix data section of linker script dwcddr21mctl: Synopsys DWC DDR2/1 Memory Controller andes_pcu.h: header file of andes_pcu power control unit
| * | adp-ag101p: add product into MAINTAINERS listMacpaul Lin2011-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | Add ADP-AG101P into MAINTAINERS list. Add ADP-AG101P into boards.cfg. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | adp-ag101p: Add SoC and board support of ag101pMacpaul Lin2011-11-10-0/+530
| | | | | | | | | | | | | | | | | | Add softcore SoC ag101p and the board adp-ag101p support. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | nds32: fix data section of linker scriptMacpaul Lin2011-11-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Make linker script handles .data.rel sections. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Tested-by: Macpaul Lin <macpaul@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
| * | dwcddr21mctl: Synopsys DWC DDR2/1 Memory ControllerMacpaul Lin2011-11-09-0/+337
| | | | | | | | | | | | | | | | | | Header definitions of Synopsys DWC DDR2/1 Memory Controller. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | andes_pcu.h: header file of andes_pcu power control unitMacpaul Lin2011-11-09-0/+367
| |/ | | | | | | | | | | header file of andes_pcu power control unit Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2011-11-16-1/+1
|\ \ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: fsl_i2c: Fix compile warning
| * | fsl_i2c: Fix compile warningKumar Gala2011-11-09-1/+1
| |/ | | | | | | | | | | | | fsl_i2c.c: In function 'i2c_init': fsl_i2c.c:245:7: warning: assignment discards qualifiers from pointer target type Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Tegra2: mmc: Factor out mmc_wait_inhibit functionalityAnton staaf2011-11-12-19/+27
| | | | | | | | | | | | | | | | | | | | | | This is a well encapsulated section of mmc_send_cmd, by moving it to it's own function it increases the readability of mmc_send_cmd. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: Add data transfer completion timeoutAnton staaf2011-11-12-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when no expected completion condition occures in the mmc_send_cmd while loop that is waiting for a data transfer to complete the MMC driver just hangs. This patch adds an arbitrary 2 second timeout. If nothing we recognize occures within 2 seconds some diagnostic information is printed and we fail out. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: Support DMA restarts at buffer boundariesAnton staaf2011-11-12-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: define register field values in tegra2_mmc.hAnton staaf2011-11-12-27/+85
| | | | | | | | | | | | | | | | | | | | | | | | This moves the magic numbers sprinkled about the MMC driver to a single location in the header file and gives them meaningful names. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | MMC: PL180: Fix infinite loop with VExpress extended fifo implementationJon Medhurst (Tixy)2011-11-08-26/+0
|/ | | | | | | | | | | | | | | | | | | The new IO FPGA implementation for Versatile Express contains an MMCI (PL180) cell with the FIFO extended to 128 words. This causes the read_bytes() function to go into an infinite loop; as it will wait for for the half-full signal (SDI_STA_RXFIFOBR) if there are more than 8 words remaining (SDI_FIFO_BURST_SIZE), but it won't receive this signal once there are fewer than 64 words left to transfer. One possible fix is to add some build time configuration to change SDI_FIFO_BURST_SIZE for the new implementation. However, the problematic code only seems to exist as a small performance optimisation, so the solution implemented by this patch is to simply remove it. The error checking following the loop is also removed as this will be handled by code further down the function. Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-2214/+3437
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * powerpc/mpc83xx: Add 33.33MHz support for mpc8360emdsJerry Huang2011-11-07-10/+50
| | | | | | | | | | | | | | | | The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-11-20 12:59:02 +0000