summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
| * tegra: dts: colibri_t30 add serial port detailsMarcel Ziswiler2014-10-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | Add missing chosen stdout-path device tree node. This got missed by commit c369139234c03b1494394d12cd27009f47aa6606 tegra: dts: Add serial port details Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: colibri_t30: clean-up spurious new lineMarcel Ziswiler2014-10-22-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Clean-up a spurious new line which got introduced resp. left behind by commit f1ef2b62339526df3b921bcfefd174ce76d4c624 kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Use mem size from MC in combination with get_ram_size()Marcel Ziswiler2014-10-22-51/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On popular request this now completes the Warren's work started for TK1: aeb3fcb35956461077804720b8a252d50758d7e0 ARM: tegra: Use mem size from MC rather than ODMDATA In addition to the move of using the Tegra memory controller (MC) register rather than ODMDATA for T20, T30 and T114 as well it further uses the generic get_ram_size() function (see "common/memsize.c") <supposed to be used in each and every U-Boot port>TM. Added benefit is that it should <catch 99% of hardware related (i. e. reliably reproducible) memory errors> as well. Thoroughly tested on the various Toradex line of Tegra modules available which unfortunately does not include T114 and T124 (yet at least) plus on the Jetson TK1. Based-on-work-by: Stephen Warren <swarren@nvidia.com> Based-on-work-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: clean-up useless defineMarcel Ziswiler2014-10-22-4/+0
| | | | | | | | | | | | | | | | | | | | | | Wondering what exactly that one should bring (;-p). Looks like a remnant of the last commit 783e6a72b8278d59854ced41a4696c9a14abbb0b kconfig: move CONFIG_OF_* to Kconfig Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * gpio: header file comment spelling fixesMarcel Ziswiler2014-10-22-5/+5
| | | | | | | | | | | | Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: colibri_t30: asix usb ethernet reset regressionMarcel Ziswiler2014-10-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix ASIX USB to Ethernet reset which due to the new driver model Tegra GPIO driver changes now requires a label string to be provided otherwise the reservation and subsequent direction/value calls will fail. This fixes a regression introduced by commit: 2fccd2d96badcdf6165658a99771a4c475586279 tegra: Convert tegra GPIO driver to use driver model Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: gpio: fix null label regressionMarcel Ziswiler2014-10-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix Tegra GPIO driver to not crash resp. misbehave upon requesting GPIOs with an empty aka NULL label. As the driver uses exclusively the label to check for reservation status actually supplying one is mandatory! This fixes a regression introduced by commit: 2fccd2d96badcdf6165658a99771a4c475586279 tegra: Convert tegra GPIO driver to use driver model Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * mmc: Tegra: Fix timeout issue seen on certain eMMC partsMarcel Ziswiler2014-10-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During rigorous testing of our latest update infrastructure I came across quite consistent timeouts on certain eMMC parts (e.g. Hynix H26M21001ECR) when writing big (e.g. in excess of 400 MB) file system images: MMC write: dev # 0, block # 40960, count 944128 ... mmc_send_cmd_bounced: MMC Timeout Interrupt status 0x00000001 Interrupt status enable 0xdfff003b Interrupt signal enable 0xdfff0002 Present status 0x01870106 mmc write failed Comparing the various data sheets I came across the following timeout specification: Secure Erase/TRIM Timeout=300ms*2*10=6000ms Unfortunately empirical testing still failed albeit much more rarely. Increasing the timeout to 8000ms made it finally disappear entirely. This patch allows us writing various eMMC parts without seeing any further issues. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * arm: tegra: use architecture specific memcpyMarcel Ziswiler2014-10-22-0/+2
| | | | | | | | | | | | | | | | Use architecture specific memcpy to speed up things. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * arm: tegra: initial support for apalis t30Marcel Ziswiler2014-10-22-0/+866
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds board support for the Toradex Apalis T30 a computer on module which can be used on different carrier boards. For the sake of ease of use we do not distinguish between different carrier boards for now as the base module features are deemed sufficient enough for regular booting. The following functionality is working so far: - eMMC boot and environment storage - Gigabit Ethernet (once Thierry's PCIe as well as my E1000 resp. i210 fixes hit mainline) - MMC/SD cards (both 8-bit as well as 4-bit slot) - USB client/host (dual role port as client e.g. for DFU/UMS, other two ports as host) Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: add PCIe-related pins to the Jetson TK1 pinmux tablesStephen Warren2014-10-22-0/+5
| | | | | | | | | | | | | | | | | | | | This pinmux tables currently omit any configuration for PCIe clk_req, wake, and rst pins, which in turn causes intermittent failures in U-Boot's PCIe support. Import an updated version of the pinmux tables which rectifies this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | mips: enable CONFIG_USE_PRIVATE_LIBGCC by defaultMasahiro Yamada2014-10-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the private libgcc, we need a full multilib toolchain with different libgcc or multiple toolchains to build all BE/LE and hard-float/soft-float variants of MIPS boards. That is not feasible. This commit allows us to build all the MIPS boards with a single kernel.org toolchain: https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/ x86_64-gcc-4.9.0-nolibc_mips-linux.tar.xz This change sounds reasonable for most users. If necessary, you can disable this option via "make menuconfig" or friends. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | kconfig: invoke silentoldconfig if spl, tpl/.config is updatedMasahiro Yamada2014-10-23-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | When spl/.config is updated by "make spl/menuconfig" or friends, spl/include/config/auto.conf, spl/include/generated/autoconf.h and some other files must be updated by "make silentoldconfig". There is no hook for SPL in the top Makefile, so this commit touches .config when spl/.config is updated to invoke silentoldconfig. Likewise for TPL. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: fix a bug of the u-boot-spl link ruleMasahiro Yamada2014-10-23-4/+4
| | | | | | | | | | | | | | | | | | | | cmd_u-boot-spl includes $(PLATFORM_LIBS) which changes when CONFIG_USE_PRIVATE_GCC is updated. The u-boot-spl image should be re-linked if any prerequisite is newer than it or the command line has changed. $(call, if_changed,...) should be used instead of $(call cmd,...). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kconfig: move CONFIG_USE_PRIVATE_LIBGCC to KconfigMasahiro Yamada2014-10-23-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86. Those architectures should "select" HAVE_PRIVATE_LIBGCC and CONFIG_USE_PRIVATE_LIBGCC should depend on it. Currently, this option is enabled on Tegra boards and x86 architecture. Move the definition from header files to Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* | kbuild: drop CONFIG_USE_PRIVATE_LIBGCC=path/to/libgcc syntaxMasahiro Yamada2014-10-23-4/+0
| | | | | | | | | | | | | | | | | | Now CONFIG_USE_PRIVATE_LIBGCC is only used as a boolean macro. Remove CONFIG_USE_PRIVATE_LIBGCC=path/to/libgcc syntax. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | x86: set CONFIG_USE_PRIVATE_LIBGCC to yMasahiro Yamada2014-10-23-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The motivation of this commit is to change CONFIG_USE_PRIVATE_LIBGCC to a boolean macro so we can move it to Kconfig. In the current implementation, there are two forms of syntax for this macro: - CONFIG_USE_PRIVATE_LIBGCC=y - CONFIG_USE_PRIVATE_LIBGCC=path/to/private/libgcc The latter is only used by x86 architecture. With a little bit refactoring, it can be converted to the former. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: move CONFIG_SYS_HZ to lib/KconfigMasahiro Yamada2014-10-23-25/+8
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h (but some boards still have redundant definitions). This commit moves the definition and the document in README to Kconfig. Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000, the sanity check in lib/time.c should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Marek Vasut <marex@denx.de>
* | Makefile: Add CONFIG_BUILD_TARGET to automatically build an special imageStefan Roese2014-10-23-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add target to build it automatically upon "make" / MAKEALL. This can/should be set by board / cpu specific headers if a special U-Boot image is required for this SoC / board. E.g. used by Marvell Armada XP to automatically build the u-boot.kwb target. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | tools: kwbimage: Add image version 1 support for Armada XP / 370Stefan Roese2014-10-23-268/+782
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch integrates the Barebox version of this kwbimage.c file into U-Boot. As this version supports the image version 1 type for the Armada XP / 370 SoCs. It was easier to integrate the existing and known to be working Barebox source than to update the current U-Boot version to support this v1 image header format. Now all Marvell MVEBU SoCs are supported: Image type 0: Kirkwood & Dove Image type 1: Armada 370 & Armada XP Please note that the current v1 support has this restuction (same as has Barebox version): Not implemented: support for the register headers and secure headers in v1 images Tested on Marvell DB-78460-BP eval board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | tools: Compile kwboot for Marvell Armada XP as those SoCs are now supportedStefan Roese2014-10-23-0/+1
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | tools/kwboot: Sync with latest barebox version to support Armada XPStefan Roese2014-10-23-14/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | The barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version. Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | arm: kirkwood: Remove some dead code from cpu.cStefan Roese2014-10-23-55/+0
| | | | | | | | | | | | | | All those functions removed with this patch are not accessed at all. So lets remove them. Signed-off-by: Stefan Roese <sr@denx.de>
* | arm: armada-xp: Add basic support for the maxBCM boardStefan Roese2014-10-23-0/+195
| | | | | | | | | | | | | | The maxBCM board is equipped with the Marvell Armada-XP MV78460 SoC. It integrates an SPI NOR flash and an Marvell 88E6185 switch. Signed-off-by: Stefan Roese <sr@denx.de>
* | arm: armada-xp: Add basic support for the Marvell DB-MV784MP-GP boardStefan Roese2014-10-23-0/+242
| | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell DB-MV784MP-GP evaulation board. This is the first board that uses the recently created Armada XP 78460 SoC support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | arm: armada-xp: Add basic support for Marvell Armada XP SoCStefan Roese2014-10-23-1/+447
| | | | | | | | | | | | | | | | | | | | | | This basic support for the Marvell Armada XP is base on the existing kirkwood support. Which has been generatized by moving some common files into common marvell locations. This is in preparation for the upcoming Armada XP MV78460 support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | i2c: mvtwsi: Add support for Marvell Armada XPStefan Roese2014-10-23-1/+1
| | | | | | | | | | | | | | | | To support the Armada XP SoC, we just need to include the correct header. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | net: phy.h: Make PHY autonegotiation timeout configurableStefan Roese2014-10-23-0/+2
| | | | | | | | | | | | | | | | | | | | The Marvell MV78460 eval board DB-78460-BP seems to need a longer PHY autonegotiation timeout than the "standard" 4 seconds. So lets make this timeout configurable. If not defined in the board config header the original 4000ms is used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com>
* | net: mvneta.c: Add support for the ethernet controller of the Marvell Armada ↵Stefan Roese2014-10-23-0/+1655
| | | | | | | | | | | | | | | | | | | | | | | | | | | | XP SoC This patch adds support for the NETA ethernet controller which is integrated in the Marvell Armada XP SoC's. This port is based on the Linux driver which has been stripped of the in U-Boot unused portions. Tested on the Marvell MV78460 eval board db-78460-bp. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Tested-by: Luka Perkov <luka@openwrt.org>
* | arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()Stefan Roese2014-10-23-48/+50
| | | | | | | | | | | | | | | | | | | | | | | | Additionally the SDRAM address decoding register address is not hard coded in the C code any more. A define is introduced for this base address. This makes is possible to use those gpio functions from other MVEBU SoC's as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASEStefan Roese2014-10-23-2/+3
| | | | | | | | | | | | | | | | | | | | This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: marvell: Extract kirkwood gpio functions into new common file gpio.cStefan Roese2014-10-23-79/+93
| | | | | | | | | | | | | | | | This makes is possible to use those gpio functions from other MVEBU SoC's as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC'sStefan Roese2014-10-23-0/+10
| | | | | | | | | | | | | | | | | | | | Compile the pin multiplexing only on Kirkwood platforms. As the Armada XP doesn't need it. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: mvebu: Add common mbus functions to use on Marvell SoCsStefan Roese2014-10-23-0/+545
| | | | | | | | | | | | | | | | | | | | These mbus functions are ported from Barebox. The Barebox version is ported from Linux. These functions will be first used by the upcoming Armada XP support. Later other Marvell SoC's will be adopted to use these functions as well (Kirkwood, Orion). Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | arm: marvell: Rework timer.c to make it usable for other MVEBU platformsStefan Roese2014-10-23-51/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following: - Rename defines and registers to not use kirkwood - Remove unused defines - Use clrsetbits() accessor functions - Coding style cleanup - Clear 25MHZ bit in timer controller register init for Armada XP There is no functional change for kirkwood. At least not intentionally. This will be used by the upcoming Armada XP support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.hStefan Roese2014-10-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | This move makes it possible to use this kirkwood SPI driver from other MVEBU platforms as well. This will be used by the upcoming Armada XP support. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: marvell: Move arch/kirkwood.h to arch/soc.hStefan Roese2014-10-23-32/+32
| | | | | | | | | | | | | | | | | | This move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: kirkwood: Move some SoC files into new arch/arm/mvebu-commonStefan Roese2014-10-23-4/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By moving some kirkwood files into a Marvell common directory, those files can be used by other Marvell platforms as well. The name mvebu is taken from the Linux kernel source tree. It has been chosen there to represent the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's currently are: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x This will be used by the upcoming Armada XP (MV78460) platform support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-10-23-11/+59
|\ \
| * | net: Display the size when tftpboot finishesSimon Glass2014-10-22-0/+2
| | | | | | | | | | | | | | | | | | If we know the file size, display it after loading the file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Enable FIT, ELF on corebootSimon Glass2014-10-22-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Enable FIT support and the bootelf command. Also change the default load address to somewhere other than the normal load address of the kernel, to allow for decompression without overwriting the original file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: config: link: Display the board model on the screenSimon Glass2014-10-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To get a display in U-Boot on link you must either build a coreboot that always sets it up, or use Esc-Refresh-Power to reset the machine. When we do have a display, it is nice to display the model at the top, so enable this option. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: link: Tidy up the command lines optionsSimon Glass2014-10-22-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | We may as well use hush. The auto-complete option was incorrect so this was not enabled. Also expand the command line size a little and go back to the default prompt since "boot>" doesn't seem any more useful. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | doc: Remove note about auto-complete not working with hushSimon Glass2014-10-22-4/+0
| | | | | | | | | | | | | | | | | | It does seem to work (tested on link), so update the docs. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: cros_ec: Enable cros_ec for linkSimon Glass2014-10-22-1/+22
| | | | | | | | | | | | | | | | | | Add defines to enable the Chrome OS EC interface and set it up on init. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: cros_ec: Update LPC driver for new cros_ec headerSimon Glass2014-10-22-2/+2
| | | | | | | | | | | | | | | | | | There was a minor rename of one of the defines, so update the driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: dts: Add device tree compatible string for Intel IPCSimon Glass2014-10-22-0/+2
| | | | | | | | | | | | | | | | | | Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Add device tree information for Chrome OS ECSimon Glass2014-10-22-0/+18
| | | | | | | | | | | | | | | | | | Add the required node describing how to find the EC on link. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: config: Enable dhcp on linkSimon Glass2014-10-22-0/+6
| | | | | | | | | | | | | | | | | | | | | The dhcp option is required to get bootp to work on the Chromebook Pixel, so enable it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge git://git.denx.de/u-boot-fdtTom Rini2014-10-23-0/+282
|\ \ \
generated by cgit v1.1 at 2024-11-06 18:41:55 +0000