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* sf: Fix to compute proper sector_sizeJagannadha Sutradharudu Teki2015-04-28-1/+5
| | | | | | | | | | | | | | | | | | | Upto now flash sector_size is assigned from params which isn't necessarily a sector size from vendor, so based on the SECT_* flags from flash_params the erase_size will compute and it will become the sector_size finally. Bug report (from Bin Meng): => sf probe SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB, total 2 MiB, mapped at ffe00000 => sf erase 0 +100 SF: 65536 bytes @ 0x0 Erased: OK Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reported-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: sf: Make SST flash write op work againBin Meng2015-04-28-0/+9
| | | | | | | | | | | | | With SPI flash moving to driver model, commit fbb0991 "dm: Convert spi_flash_probe() and 'sf probe' to use driver model" ignored the SST flash-specific write op (byte program & word program), which actually broke the SST flash from wroking. This commit makes SST flash work again under driver model, by adding SST flash-specific handling in the spi_flash_std_write(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* dm: sf: Save flash flags to struct spi_flashBin Meng2015-04-28-0/+4
| | | | | | | | Add a new member 'flags' in struct spi_flash to store the flash flags during spi_flash_validate_params(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* spi: omap3: Fix timeout handlingDavid Dueck2015-04-27-8/+12
| | | | | | | | | | | | | | | The timeout value is never reset during the transfer. This means that when transferring more data we eventually trigger the timeout. This was reported on the mailing list: "Spansion SPI flash read timeout with AM335x" Signed-off-by: David Dueck <davidcdueck@googlemail.com> CC: Tom Rini <trini@konsulko.com> CC: Stefan Roese <sr@denx.de> CC: Andy Pont <andy.pont@sdcsystems.com> Tested-by: David Dueck <davidcdueck@googlemail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* Revert "spi: add config option to enable the WP pin function on st micron ↵Jagannadha Sutradharudu Teki2015-04-23-45/+0
| | | | | | | | | | | | flashes" This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d. Note: Even un-reverting this patch couldn't works as expected, based on the latest testing from Heiko Schocher. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Heiko Schocher <hs@denx.de>
* dm: spi: Correct SPI claim/release_bus() methodsSimon Glass2015-04-23-12/+17
| | | | | | | | | | | These methods should be passed a slave device, not a bus. This matches the old SPI interface. It is important to know which device is claiming the bus so passing a bus is not that useful. Reported-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* mtd: spi: check return value of spi_setup_slavePeng Fan2015-04-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to check value of spi_setup_slave and spi_setup_slave_fdt. If their return value 'bus' is NULL, there is no need to pass it to following spi_flash_probe_tail. If 'bus' is null, the original function flow is as following: spi_flash_probe |->spi_setup_slave |->spi_probe_bus_tail |->spi_flash_probe_slave |->spi_free_slave Alougth check the pointer in spi_free_slave is ok, checking the return value of spi_setup_slave and spi_setup_slave_fdt is better. Before this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! SF: Failed to set up slave data abort pc : [<fff66dcc>] lr : [<fff7628c>] reloc pc : [<87814dcc>] lr : [<8782428c>] sp : fdf4fcf0 ip : e630396c fp : fe0d0888 r10: fffa2538 r9 : fdf4feb8 r8 : 02625a00 r7 : 00000002 r6 : fff94ec0 r5 : 00000000 r4 : 9355553c r3 : 1af0593c r2 : cb3fe030 r1 : fff94eb8 r0 : e59ff018 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... " After this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! Failed to initialize SPI flash at 0:2 " No data abort using this patch. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* cmd_sf: Fix problem with "sf update" and unaligned lengthStefan Roese2015-04-22-8/+8
| | | | | | | | | | | | | | | | | | | On SoCFPGA, using "sf update" with an non-4byte aligned length leads to a hangup (and reboot via watchdog). This is because of the unaligned access in the cadence QSPI driver which is hard to prevent since the data is written into a 4-byte wide FIFO. This patch fixes this problem by changing the behavior of the last sector write (not sector aligned). The new code is even simpler and copies the source data into the temp buffer and now uses the temp buffer to write the complete sector. So only one SPI sector write is used now instead of 2 in the old version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Gerlando Falauto <gerlando.falauto@keymile.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* spi flash: fix trivial problemsPavel Machek2015-04-22-5/+3
| | | | | | | | Fix typos and too big #ifdef. Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* zynq: spi: Remove unnecessary error conditionSiva Durga Prasad Paladugu2015-04-22-3/+0
| | | | | | | | | | Removed the unnecessary error check from spi_xfer as the bitlen zero is possible now to deassert the chip select for which no data is required to be transfered. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sf: Poll both the read status and flag statusSiva Durga Prasad Paladugu2015-04-22-7/+25
| | | | | | | | | Poll both the Read status and Flag status registers for sucessful erase and program operations for the Micron devices with E_FSR flag set in params table. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sf: Correct the macros as per new array fast read commandSiva Durga Prasad Paladugu2015-04-22-5/+6
| | | | | | | | | Correct the macros as per insertion of array fast read command CMD_READ_ARRAY_FAST in spi_read_cmds_array in file sf_probe.c Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* serial: pl01x: fix PL010 regressionLinus Walleij2015-04-21-2/+11
| | | | | | | | | | | | | | | | | | | | commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef "dm: serial: Tidy up the pl01x driver" caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* kconfig: remove duplicated CMD_DNS optionAndrey Skvortsov2015-04-21-5/+0
| | | | | | | | two CMD_DNS options were added by commit 60296a835cb17 ("commands: add more command entries in Kconfig") Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-04-20-26/+89
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| * net: pch_gbe: Fix pch_gbe device nameBin Meng2015-04-20-1/+1
| | | | | | | | | | | | | | The name "pch_gbe.%x" exceeds the limit of the name in the 'struct eth_device'. Rename it as just "pch_gbe". Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * net: gem: Use correct type for castingMichal Simek2015-04-20-1/+2
| | | | | | | | | | | | | | Use phys_addr_t which is used in function prototype in system.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net/phy: fixup for get_phy_idShengzhou Liu2015-04-20-1/+2
| | | | | | | | | | | | | | | | commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the warning and make those special PHYs working as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * net: phy: micrel: add support for KSZ8081MNXLuca Ellero2015-04-20-0/+11
| | | | | | | | | | | | | | This patch adds a support for KSZ8081MNX in MII mode. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> Acked-by: Pavel Machek <pavel@denx.de>
| * mii: add read-modify-write option to mii commandTim James2015-04-20-9/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When accessing PHY registers it is often desirable to only update selected bits, so it is necessary to first read the current value before writing back an modified value with the relevant bits updated. To simplify this and to allow such operations to be incorporated into simple shell scripts propose adding a 'modify' option to the existing mii command, which takes a mask indicating the bits to be updated in addition to a data value containing the new bits, ie, <updated> = (<data> & <mask>) | (<current> & ~<mask>). Signed-off-by: Tim <tim.james@macltd.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@konsulko.com> Cc: Tim <tim.james@macltd.com>
| * Update MAINTAINERS and git-mailrc for netJoe Hershberger2015-04-20-2/+5
| | | | | | | | | | | | | | Update to my corporate email and make the supported filter and aliases more accurate. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: rtl8169: Build warning fixes for 64-bitThierry Reding2015-04-20-11/+13
| | | | | | | | | | | | | | | | | | | | | | Turn ioaddr into an unsigned long rather than a sized 32-bit variable. While at it, fix a couple of pointer to integer cast size mismatch warnings by casting through unsigned long going from pointers to integers and vice versa. Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: phy: realtek: Disable interrupt on Realtek Ethernet PHY driversCodrin Ciubotariu2015-04-20-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have interrupts enabled by default. If the interrupt is not treated later by the OS and the PHY's interrupt line is enabled and shared with other interrupts, the system will get an interrupt storm. This patch disables the interrupt for PHY devices that use one of the current Realtek Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L) have the interrupt masked. In this case, the functionality of the PHY should not be afected since this patch brings INER and INSR registers to their default values. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-04-20-271/+147
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| * powerpc/mpc8641hpcn: Move environment to avoid conflictScott Wood2015-04-20-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot on this board grew a long time ago past the 384 KiB that it reserves for the U-Boot image, before the environment. Thus, saveenv overwrites the U-Boot image and bricks the board. I tried to find out when U-Boot grew beyond this point, but there is a long stretch in the history where this board did not build -- and AFAICT when it did fit in 384 KiB, it was missing vital features such as fdt support. Turning off CONFIG_VIDEO was not enough to make it fit. Thus, I don't think we have any choice other than to move the environment. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t2080rdb: enable CONFIG_PHY_AQUANTIAShengzhou Liu2015-04-20-1/+1
| | | | | | | | | | | | | | CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Remove some dead codeScott Wood2015-04-20-138/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Don't relocate exception vectorsScott Wood2015-04-20-125/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booke does not require exception vectors to be located at address zero. U-Boot was doing so anyway, simply because that's how it had been done on other PPC. The downside of this is that once the OS is loaded to address zero, the exception vectors have been overwritten -- which makes it difficult to diagnose a crash that happens after that point. The IVOR setup and trap entry code is simplified somewhat as a result. Also, there is no longer a need to align individual exceptions on 0x100 byte boundaries. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080rdb: update ddr to support 1866MT/sShengzhou Liu2015-04-20-2/+7
| | | | | | | | | | | | | | | | Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR configChunhe Lan2015-04-20-0/+1
| | | | | | | | | | | | | | | | | | Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t208xrdb: VID supportYing Zhang2015-04-20-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080: enable erratum_a007186 for t2080 rev1.1Shengzhou Liu2015-04-20-1/+1
| | | | | | | | | | | | | | T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * qemu-ppce500: Add support for 64bit CCSR mapAlexander Graf2015-04-20-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QEMU 2.3 changes the address layout of the CCSR map in the PV ppce500 machine to reside in higher address space. Unfortunately, this exposed a glitch in u-boot for ppce500: While providing a function to dynamically evaluate the CCSR region's position in physical address space, we never used it. Plus we forgot to support 64bit physical addresses. This patch fixes that mishap, making u-boot work fine with latest QEMU again. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT registerCurt Brune2015-04-20-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the MPC8555/MPC8541 reference manual the SS_EN (source synchronous enable) bit in the DDR_SDRAM_CLK_CNLT register must be set during initialization. >From section 9.4.1.8 of that manual: Source synchronous enable. This bit field must be set during initialization. See Section 9.6.1, "DDR SDRAM Initialization Sequence," details. 0 - Reserved 1 - The address and command are sent to the DDR SDRAMs source synchronously. In addition, Freescale application note AN2805 is also very clear that this bit must be set. This patch reverts a change introduced by commit 457caecdbca3df21a93abff19eab12dbc61b7897. Testing Done: Compiled targets CONFIG_TARGET_MPC8555CDS and CONFIG_TARGET_MPC8541CDS and inspected the generated assembly code to verify the SS_EN bit was being set. There is one extra instruction emitted: fff9b774: 65 29 80 00 oris r9,r9,32768 Compiled the CONFIG_TARGET_MPC8548CDS target and verified that no additional instructions were emitted related to this patch. Booted an image on a MPC8541 based board successfully. Signed-off-by: Curt Brune <curt@cumulusnetworks.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2015-04-20-114/+618
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| * | video, lg4573: add support for the lg4573 displayHeiko Schocher2015-04-20-0/+236
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * | video, ipu: make ldb clock frequency overwritable through board codeHeiko Schocher2015-04-20-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the ldb clock can be setup in board code (for example set through PLL5). Update the ldb_clock rate also through board code. This should be removed, if a clock framework is availiable. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | video, ipu: make ldb_clock configurableHeiko Schocher2015-04-20-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | make the ldb_clock configurable through the new define CONFIG_SYS_LDB_CLOCK. This is needed as the ldb clock is not always 650000000, for example on the aristainetos2 board, where the ldb clock derives from PLL5 clock. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | common/lcd_console: introduce display/framebuffer rotationHannes Petermaier2015-04-18-86/+354
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, for example if the display is mounted in portrait mode or even if it is mounted landscape but rotated by 180 degrees, we need to rotate our content of the display respectively the framebuffer, so that user can read the messages which are printed out. For this we introduce the feature called "CONFIG_LCD_ROTATION", this may be defined in the board-configuration if needed. After this the lcd_console will be initialized with a given rotation from "vl_rot" out of "vidinfo_t" which is provided by the board specific code. If CONFIG_LCD_ROTATION is not defined, the console will be initialized with 0 degrees rotation. Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> [agust: fixed 'struct vidinfo' has no member named 'vl_rot' errors] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | common/lcd_console: move single static variables into common (static) structureHannes Petermaier2015-04-18-38/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For coming implementation of lcd_console rotation, we will need some more variables for holding information about framebuffer size, rotation, ... For better readability we catch all them into a common structure. Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | common/lcd_console: ask only one-time for bg/fg-color per callHannes Petermaier2015-04-18-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Don't call the lcd_getfgcolor and lcd_getbgcolor within the "draw-loop", this only wastes time. Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | common/lcd_console: cleanup lcd_drawchars/lcd_putc_xyHannes Petermaier2015-04-18-16/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the capability of drawing some *str with count from lcd_drawchars is unnary. It is always called from lcd_putc_xy with one character of and count = 1. So we simply rename lcd_drawchars into lcd_putc_xy and remove the loops inside. Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | sandbox: add config_distro_defaults and config_distro_bootcmdSjoerd Simons2015-04-19-8/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the sandbox setup more generic/examplary by including config_distro_defaults.h and config_distro_bootcmd.h. Among other things this makes it easy to test whether images will boot though with the standard distro bootcmds by running e.g: u-boot -c 'host bind 0 myimage.img ; boot' By default there are 2 target host devices to emulate device with multiple storage devices (e.g. internal ("host 0") and external ("host 1") and verify that the prioritization and fallbacks do work correctly. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | config: Add default client arch defines for intel architecturesSjoerd Simons2015-04-19-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define default PXE client architecture identifiers for IA32 (0x0 aka Intel x86PC) and Intel x86-64 (0x9 aka EFI x86-64). This prepares for usage for config_distro_defaults in the sandbox architecture Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
* | | pxe: Ensure all memory access is to mapped memorySjoerd Simons2015-04-19-30/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Properly map memory through map_sysmem so that pxe can be used from the sandbox. Tested in sandbox as well as on jetson-tk1, odroid-xu3, snow as peach-pi boards Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | config_distro_bootcmd.h: Add shared block definition for the host interfaceSjoerd Simons2015-04-19-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Define the common shared block environment for the host interface in preperation for the sandbox build to use config_distro_bootcmd. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | sandbox: Implement host dev [device]Sjoerd Simons2015-04-19-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A common pattern to check if a certain device exists (e.g. in config_distro_bootcmd) is to use: <interface> dev [device] Implement host dev [device] so this pattern can be used for sandbox host devices. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Renamed sb command to hostSjoerd Simons2015-04-19-23/+28
| | | | | | | | | | | | | | | | | | | | | | | | As suggested by Simon Glass, rename the sb command to host but keep the old sb command as an alias Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Add support for bootzSjoerd Simons2015-04-19-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add dummy bootz_setup implementation allowing the u-boot sandbox to run bootz. This recognizes both ARM and x86 zImages to validate a valid zImage was loaded. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Split bootm code out into lib/bootmSjoerd Simons2015-04-19-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | Follow the convention of other architectures and move the platform specific linux bootm code into sandbox/lib/bootm.c. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-12-23 15:35:32 +0000