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* pinctrl: imx: Support i.MX7DPeng Fan2016-02-21-0/+56
| | | | | | | | | | | Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* pinctrl: imx: Introduce pinctrl driver for i.MX6Peng Fan2016-02-21-0/+352
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7Ulises Cardenas2016-02-21-23/+59
| | | | | | | | | | | | Refactored data structure for CAAM's job ring and Secure Memory to support i.MX7. The new memory map use macros to resolve SM's offset by version. This will solve the versioning issue caused by the new version of secure memory of i.MX7 Signed-off-by: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* mx7dsabresd: Make 'ums' command functionalFabio Estevam2016-02-21-23/+18
| | | | | | | | | | | | | | When running the 'ums' command we get: => ums 0 mmc 0 UMS: disk start sector: 0x0, count: 0xe18000 g_dnl_register: failed!, error: -22 ERROR: g_dnl_register failed at common/cmd_usb_mass_storage.c:107/do_usb_mass_storage() Fix this by initializing USB OTG1 port as USB device mode instead of host. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* mx7dsabresd: Use Adrian's NXP email addressFabio Estevam2016-02-21-1/+1
| | | | | | Use the new NXP email address for the board maintainer. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* mx6ul_14x14_evk: Select CONFIG_FSL_QSPIFabio Estevam2016-02-21-0/+1
| | | | | | | | | | Select CONFIG_FSL_QSPI so that the SPI can be probed: => sf probe SF: Detected N25Q256 with page size 256 Bytes, erase size 64 KiB, total 32 MiB Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mxsboot: remove unused includeAndreas Bießmann2016-02-21-1/+0
| | | | | | | | | | Commit 276d3ebb883024d753cd9c69ab2fd243ffa1262e removed htole32() but missed to remove the corresponding header. This is annoying, since BSD systems do not have endian.h. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Michael Heimpold <mhei@heimpold.de>
* imx: mx6: implement board_mmc_get_env_devPeng Fan2016-02-04-0/+20
| | | | | | | | | | | | Implement board_mmc_get_env_dev for the boards. Following is examples: SD1/SD2/SD3: return devno; SD2/SD3: return devno - 1; SD2/SD4: if (devno == 2), return dev - 2; return dev - 1; Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: implement mmc_get_env_devPeng Fan2016-02-04-0/+32
| | | | | | | | | | Implement mmc_get_env_dev, devno can be got from smbr1 of SRC. Introduce a weak function board_mmc_get_env_dev, different boards can implement it according to different sdhc controllers that used by the board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7dsabresd: move mmc_get_env_devno to soc codePeng Fan2016-02-04-15/+26
| | | | | | | | | | | Move mmc_get_env_devno to soc.c and rename to mmc_get_env_dev to match the one in common/env_mmc.c. Introduce a weak function board_mmc_get_env_dev. Different boards can implement this according to sdhc controller which is used by the board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* dm: vybrid_gpio: Drop legacy codeBhuvanchandra DV2016-02-02-18/+0
| | | | | | | | All boards using this driver are with device tree support, hence drop the legacy code in driver to have a pure DT solution. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: lpuart: Drop the legacy codeBhuvanchandra DV2016-02-02-99/+2
| | | | | | | | All boards using this driver are with device tree support, hence drop the legacy code in driver to have a pure DT solution. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: vybrid: Drop enabling GPIO, SPI and UART in legacy modeBhuvanchandra DV2016-02-02-19/+0
| | | | | | | | | Remove the legacy way of enabling GPIO, SPI and UART on Vybrid based boards since these driver's now only supports DT mode. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: vybrid: Update defconfig'sBhuvanchandra DV2016-02-02-14/+29
| | | | | | | | | | | | | | | | Let's go with pure DT solution for board's based on NXP/Freescale Vybrid platform. - Merge the DT defconfig with non-DT defconfig for Toradex Colibri VF50/VF61 and drop the non-DT defconfig. - Update the legacy defconfigs for NXP/Freescale VF610 Tower Board with DT. - Update the legacy defconfigs for Phytec phyCORE-vybrid Board with DT. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: pcm052: Add device tree file'sBhuvanchandra DV2016-02-02-1/+24
| | | | | | | | | - Add device tree files for Phytec phyCORE-Vybrid Board. - Enable lpuart support for Phytec phyCORE-Vybrid Board. - Use UART1 for stdout. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: vf610-twr: Add device tree file'sBhuvanchandra DV2016-02-02-1/+24
| | | | | | | | | - Add device tree files for NXP/Freescale VF610 Tower Board. - Enable lpuart support on NXP/Freescale VF610 Tower Board. - Use UART1 as stdout. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: colibri-vf: Enable serial supportBhuvanchandra DV2016-02-02-0/+10
| | | | | | | | - Enable lpuart support on Toradex Colibri VF50/VF61 - Use UART0 for stdout. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: vybrid: Update the license stringBhuvanchandra DV2016-02-02-20/+0
| | | | | | | | Since SPDX license is already there, drop the full one. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: vybrid: Enable lpuart supportBhuvanchandra DV2016-02-02-0/+43
| | | | | | | | Add device tree node's for lpuart on Vybrid platform Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* imx: mx6sxsabresd: Add MCIMX28LCD display supportYe Li2016-02-02-0/+81
| | | | | | | | The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1 port, enable this display feature by adding relevant BSP codes and configurations. Signed-off-by: Ye Li <ye.li@nxp.com>
* imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculationYe Li2016-02-02-4/+0
| | | | | | | | | | The checking with max frequency supported is not correct, because the temp is calculated by max pre and post dividers. We can decrease any divider to meet the max frequency limitation. Actually, the calculation below the codes is doing this way to find best pre and post dividers. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx6sx: Fix issue in LCDIF clock enablementYe Li2016-02-02-2/+2
| | | | | | | | Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always enter the -EINVAL return. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* mx6slevk: Remove CONFIG_ETHPRIME optionFabio Estevam2016-02-02-1/+0
| | | | | | | As mx6slevk has only one Ethernet port, we don't need to declare CONFIG_ETHPRIME, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* imx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failureYe Li2016-02-02-1/+1
| | | | | | | | | | | The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD card. Fixed the value to correct one. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
* tqma6_wru4: Fix the reset delay for the the LAN8720 PHYFabio Estevam2016-02-02-1/+1
| | | | | | | | | According to the LAN8720 datasheet tpurstd (time that reset line should stay asserted) is 25ms. So do as suggested by the LAN8720 datasheet. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* mx6slevk: Fix the reset delay for the the LAN8720 PHYFabio Estevam2016-02-02-1/+1
| | | | | | | | | | | | | | | Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. According to the LAN8720 datasheet tpurstd (time that reset line should stay asserted) is 25ms. So do as suggested in order to have Ethernet working again. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO boardYe Li2016-02-02-0/+897
| | | | | | | Initial version for mx6sx SABREAUTO board support with features: PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander. Signed-off-by: Ye Li <ye.li@nxp.com>
* mx6: soc: Add ENET2 mac address supportYe Li2016-02-02-30/+30
| | | | | | | The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li@nxp.com>
* tools: mxsboot: Use more portable cpu_to_le32()Bin Meng2016-02-02-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when building mxsboot on certain machines it reports: HOSTCC tools/mxsboot tools/mxsboot.c: In function 'mx28_create_sd_image': tools/mxsboot.c:560: warning: implicit declaration of function 'htole32' /tmp/cchLIV6q.o: In function 'main': mxsboot.c:(.text+0x6d8): undefined reference to 'htole32' mxsboot.c:(.text+0x6e7): undefined reference to 'htole32' mxsboot.c:(.text+0x6f6): undefined reference to 'htole32' mxsboot.c:(.text+0x705): undefined reference to 'htole32' mxsboot.c:(.text+0x711): undefined reference to 'htole32' /tmp/cchLIV6q.o:mxsboot.c:(.text+0x71d): more undefined references to 'htole32' follow collect2: ld returned 1 exit status make[1]: *** [tools/mxsboot] Error 1 make: *** [tools] Error 2 The solution is to use cpu_to_le32() instead which is more portable, just like other U-Boot tools [1] do. [1] http://lists.denx.de/pipermail/u-boot/2014-October/192919.html Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* wandboard: fix variable name so PXE boot worksPeter Robinson2016-02-02-1/+1
| | | | | | | | | All boards that support PXE booting use the pxefile_addr_r variable. Standardise wandboard with this variable as pxe_addr_r isn't used anywhere else so it's a typo. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
* arm: imx6: Enable DDR calibration on NovenaMarek Vasut2016-02-02-9/+14
| | | | | | | | Enable the DDR calibration functionality on Novena to deal with the memory SoDIMM on this board. Moreover, tweak the initial DDR DRAM parameters so the calibration works properly. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: imx6: Add DDR3 calibration code for MX6 Q/D/DLMarek Vasut2016-02-02-0/+564
| | | | | | | | | Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* Prepare v2016.03-rc1Tom Rini2016-02-02-2/+2
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-02-02-82/+465
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| * board: atmel: sama5d2_xplained: add SPL supportWenyou Yang2016-02-02-0/+178
| | | | | | | | | | | | | | | | The sama5d2 Xplained SPL supports the boot medias: spi flash and SD Card. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: at91/spl: mpddrc: use IP version to check configurationWenyou Yang2016-02-02-7/+11
| | | | | | | | | | | | | | | | To remove the unnecessary #ifdef-endif, use the mpddrc IP version to check whether or not the interleaved decoding type is supported. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initializationWenyou Yang2016-02-02-8/+167
| | | | | | | | | | | | | | | | | | | | | | | | The DDR3-SDRAM initialization sequence is implemented in accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section described in the SAMA5D2 datasheet. Add registers and definitions of mpddrc controller, which is used to support DDR3 devices. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: at91/spl: mpddrc: add struct atmel_mpddrc_configWenyou Yang2016-02-02-20/+30
| | | | | | | | | | | | | | | | | | | | Add struct atmel_mpddrc_config to accommodate the mpddrc register configurations, not using the mpddrc register map structure, struct atmel_mpddrc, in order to increase readability and reduce run-time memory use. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand: Add 32 bit ecc support for sama5d2 chipJosh Wu2016-02-02-1/+9
| | | | | | | | | | | | | | | | | | | | Also if minimum ecc requirment is bigger then what we support, then just use our maxium pmecc support. But it is not safe, so we'll output a warning about this. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand_ecc: update pmecc registers according to sama5d2 chipJosh Wu2016-02-02-4/+32
| | | | | | | | | | | | | | | | | | | | 1. add the pmecc register mapping for sama5d2. 2. add the pmecc error location register mapping for sama5d2. 3. add some new field that is different from old ip. 4. add sama5d2 pmecc ip version number. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand: use the definition: PMECC_OOB_RESERVED_BYTES instead magic numberJosh Wu2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | As atmel_nand_ecc.h is sync with v4.1 kernel, which adds the PMECC_OOB_RESERVED_BYTES. So use it in the driver. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * atmel_nand: add '\n' in the end of error message for better displayJosh Wu2016-01-27-2/+2
| | | | | | | | | | | | | | | | Also align the open parenthesis. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand: use nand ecc_{strength, step}_ds instead of our own functionJosh Wu2016-01-27-37/+7
| | | | | | | | | | | | | | | | | | | | Since ecc_{strength,step}_ds is introduced in nand_chip structure for minimum ecc requirements. So we can use them directly and remove our own get_onfi_ecc_param function. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * net: macb: Not all the GEM are gigabit capableGregory CLEMENT2016-01-27-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the initialization of PHY the gigabit bit capable is set if the controller is a GEM. However, for sama5d2 and sama5d4, the GEM is configured to support only 10/100. Improperly setting the GBE capability leads to an unresponsive MAC controller. This patch fixes this behavior allowing using the gmac with these SoCs. Suggested-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * mmc: atmel: Properly fix clock configurationGregory CLEMENT2016-01-27-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timing issue occurs on eMMC not only when modifying the frequency but also for all the switch command(CMD6). According to the MMC spec waiting 8 clocks after a switch command would be the thing to do. This patch allows fixing CPU hang observed when trying to changing the bus width on a eMMC on SAMA5D4. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV Acked-by: Marek Vasut <marex@denx.de> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100 Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-02-02-5/+76
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| * | arm8: ls2080: Move the core errata defines out of board specific fileAshish kumar2016-02-01-3/+2
| | | | | | | | | | | | | | | | | | | | | Valid for core A57 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: Implement workaround for core errata 829520, 833471Ashish kumar2016-02-01-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 829520: Code bounded by indirect conditional branch might corrupt instruction stream. Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect Predictor. 833471: VMSR FPSCR functional failure or deadlock. Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8/ls1043aqds: fix DSPI/QSPI node in dts fileQianyu Gong2016-02-01-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the lost dts info when merging patches. Fix DSPI node for 'commit e0579a5852b3 ("armv8/ls1043aqds: add DSPI support")' and QSPI node for 'commit 166ef1e90ce4 ("armv8/ls1043aqds: add QSPI support in SD boot")'. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: Update print to reflect correct stringPrabhakar Kushwaha2016-02-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Update printf with dpbp_exit to match with previous function call. Signed-off-by: Itai Katz <itai.katz@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-11-09 14:10:45 +0000