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* i386: Moved PCI from #ifdef to conditional compile for sc520 boardsGraeme Russ2009-10-03-564/+617
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* i386: Replace [read, write]_mmcr_[byte, word, long] with memory mapped structureGraeme Russ2009-10-03-545/+550
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Misc sc520 cdp fixupsGraeme Russ2009-10-03-22/+0
| | | | | | | Now that the PCI, SATA et al compile problems have been resolved, the cludge that was applied to avoid them can be removed Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Fixup sc520_spunk boardGraeme Russ2009-10-03-2/+33
| | | | | | | | Primary intent is to resolve build errors for this board which has been neglected for a very long time. I do not have one of these boards, so I cannot test functionality Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Misc ds1722 fixupsGraeme Russ2009-10-03-1/+34
| | | | | | | | This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD on 18th May 2008 as part of a general i386 / sc520 fixup which was never applied Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Misc ti_pci1410a fixupsGraeme Russ2009-10-03-44/+18
| | | | | | | | | | | | | | | | | | Removed do_pinit() - now declared in cmd_pcmcia.c Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other PCMCIA drivers signed/unsigned type fixups Added semi-colon after default: label as required by newer gcc The only board that appears to use this driver is the sc520_spunk which is very old and very likely very broken anyway. I do not have one to test whether this patch breaks anything functionaly, I have can only check that it compiles without warning or error Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Misc SATA fixupsGraeme Russ2009-10-03-19/+6
| | | | | | | | | | | | | | | | | Cast first parameter to sata_cpy() In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(), ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in include/libata.h which is included in ata.h which is included by all files which include ata_piix.h (only ata_piix.c) so these definitions are supurflous to (and conlict with) this in libata.h. Interestingly, my compiler complains about ata_id_u64 already being defined, but not ata_id_u32 ata_dump_id() is defined in include/libata.h and should not be static (maybe should even use ata_dump_id() in libata.c Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* i386: Misc PCI fixupsGraeme Russ2009-10-03-11/+14
| | | | | | | | | | | | | | | | | | | | Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in commit ff4e66e93c1a, regressed by commit 6d7f610b09f8) Cast PCI_ROM_ADDRESS_MASK to u32 Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO Change call to pci_find_class() to pci_find_devices(). This is based on a patch submitted on 1st March 2007 (Patch that fixes the compilation errors for sc520_cdp board) by mushtaq_k This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be specified in the board config file. Dummy values have been added for the SC520 CDP board to enable compilation, but since I do not have one of these, I do know what the values should be Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Fix sc520 timer interrupt generationGraeme Russ2009-10-03-3/+3
| | | | | | | | The current implementation has the timer being started before the interrupt handler is installed. It the interrupt occurs before the handler is installed, the timer interrupt is never reset and the timer stops Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Fix environment configuration for eNET boardGraeme Russ2009-10-03-6/+5
| | | | | | | | The current configuration of the Environment has the redundant copy of the environment in the Boot Flash - This was never the intent. The Environment should instead be in the first two sectors of the first Strata Flash Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* i386: Fix regression introduced by commit 8c63d47651f7Graeme Russ2009-10-03-0/+5
| | | | | | A local variable was deleted that should not have been Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* i386: Change inline asm global symbols to localGraeme Russ2009-10-03-4/+4
| | | | | | | | gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why) Remove use of global names for labels to prevent 'symbol already defined' errors Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* i386: Add errno.hGraeme Russ2009-10-03-0/+1
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Consolidate arch-specific mem_malloc_init() implementationsPeter Tyser2009-10-03-139/+32
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Standardize mem_malloc_init() implementationPeter Tyser2009-10-03-88/+79
| | | | | | | | | | This lays the groundwork to allow architectures to share a common mem_malloc_init(). Note that the x86 implementation was not modified as it did not fit the mold of all other architectures. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Consolidate arch-specific sbrk() implementationsPeter Tyser2009-10-03-230/+28
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* atmel_df_pow2: standalone to convert dataflashes to pow2Mike Frysinger2009-10-03-0/+214
| | | | | | | | | | | | Atmel DataFlashes by default operate with pages that are slightly bigger than normal binary sizes (i.e. many are 1056 byte pages rather than 1024 bytes). However, they also have a "power of 2" mode where the pages show up with the normal binary size. The latter mode is required in order to boot with a Blackfin processor, so many people wish to convert their DataFlashes on their development systems to this mode. This standalone application does just that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf548: fix device->stdio_dev falloutMike Frysinger2009-10-03-3/+3
| | | | | | | The recent 52cb4d4fb348 commit which renamed device to stdio_dev missed the cm-bf548's video board. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: enable 64bit printf for nandMike Frysinger2009-10-03-0/+3
| | | | | | | | Since the NAND code now uses 64bit code, make sure we enable support for ADI Blackfin boards in printf to avoid the warning: nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output! Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: use scratch pad for exception stackMike Frysinger2009-10-03-0/+9
| | | | | | | | | If the memory layout pushes the stack out of the default DCPLB coverage, the exception handler may trigger a double fault by trying to push onto the uncovered stack. So handle the exception stack similar to the kernel by using the top of the scratch pad SRAM. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: increase default console sizeMike Frysinger2009-10-03-5/+1
| | | | | | | The default console size indirectly applies to length of env vars, so a smaller length makes it hard to pass longer command lines to kernels. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix debug printf modifiersMike Frysinger2009-10-03-18/+18
| | | | | | | The display_global_data() function generated warnings with pretty much every variable. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf537u: new board portHarald Krapfenbauer2009-10-03-1/+411
| | | | | | | | The CM-BF537U is similar to the CM-BF537E module, but enough to need its own board port. Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: change global data register from P5 to P3Robin Getz2009-10-03-7/+7
| | | | | | | | | | | Since the Blackfin ABI favors higher scratch registers by default, use the last scratch register (P3) for global data rather than the first (P5). This allows the compiler's register allocator to use higher number scratch P registers, which in turn better matches the Blackfin instruction set, which reduces the size of U-Boot by more than 1024 bytes... Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: enable more network commands for ADI dev boardsRobin Getz2009-10-03-0/+10
| | | | | | | | Add dns and ntp to default networking commands, and ask for more dhcp options to better configure the network environment. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: comment CF-Flash Card Support betterMichael Hennerich2009-10-03-5/+24
| | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: use +(filesize) to make sure we are only doing what is necessaryRobin Getz2009-10-03-2/+2
| | | | | Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* TI DaVinci: DM646x: Initial Support for DM646x SOCSandeep Paulraj2009-09-15-0/+53
| | | | | | | | | DM646x is an SOC from TI which has both an ARM and a DSP. There are multiple variants of the SOC mainly dealing with different core speeds. This patch adds the initial framework for the DM646x SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* TI DaVinci: DM6446: Fix Compilation error in NAND modeSandeep Paulraj2009-09-15-0/+1
| | | | | | | | | | | | The Default mode that is built for the Davinci DVEVM happens to be the NOR mode. When we want to build for the NAND mode, we get a compilation error. This is overcome by defining the CONFIG_MTD_DEVICE flag in the NAND mode. The image built for NAND mode was successfully tested on the DaVinci DM6446 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3 Move cache routine to cache.STom Rix2009-09-15-184/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v7_flush_dcache_all, because it depends on omap ROM code is not generic. Rename the function to 'invalidate_dcache' and move it to the omap cpu directory. Collect the other omap cache routines l2_cache_enable and l2_cache_disable with invalide_dcache into cache.S. This means removing the old cache.c file that contained l2_cache_enable and l2_cache_disable. The conversion from cache.c to cache.S was done most through disassembling the uboot binary. The only significant change was to change the comparision for the return of get_cpu_rev from cmp r0, #0 beq earlier_than_label Which was lost information to cmp r0, #CPU_3XX_ES20 blt earlier_than_label The paths through the enable routine were verified by adding an infinite loop and seeing the hang. Then removing the infinite loop and seeing it continue. The disable routine is similar enough that it was not tested with this method. Run tested by cold booting from nand on beagle and zoom1. Compile tested on MAKEALL arm. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* TI DaVinci: Remove references to SZ_xxSandeep Paulraj2009-09-15-19/+13
| | | | | | | | | | This patch removes the asm/sizes.h header file from being included in the DaVinci SOC configs. References to SZ_xx have been replaced by appropriate bit shifted values. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Wolfgang Denk <wd@denx.de>
* ARM: DaVinci: Adding Support for DaVinci DM365 EVMSandeep Paulraj2009-09-05-0/+308
| | | | | | | This patch adds support for the DM365 EVM. It has been tested on a DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: DaVinci: DaVinci DM365 SOC specific codeSandeep Paulraj2009-09-05-0/+36
| | | | | | This patch adds support for DaVinci DM365 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DM9000 init for pm9261Ilko Iliev2009-09-05-0/+7
| | | | Signed-off-by: Ilko Iliev <iliev@ronetix.at>
* Add support for the DevKit8000 boardFrederik Kriewitz2009-09-05-0/+921
| | | | | | This patch adds support for the DevKit8000 board. Signed-off-by: Frederik Kriewitz <frederik@kriewitz.eu>
* omap3: move the other boards to board/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-2/+2
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: move Logicpd's boards to board/logicpd/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* omap: move TI's boards to board/ti/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-7/+7
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Support for the Calao TNY-A9260/TNY-A9G20 boardsAlbin Tonnerre2009-09-01-1/+403
| | | | | | | | | | | | The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by Calao Systems <http://www.calao-systems.com>. Their components are very similar to the AT91SAM9260EK board, so their configuration is based on the configuration of this board. There are however some differences: different clocks, no LCD, no ethernet. They also can use SPI EEPROM to store the environment. Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: Kirkwood: add SYSRSTn Duration Counter SupportPrafulla Wadaskar2009-09-01-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This feature can be used to trigger special command "sysrstcmd" using reset key long press event and environment variable "sysrstdelay" is set (useful for reset to factory or manufacturing mode execution) Kirkwood SoC implements a hardware-based SYSRSTn duration counter. When SYSRSTn is asserted low, a SYSRSTn duration counter is running. The counter value is stored in the SYSRSTn Length Counter Register The counter is based on the 25-MHz reference clock (40ns) It is a 29-bit counter, yielding a maximum counting duration of 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value, it remains at this value until counter reset is triggered by setting bit 31 of KW_REG_SYSRST_CNT Implementation: Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be executed if pre-defined in environment variables. This feature will be disabled if "sysrstdelay" variable is unset. for-ex. setenv sysrst_cmd "echo starting factory reset; nand erase 0xa0000 0x20000; echo finish ed sysrst command;" will erase particular nand sector if triggered by this event Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Add support for the Calao SBC35-A9G20 boardAlbin Tonnerre2009-09-01-1/+517
| | | | | | | | | | | The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems <http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND flash, two USB host ports, and an USB device port. More informations can be found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
* imx27lite: add support for imx27lite board from LogicPDIlya Yanok2009-09-01-0/+629
| | | | | | | | | This patch adds support for i.MX27-LITEKIT development board from LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND flash, FEC ethernet controller integrated into i.MX27. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Wolfgang Denk <wd@denx.de>
* at91sam9260/afeb9260: Fix SPI initializationAlbin Tonnerre2009-09-01-2/+2
| | | | | | | Commit 7ebafb7ec1a0285af8380623c009576f92583b98 introduced a mistake in the spi init function call for those boards. This patch fixes this. Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
* Remove duplicate set_crSimon Kagstrom2009-09-01-30/+0
| | | | | | | | | | Remove duplicate set_cr set_cr is defined in both asm-arm/proc-armv/system.h and include/asm-arm/system.h. This patch removes it (and some duplicate defines) from the former. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
* Merge branch 'next' of ../nextWolfgang Denk2009-08-31-4436/+5680
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| * fsl: simplify the "mac id" command, improve boot-time informational messageTimur Tabi2009-08-28-32/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "mac id" command took a 4-character parameter as the identifier string. However, for any given board, only one kind of identifier is acceptable, so it makes no sense to ask the user to type it in. Instead, if the user enters "mac id", the identifier (and also the version, if it's NXID) will automatically be set to the correct value. Improve the message that is displayed when EEPROM is read during boot. It now displays "EEPROM:" and then either an error message or the EEPROM identifier if successful. If the identifier in EEPROM is valid, then always reject a bad CRC, even if the CRC field has not been initialized. Don't force the MAC address count to MAX_NUM_PORTS or less. Forcing the value to be changed resulting in an in-memory copy that does not match what's in hardware, even though the user did not request that change. Finally, always update the CRC value in the in-memory copy after any field is changed, so that the CRC is always correct. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Added PCIe support for P1 P2 RDBPoonam Aggrwal2009-08-28-1/+125
| | | | | | | | | | | | | | Call fsl_pci_init_port() to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controllerPoonam Aggrwal2009-08-28-0/+70
| | | | | | | | | | | | | | | | | | fsl_pci_init_port can be called from board specific PCI initialization routines to setup the PCI (or PCIe) controller. This will reduce code redundancy in most of the 85xx/86xx FSL board ports that setup PCI. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Improve MPIC initializationTimur Tabi2009-08-28-5/+7
| | | | | | | | | | | | | | | | | | The MPIC initialization code for Freescale e500 CPUs was not using I/O accessors, and it was not issuing a read-back to the MPIC after setting mixed mode. This may be the cause of a spurious interrupt on some systems. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Added support for P1011RDB and P2010RDBPoonam Aggrwal2009-08-28-0/+12
| | | | | | | | | | | | | | | | P1011 and P2010 are single core variants of P1010 and P2020 respectively. The board(RDB) will be same. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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