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| * | fdt_support: add entry for sec3.1 and fix sec3.3Kim Phillips2010-05-30-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sec3.1 h/w geometry for fdt node fixups. Also, technically, whilst SEC v3.3 h/w honours the tls_ssl_stream descriptor type, it lacks the ARC4 algorithm execution unit required to be able to execute anything meaningful with it. Change the node to agree with the documentation that declares that the sec3.3 really doesn't have such a descriptor type. Reported-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structureTimur Tabi2010-05-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ngPIXIS is a board-specific FPGA, but the definition of the registers is mostly consistent. On boards where it matter, register 9 is called 'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t definition. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl/85xx: add clkdvdr and pmuxcr2 to global utilities structure definitionTimur Tabi2010-05-30-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add the 'clkdvdr' and 'pmuxcr2' registers to the 85xx definition of struct ccsr_gur. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-05-30-8/+1165
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| * ARM Update mach-typesTom2010-05-28-6/+500
| | | | | | | | | | | | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 3defb2476166445982a90c12d33f8947e75476c4 Signed-off-by: Tom <Tom@bumblecow.com>
| * ARM Update mach-typesTom2010-05-28-2/+665
| | | | | | | | | | | | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 257dab81413b31b8648becfe11586b3a41e5c29a Signed-off-by: Tom <Tom@bumblecow.com>
* | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-05-28-12340/+1189
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| * | nios: remove nios-32 archThomas Chou2010-05-28-12143/+4
| | | | | | | | | | | | | | | | | | The nios-32 arch is obsolete and broken. So it is removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * | nios2: allow STANDALONE_LOAD_ADDR overridingThomas Chou2010-05-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows users to override default STANDALONE_LOAD_ADDR. The gcclibdir path was duplicated in the standalone Makefile and can be removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: fix div64 issue for gcc4Thomas Chou2010-05-28-175/+856
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the run-time error on div64 when built with gcc4, which was reported by jhwu0625 on nios forum. It merges math support from libgcc of gcc4. This patch is copied from nios2-linux. It works with both gcc3 and gcc4. The old mult.c, divmod.c and math.h are removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: fix r15 issue for gcc4Thomas Chou2010-05-28-18/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "-ffixed-r15" option doesn't work well for gcc4. Since we don't use gp for small data with option "-G0", we can use gp as global data pointer. This allows compiler to use r15. It is necessary for gcc4 to work properly. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | spi: add altera spi controller supportThomas Chou2010-05-28-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the driver of altera spi controller, which is used as epcs/spi flash controller. It also works with mmc_spi driver. This driver support more than one spi bus, with base list declared #define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... } Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: add gpio support to nios2-generic boardThomas Chou2010-05-28-3/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds gpio support of Altera PIO component to the nios2-generic board. Though it drives only gpio_led at the moment, it supports bidirectional port to control bit-banging I2C, NAND flash busy status or button switches, etc. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | misc: add gpio based status led driverThomas Chou2010-05-28-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a status led driver followed the GPIO access conventions of Linux. The led mask is used to specify the gpio pin. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: add gpio supportThomas Chou2010-05-28-0/+52
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver for a trivial gpio core, which is described in http://nioswiki.com/GPIO. It is used for gpio led and nand flash interface in u-boot. When CONFIG_SYS_GPIO_BASE is not defined, board may provide its own driver. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-coldfireWolfgang Denk2010-05-28-2/+30
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| * | add CONFIG_SYS_FEC_FULL_MII for MCF5445xWolfgang Wegner2010-05-28-2/+11
| | | | | | | | | | | | | | | | | | | | | This patch adds support for full MII interface on MCF5445x (in contrast to RMII as used on the evaluation boards). Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
| * | add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445xWolfgang Wegner2010-05-28-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the possibility to handle seperate PHYs to MCF5445x. Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the linux kernel. Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
| * | add missing PCS3 for MCF5445xWolfgang Wegner2010-05-28-0/+8
| |/ | | | | | | | | | | | | This patch adds the code for handling PCS3 (DSPI chip select 3) in cpu_init.c and m5445x.h Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2010-05-28-1/+1
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| * | USB: fix create_pipe()Sergei Shtylyov2010-05-27-1/+1
| |/ | | | | | | | | | | | | | | | | create_pipe() can give wrong result if an expression is passed as the 'endpoint' argument -- due to missing parentheses. Thanks to Martin Mueller for finding the bug and providing the patch. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
* | Blackfin: nand: drain the write buffer before returningAndrew Caldwell2010-05-26-1/+6
|/ | | | | | | | | | | | | The current Blackfin nand write function fills up the write buffer but returns before it has had a chance to drain. On faster systems, this isn't a problem as the operation finishes before the ECC registers are read, but on slower systems the ECC may be incomplete when the core tries to read it. So wait for the buffer to drain once we're done writing to it. Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Prepare v2010.06-rc1v2010.06-rc1Wolfgang Denk2010-05-26-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2010-05-26-13/+4057
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-05-26-20/+20
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| * mpc83xx: don't shift pre-shifted ACR, SPCR, SCCR bitfield masks in cpu_init.cKim Phillips2010-05-21-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c7190f028fa950d4d36b6d0b4bb3fc72602ec54c "mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields" incorrectly shifted <register>_<bitfield> (e.g. ACR_PIPE_DEP) values that were preshifted by their definition in mpc83xx.h. this patch removes the unnecessary shifting for the newly utilized mask values in cpu_init.c, and prevents seemingly unrelated symptoms such as an mpc8379erdb board from locking up whilst performing a networking operation, e.g. a tftp. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * Fixed two typos in arch/powerpc/cpu/mpc83xx/start.S.Horst Kronstorfer2010-05-21-2/+2
| | | | | | | | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | config.mk: use different host compiler for OS X 10.6Andreas Biessmann2010-05-26-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about wrong syntax in system includes. In file included from /usr/include/stdio.h:444, from ../source/u-boot/include/compiler.h:26, from ../source/u-boot/lib/crc32.c:15: /usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list This can be fixed by reverting the workaround for prior OS X releases in config.mk conditionally for OS X 10.6+. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | Convert Makefiles from COBJS-${} to COBJS-$()Kumar Gala2010-05-26-17/+17
| | | | | | | | | | | | Match style we use almost everywhere else Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/bootcount: Fix endianness problemMichael Weiss2010-05-26-2/+4
| | | | | | | | | | | | | | For CONFIG_SYS_BOOTCOUNT_SINGLEWORD the code had an endianness problem. Signed-off-by: Michael Weiss <michael.weiss@ifm.com> Signed-off-by: Detlev Zundel <dzu@denx.de>
* | dm9000x.c: fix compile problemsWolfgang Denk2010-05-26-6/+6
| | | | | | | | | | | | | | Use readX() / writeX() accessors instead of inX() / outX(). Suggested-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | a320evb: fix udelay / __udelay confusionWolfgang Denk2010-05-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix the following compiler problems: arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay': /home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay' lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here lib/libgeneric.a(time.o): In function `udelay': time.c:(.text+0x1c): undefined reference to `__udelay' Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ARM: */timer.c: fix spelling and vertical alignmentWolfgang Denk2010-05-21-18/+18
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | bugfix: Guruplug: Use standard miiphyMahavir Jain2010-05-21-8/+1
| | | | | | | | | | | | | | | | | | | | | | call to reset PHY chip. Current PHY Software Reset operation in guruplug does not poll reset bit in control register to go to 0(auto clearing) for making sure reset was successful.This patch uses standard miiphy call miiphy_reset to make sure proper PHY reset operation. Signed-off-by: Mahavir Jain <mjain@marvell.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2010-05-21-3/+8
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| * | UBI: Fix problem in UBI/Linux "compatibility layer"Stefan Roese2010-05-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | "down_write_trylock" needs to return 1 instead of 0 for success. Otherwise copying a block with a read error (e.g. bit-flip on read) won't work correctly. Signed-off-by: Stefan Roese <sr@denx.de>
| * | UBI: Ensure that "background thread" operations are really executedStefan Roese2010-05-19-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current U-Boot UBI implementation is copied from Linux. In this porting the UBI background thread was not handled correctly. Upon write operations ubi_wl_flush() makes sure, that all queued operations, like page-erase, are completed. But this is missing for read operations. This patch now makes sure that such operations (like scrubbing upon bit-flip errors) are not queued, but executed directly. Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-05-21-107/+967
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| * | | MX31: Added support for the Casio COM57H5M10XRC to QONGStefano Babic2010-05-19-17/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds setup to connect a CASIO COM57H5M10XRC (640x480 TFT display) to the QONG module. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | Add SPI support to mx51evk boardStefano Babic2010-05-05-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds SPI devices to the mx51evk board. The MC13892 chip (PMIC) is supported. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | MX: Added definition file for MC13892Stefano Babic2010-05-05-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MC13892 is a Power Controller used with processors of the family MX.51. The file adds definitions to be used to setup the internal registers via SPI. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | SPI: added support for MX51 to mxc_spiStefano Babic2010-05-05-20/+211
| | | | | | | | | | | | | | | | | | | | | | | | This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | MX31: Add support for PMIC to the QONG moduleStefano Babic2010-05-05-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the PMIC (MC13783) controller and enables charging of the RTC battery. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | MX: RTC13783 uses general function to access PMICStefano Babic2010-05-05-67/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC is part of the Freescale's PMIC controller. Use general function to access to PMIC internal registers. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | | MX: Added Freescale Power Management DriverStefano Babic2010-05-05-0/+329
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch add supports for the Freescale's Power Management Controller (known as Atlas) used together with i.MX31/51 processors. It was tested with a MC13783 (MX31) and MC13892 (MX51). Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | i.MX31: Activate NAND support for i.MX31 Litekit board.Magnus Lilja2010-05-05-0/+10
| | | | | | | | | | | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | | MX51: Fix MX51 CPU detect messageFabio Estevam2010-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix MX51 CPU detect message. Original string was: CPU: Freescale i.MX51 family 3.0V at 800 MHz which can be misinterpreted as 3.0 Volts instead of the silicon revision. ,change it to: CPU: Freescale i.MX51 family rev3.0 at 800 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | MX51evk: Removed warningsStefano Babic2010-05-05-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes reflect modifications in the fsl_esdhc driver (the clk_enable field war removed in the configuration structure). Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | tx25: fix crash while booting LinuxAnatolij Gustschin2010-05-05-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently booting Linux on TX25 board doesn't work since there is no correct mach-id and boot parameters setup for tx25 board. Fix it now. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* | | | Fix "par[t]ition" typo.Wolfgang Denk2010-05-21-5/+5
| |_|/ |/| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
generated by cgit v1.1 at 2024-11-09 15:37:22 +0000