| Commit message (Collapse) | Author | Age | Lines |
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As it turns out this is a normal condition, so suppress the error.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We shouldn't assume that the VGA ROM can always be loaded at c0000. This
is only true on x86 machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This code is too x86-dependent at present. Correct it so that it can run on
big-endian machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This stops the debug mode from working properly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Add the option for USB Ethernet gadget based on atmel usb
device.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Add the option for USB Ethernet gadget based on atmel usb
device.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Signed-off-by: Bo Shen <voice.shen@atmel.com>
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The SAMA5D4 has the same usb platform data with SAMA5D3 SoC.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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This config is not valid, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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As sama5d3 xplained support the PMECC. So add the PMECC header for spl
binary. That make ROM loader can use PMECC to avoid error flips in spl
code in nandflash.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
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add SPL support also for the axm board.
Signed-off-by: Heiko Schocher <hs@denx.de>
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- corvus board fix problems with toshiba nand chips
on the corvus board problems with toshiba chips
Manufacturer ID: 0x98 Chip ID: 0xdc encounterd.
Solve this in the following way:
- set other nand timings
- enable CONFIG_SYS_NAND_READY_PIN
- correct the MACH_TYPE setting
Signed-off-by: Heiko Schocher <hs@denx.de>
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if in SPL mode recovery button is pressed, erase also spi flash
from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board.
Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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in thumb mode compiler says for example for arch/arm/lib/cache-cp15.c
when enabling CONFIG_SYS_THUMB_BUILD:
{standard input}: Assembler messages:
{standard input}:373: Error: selected processor does not support Thumb mode `mrc p15,0,r4,c1,c0,0'
{standard input}:416: Error: selected processor does not support Thumb mode `mcr p15,0,r3,c2,c0,0'
so, if caches are disabled, do not use this command on arm926ejs.
used on at91 in SPL, to reduce size of SPL.
Signed-off-by: Heiko Schocher <hs@denx.de>
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This information help with debugging issues with uart.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This change enables to change baudrate on command line.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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updated the zynq config to support the lthor
download protocol.
This lthor functionality helps us to load linux
images on to DDR/MMC and can boot linux using bootm.
In order to load images the user should run lthor
command run "thor_ram" from u-boot prompt and
then send the images from host using lthor utility.
Define g_dnl_bind_fixup for zynq so that correct vendor
and product ids assigned incase of DFU and lthor.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable DFU functionality in zynq.
This DFU functionality helps us to load linux
images on to DDR and can boot linux using bootm.
In order to load images the user should run dfu
command "dfu 0 ram 0" from u-boot prompt and then
send the images from host.
The malloc size has been increased to match the DFU
buffer requirements.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Dont send always emio value as zero for zynq_gem_initialize
send it based on config.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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No functional chagnes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Based on:
"am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env"
(sha1: 73a27a84e58cb99b4e64ed6a35eab5bc61f44f29)
Fix filesystem specific commands for loading.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Show board information in bootlog and enable it by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add missing addresses to the list.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Use full boot mode list in SPL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Set only the 0-3 bits of the FPGA_RST_CTRL register
as other bits should not be set to 1.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Added the lowlevel_init to enable the Neon instructions.
Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.
Also enable neon instructions for non-xilinx toolchain.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Refresh for newer kernel.
Prepare ENV settings for sheevaplugs to be OpenWRT ready.
+----------+
| UBOOT | >> 896 Kb (7x128) = uboot
+----------+
| ENV | >> 128 Kb = uboot_env
+----------+
| ROOT(FS) | >> 511 Mb @ 1 Mb = root -> rootfs (ubifs)
+----------+
With (CC) TRUNK OpenWRT build (QUICK HOWTO) :
<INTERRUPT>
Marvell>> nand erase.part root
Marvell>> ubi part root
Marvell>> ubi remove rootfs
Marvell>> ubi create rootfs
Marvell>> usb reset
Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs
Marvell>> ubi write 0x800000 rootfs ${filesize}
Marvell>> reset
Changes in v1:
- ADD generic board define
- ADD FDT support
- ADD HUSH interpreter
- Define new NAND partition mapping
Signed-off-by: Gerald Kerma <dreagle@doukki.net>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Stefan Roese <sr@denx.de>
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Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:
mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function)
u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;
This patch fixes above described problem.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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When diffing through the changes only the relevant changes
should be displayed.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
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Add deep sleep support on Freescale LS1021QDS platform.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
[York Sun: Fix conflict in fdt.c]
Reviewed-by: York Sun <yorksun@freescale.com>
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This patch adds LPUART support for LS1021ATWR board.
For ls1021atwr_nor_lpuart_defconfig, LPUART is used as the console.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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This patch adds LPUART support for LS1021AQDS board.
For ls1021aqds_nor_lpuart_defconfig, LPUART is used as the console.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are
only enabled in QSPI boot, and disabled in other boot modes.
IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot.
This patch will add fdt support for the above rules.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
S0 will cause CAAM self test failure. This patch is to enable snooping
for S0 slave interface. These CCI-400 operations are moved to
board_early_init_f() to be initialized earlier. For S4 slave interface,
issuing of snoop requests and DVM message requests are enabled.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Defining variable gic_dist_addr as a globe one prevents some
functions, which use it, from being used before relocation
which is the case in the deep sleep resume process on Freescale
SoC platforms.
Besides, we can always get the GIC base address by calling
get_gicd_base_address() without referring gic_dist_addr.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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