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* defconfig: dra74_evm: enable spi driver modelMugunthan V N2016-01-13-0/+2
| | | | | | | | | | enable spi driver model for dra74_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* defconfig: dra72_evm: enable spi driver modelMugunthan V N2016-01-13-0/+2
| | | | | | | | | | enable mmc driver model for dra72_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: dts: dra72-evm: add spi-flash comaptible for flashMugunthan V N2016-01-13-1/+1
| | | | | | | | | In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: dts: dra7-evm: add spi-flash comaptible for flashMugunthan V N2016-01-13-1/+1
| | | | | | | | | In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: dts: am437x-gp-evm: add spi-flash comaptible for flashMugunthan V N2016-01-13-1/+1
| | | | | | | | | In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: dts: dra7: add qspi register maps for memory map and control moduleMugunthan V N2016-01-13-2/+5
| | | | | | | | Add qspi memory map and control module register maps to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* drivers: spi: ti_qspi: convert driver to adopt device driver modelMugunthan V N2016-01-13-0/+187
| | | | | | | | | adopt ti_qspi driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* dts: dra7: add spi alias for qspiMugunthan V N2016-01-13-0/+1
| | | | | | | | | add spi alias for qspi so that spi probes the device and driver successfully. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for splMugunthan V N2016-01-13-0/+5
| | | | | | | | Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* spi: Add support for dual and quad modeMugunthan V N2016-01-13-1/+39
| | | | | | | | | | spi bus can support dual and quad wire data transfers for tx and rx. So defining dual and quad modes for both tx and rx. Also add support to parse bus width used for spi tx and rx transfers. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* drivers: spi: ti_qspi: prepare driver for DM conversionMugunthan V N2016-01-13-126/+153
| | | | | | | Prepare driver for DM conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model ↵Mugunthan V N2016-01-13-60/+60
| | | | | | | | | | | | conversion Changing the ti_qspi_priv structure and its instance names from to priv for driver mode conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* drivers: spi: ti_qspi: do not hard code chip select for memory map configurationMugunthan V N2016-01-13-2/+2
| | | | | | | | | | | | To enable memory map in dra7xx, specific chip select must be written to control module register. But this hard coded to chip select 1, fixing it by writing the specific chip select value to control module register. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* spi: Add SPI_TX_DUAL modeJagan Teki2016-01-13-1/+2
| | | | | | | | | Added SPI_TX_DUAL mode flag. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Make IO modes at last in read modesJagan Teki2016-01-13-4/+4
| | | | | | | | | | | | SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Minor cleanupJagan Teki2016-01-13-16/+16
| | | | | | | | | | | | | | - Add comments on mode_rx - Tab space's Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Use BIT macroJagan Teki2016-01-13-19/+19
| | | | | | | | | | | | | Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Fix bit assignment with flagsJagan Teki2016-01-13-3/+3
| | | | | | | | | | | | | Fixed bit assignment with flags members on spi_slave{} Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Move flags macro's to spi_slave{} membersJagan Teki2016-01-13-8/+7
| | | | | | | | | | | | | | This patch moves flags macro's to respective member position on spi_slave{}, for better readabilty and finding the respective member macro's easily. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Rename op_mode_rx to mode_rxJagan Teki2016-01-13-6/+6
| | | | | | | | | | | | | | Since spi rx mode macro's are renamed to simple and meaninfull, this patch will rename the respective structure members. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Rename SPI_OPM_RX_* to SPI_RX_*Jagan Teki2016-01-13-6/+6
| | | | | | | | | | | | | | | | SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Remove SPI_OPM_RX_DIO|QIOFJagan Teki2016-01-13-2/+0
| | | | | | | | | | | | | | | | | SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO commands/opmodes for dual and quad. Usually IO operation's are referred to flash protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Remove SPI_OPM_RX_EXTNJagan Teki2016-01-13-3/+0
| | | | | | | | | | | | | | | | | | SPI_OPM_RX_EXTN is a combination of all rx opmode's and spi driver shall use any one of the rx mode at a time not the combination and it is true in case of flash where spi_flash_table mention combination of supported read opmodes so-that the required one will pick based on the rx mode from spi driver. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Write quad bit along with read statusJagan Teki2016-01-13-2/+2
| | | | | | | | | | | | | | | | While setting quad bit on spansion, macronix code is writing only particular quad bit this may give wrong functionality with other register bits, So this patch fix the issue where it with write previous read reg status along particular quad bit. Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Read back and check once macronix quad bit setJagan Teki2016-01-13-6/+12
| | | | | | | | | | | | One macronix quad bit set using SR, it's good to read back and check the written bit and also if it's already been set check for the bit and return. Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Read back and check once spansion quad bit setJagan Teki2016-01-13-6/+12
| | | | | | | | | | | | | | One spansion quad bit set using CR, it's good to read back and check the written bit and also if it's already been set check for the bit and return. Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Fix quad bit set for micron devicesJagan Teki2016-01-13-2/+63
| | | | | | | | | | | | | | | Setting up quad bit for micron devices need to do the same way as other flash devices like spansion, winbond etc does using enhanced volatile config register so this patch adds this support instead of printing "QEB is volatile" Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Peter Pan <peterpandong@micron.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Use BIT macroJagan Teki2016-01-13-21/+21
| | | | | | | Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Minor cleanupJagan Teki2016-01-13-6/+6
| | | | | | | | | - Tab space - Place all read commands at one place. - Re-arrange write commands. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Remove spi_flash_removeJagan Teki2016-01-13-8/+1
| | | | | | | | Use direct call to device_remove instead of exctra spi_flash_remove defination. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Rename bank_end to bar_end in read_barJagan Teki2016-01-13-2/+2
| | | | | | | | bar_end gives more meaningfull compared to bank_end and spi_flash_write_bar uses bar_end so replaced bank_end with bar_end in spi_flash_read_bar Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Rename spi_flash_set_* functionsJagan Teki2016-01-13-6/+6
| | | | | | | Since quad_mode functions are local to spi flash core, rename them to a meaningful and readable names. Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Move spi_read_cmds_array locallyJagan Teki2016-01-13-12/+8
| | | | | | | | | | Since spi_read_cmds_array is used locally in spi_flash_scan, so move array to locally used function instead of defining global array. Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUADJagan Teki2016-01-13-6/+6
| | | | | | | | | | | | | | Since SPI_TX_* are spi_slave{} members so use spi protocol notation instead spi flash programming, like SPI_TX_BP => SPI_TX_BYTE SPI_TX_QPP => SPI_TX_QUAD Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: Use mode instead of op_mode_txJagan Teki2016-01-13-10/+6
| | | | | | | | | | Used mode member from spi_slave{} instead of op_mode_tx. Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* spi: make mode visible to both dm and non-dmJagan Teki2016-01-13-2/+2
| | | | | | | | | | | | | Couldn't find the exact reason to define 'mode' for dm, probably it is not using in non-dm drivers but it need to visible both dm and non-dm as mode data is getting dereferred in spi flash core ie common to both. Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* sf: Get spi locally from spi_flashJagan Teki2016-01-13-22/+29
| | | | | | | | | | | For better code readabilty, get the spi pointer from spi_flash{} locally and use it instead of direct dereferring spi pinter as flash->spi->* Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-01-12-557/+1456
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| * sandbox: eth-raw-os.c: Ensure that our interface name is not too longTom Rini2016-01-12-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Coverity notes that we do not ensure when we copy ifname we still have space left to ensure NULL termination. As cannot control the size of ifr_name we must make sure that our argument will not overflow the buffer. Reported-by: Coverity (CID 131094) Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: Add option to configure an offset for the address translationStefan Roese2016-01-12-11/+62
| | | | | | | | | | | | | | | | | | | | | | | | Some platforms need to ability to configure an offset to the standard addresses extracted from the device-tree. This patch allows this by adding a function to DM to configure this offset (if needed). Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Fixed space before tab: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: Use the debug UART on rk3036Simon Glass2016-01-12-65/+16
| | | | | | | | | | | | | | Rather than using a new debug UART implementation, use the standard one provided by U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
| * dm: ns16550: Allow the driver to be omitted if requestedSimon Glass2016-01-12-0/+2
| | | | | | | | | | | | | | Allow the ns16550 debug UART to be used without the full driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
| * dm: serial: Allow the UART driver to be dropped from the imageSimon Glass2016-01-12-1/+23
| | | | | | | | | | | | | | | | | | | | | | In very very space-constrained devices even the full UART driver is too large. In this case the debug UART can still be used in some cases. Add options to enable the UART driver in SPL and U-Boot proper. Enable both options by default. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
| * dm: net: usb: Convert mcs7830 driver to support driver modelSimon Glass2016-01-12-0/+105
| | | | | | | | | | | | | | Adjust this driver to support driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * dm: net: usb: Refactor mcs7830 driver ready for DM conversionSimon Glass2016-01-12-121/+144
| | | | | | | | | | | | | | | | | | Remove stamp data and create common functions for the main Ethernet operations. This will make it easier to convert this driver to support driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * pci: Tidy up comments in pci_bind_bus_devices()Simon Glass2016-01-12-3/+1
| | | | | | | | | | | | | | | | | | The current comments are confusing. We don't actually bind a generic device when the device tree has no information. We try to scan available PCI drivers. Update the comments to reflect this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: Convert PCI MMC over to use DM PCI APISimon Glass2016-01-12-18/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present pci_mmc_init() does not correctly use the PCI function since the list it passes is not terminated. The array size passed to pci_mmc_init() is actually not used correctly. Fix this and adjust the pci_mmc_init() to scan all available MMC devices. Adjust this code to use the new driver model PCI API. This should move over to the new MMC uclass at some point. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: usb: Convert echi-pci to use new DM PCI APISimon Glass2016-01-12-12/+39
| | | | | | | | | | | | | | | | Convert this driver to use the new driver model PCI API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * dm: ahci: Convert to use new DM PCI APISimon Glass2016-01-12-7/+67
| | | | | | | | | | | | | | Convert this driver to use the new driver model PCI API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: pci: Switch to DM API for PCI address mappingSimon Glass2016-01-12-2/+2
| | | | | | | | | | | | | | | | We should use the new address mapping functions unless we are in compatibility mode. Disable the old functions by default. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-11-09 22:10:20 +0000