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* microblaze: Add sbss, scommon and COMMON symbols for clearingMichal Simek2009-09-14-0/+3
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* muas3001: remove BRG clock node fixup to use common mpc8260 code.Marcel Ziswiler2009-09-10-16/+0
| | | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com> Acked-by: Heiko Schocher <hs@denx.de>
* r7780mp: fix typo in Ethernet chip model number comment.Marcel Ziswiler2009-09-10-1/+1
| | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
* ep8248: add support for device tree and secondary Ethernet interface.Marcel Ziswiler2009-09-10-32/+29
| | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
* mkimage: Add Kirkwood Boot Image support (kwbimage)Prafulla Wadaskar2009-09-10-0/+619
| | | | | | | | | | | | | | This patch adds support for "kwbimage" (Kirkwood Boot Image) image types to the mkimage code. For details refer to docs/README.kwbimage This patch is tested with Sheevaplug board Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Ron Lee <ron@debian.org> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Kirkwood: Sheevaplug: Add kwimage configuration filePrafulla Wadaskar2009-09-10-0/+165
| | | | Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* mkimage: Make table_entry code globalPrafulla Wadaskar2009-09-10-8/+26
| | | | | | | | | | | | | | | | | | - make get_table_entry_id() global - make get_table_entry_name() global - move struct table_entry to image.h Currently this code is used by image.c only. This patch makes this API global so it can be used by other parts of code, too. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Ron Lee <ron.debian.org> Edit comments and commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mkimage: Make genimg_print_size() globalPrafulla Wadaskar2009-09-10-2/+2
| | | | | | | | | | | | Currently it is used by image.c only, but the the function can be used to support additional mkimage types like for example kwbimage, so make this function globally visible. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Edited commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mkimage: Include missing files in build dependency calculationsPrafulla Wadaskar2009-09-10-0/+2
| | | | | | | | | | | | | Include default_image.o and fit_image.o into the build dependency calculations. This makes sure they get rebuilt if any of the headers they include are modified Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Ron Lee <ron@debian.org> Edited commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* tools/mkimage: fix compiler warnings, use "const"Wolfgang Denk2009-09-10-37/+38
| | | | | | | | | | This fixes some compiler warnings: tools/default_image.c:141: warning: initialization from incompatible pointer type tools/fit_image.c:202: warning: initialization from incompatible pointer type and changes to code to use "const" attributes in a few places where it's appropriate. Signed-off-by: Wolfgang Denk <wd@denx.de>
* tools: mkimage: split code into core, default and FIT image specificPrafulla Wadaskar2009-09-10-294/+736
| | | | | | | | | | | | | | | | | | | | | | | | | | This is a first step towards reorganizing the mkimage code to make it easier to add support for additional images types. Current mkimage code is specific to generating uImage and FIT image files, but the same framework can be used to generate other image types like Kirkwood boot images (kwbimage-TBD). For this, the mkimage code gets reworked: Here is the brief plan for the same:- a) Split mkimage code into core and image specific support b) Implement callback functions for image specific code c) Move image type specific code to respective C files Currently there are two types of file generation/list supported (i.e uImage, FIT), the code is abstracted from mkimage.c/.h and put in default_image.c and fit_image.c; all code in these file is static except init function call d) mkimage_register API is added to add new image type support All above is addressed in this patch e) Add kwbimage type support to this new framework (TBD) This will be implemented in a following commit. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Edit commit message, fix coding style and typos. Signed-off-by: Wolfgang Denk <wd@denx.de>
* tools: mkimage: Fixed build warningsPrafulla Wadaskar2009-09-10-10/+43
| | | | | | | | uninitialized retval variable warning fixed crc32 APIs moved to crc.h (newly added) and build warnings fixed Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* tools: mkimage: Makefile sortedPrafulla Wadaskar2009-09-10-25/+25
| | | | | | The tools/Makefile is sorted for all entries, Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* tools: mkimage : bugfix returns correct value for list commandPrafulla Wadaskar2009-09-10-12/+14
| | | | | | | | | | | List command always return "EXIT_SUCCESS" even in case of failure by any means. This patch return 0 if list command is sucessful, returns negative value reported by check_header functions Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* mkconfig: pass the board name to board config fileMingkai Hu2009-09-10-0/+1
| | | | | | | | Then we can handle different config targets in the board file, which simplifies the top level Makefile for boards that have multiple config targets. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
* Remove "atmel_df_pow2" binary with "make clean"Wolfgang Denk2009-09-10-0/+1
| | | | | | | Commit 65f6f07b added support for the atmel_df_pow2 standalone program but missed to add a rule to remove it to the "clean" make target. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Fix compilation warning in 4xx miiphy.cStefan Roese2009-09-10-1/+1
| | | | | | | | | | This patch fixes the following compilation warning: miiphy.c: In function 'emac4xx_miiphy_read': miiphy.c:353: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add CONFIG_PCI_4xx_PTM_OVERWRITE to some esd 4xx boardsMatthias Fuchs2009-09-10-0/+12
| | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Allow overwriting pci target registers for all 4xx boardsMatthias Fuchs2009-09-10-2/+2
| | | | | | | | | | | | | This patch adds the CONFIG_PCI_4xx_PTM_OVERWRITE option and replaces the ugly 'if defined(BOARD1) || ... || defined(BOARDn)' construct in 4xx pci code. When CONFIG_PCI_4xx_PTM_OVERWRITE is defined the default ptm register setup can be overwritten through environment variables ptm1la, ptm1ms, ptm2la and ptm2ms to do application specific pci target BAR configuration. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix PMC405DE supportMatthias Fuchs2009-09-10-1/+4
| | | | | | | | | This patch fixes PMC405DE support. Patch 85d6bf0b fixed out-of-tree building for this board but the loadpci object did not get linked after that. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* amcc-common.h: Use filenames from environment variables for update procedure.Detlev Zundel2009-09-10-3/+5
| | | | | | | | | | Using a separate "u-boot" environment variable allows to easily specify different filenames for the update procedure. This is also in line with many other board configurations defining an "update" script. Signed-off-by: Detlev Zundel <dzu@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala2009-09-09-3/+19
| | | | | | | | | | Some board ports place TEXT_BASE at a location that would cause the RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link. By default we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't explicitly set it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* ppc/85xx: Clean up do_resetKumar Gala2009-09-08-16/+9
| | | | | | | | | | | There is no reason to do a run time check for e500 v1 based cores to determine if we have the GUTs RSTCR facility. Only the first generation of PQ3 parts (MPC8540/41/55/60) do not have it. So checking to see if we are e500 v2 would miss future parts (like e500mc). Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().Poonam Aggrwal2009-09-08-6/+10
| | | | | | | While in probecpu() UART is still not initialized. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/86xx: Device tree fixup for number of coresPoonam Aggrwal2009-09-08-0/+61
| | | | | | | | | | | | | | Fixing the number of cores in the device tree based on the actual number of cores on the system. With this same device tree image can be used for dual core and single core members of otherwise exactly same SOC. For example: * P2020RDB and P2010RDB * P1020RDB and P1011RDB * MPC8641D and MPC8641 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx,86xx: Handling Unknown SOC versionPoonam Aggrwal2009-09-08-13/+9
| | | | | | | | | | | Incase the system is detected with Unknown SVR, let the system boot with a default value and a proper message. Now with dynamic detection of SOC properties from SVR, this is necessary to prevent a crash. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-68/+284
| | | | | | | | | | | Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Cleanup makefile and related optional filesKumar Gala2009-09-08-18/+19
| | | | | | | | Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases we have like PCI, CPM2, QE. Also reworked it to use one line per file for everything and sorted in alphabetical order. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: add register read-back to set_law()Timur Tabi2009-09-08-1/+2
| | | | | | | | | After programming a new LAW, we should read-back the LAWAR register so that we sync the writes. Otherwise, code that attempts to use the new LAW-mapped memory might fail right away. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Fix bug in setup_mp codeKumar Gala2009-09-08-3/+29
| | | | | | | | | | | | | | Its possible that we try and copy the boot page code out of flash into a DDR location that doesn't have a TLB cover it. For example, if we have 3G of DDR we typically only map the first 2G. In the cases of 4G+ this wasn't an issue since the reset page TLB mapping covered the last page of memory which we wanted to copy to. We now change the physical address of the reset page TLB to map to the true physical location of the boot page code, copy and than set the TLB back to its 1:1 mapping of the reset page. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Add a simple function to search the TLBKumar Gala2009-09-08-2/+32
| | | | | | | | | | | Allow us to search the TLB array based on an address. This is useful if we want to change an entry but dont know where it happens to be located. For example, the boot page mapping we use on MP or the flash TLB that we change the WIMGE settings for after we've relocated. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add support for setting IVORs to fixed offset defaultsKumar Gala2009-09-08-0/+107
| | | | | | | | | | | | In future Book-E implementations IVORs will most likely go away and be replaced with fixed offsets. The IVPR will continue to exist to allow for relocation of the interrupt vectors. This code adds support to setup the IVORs as their fixed offset values per the ISA 2.06 spec when we transition from u-boot to another OS either via 'bootm' or a cpu release. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Fix up eSDHC controller clock frequency in the device treeDipen Dudhat2009-09-08-0/+7
| | | | | Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-31/+1
| | | | | | | | The ddr_pd_cntl isn't defined in any reference manual and thus we wil remove especially since we set it to 0, which would most likely be its POR value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: relocate cpu pointer in global dataKumar Gala2009-09-08-0/+4
| | | | | | | Now that we have a pointer to the cpu struct we need to relocate it once we get into ram. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: sys_eeprom: Fix 'may be used uninitialized' warningAnton Vorontsov2009-09-08-1/+2
| | | | | | | | The warning is bogus, so silence it by initializing the 'ret' variable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clkDipen Dudhat2009-09-08-1/+1
| | | | | | | | | | Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define. This will enable all the 85xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. Signed-off-by: Gao Guanhua <B22826@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-09-07-4/+77
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| * fsl_i2c: increase I2C timeout values and make them configurableTimur Tabi2009-09-06-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The value of I2C_TIMEOUT in fsl_i2c.c has several problems. First, it is defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes no sense to derive it from a clock rate. Second, the current value (250) is too low for some boards, so it needs to be increased. Third, the timeout necessary for multiple-master arbitration is larger than the timeout for basic read/write operations, so we shouldn't have a single constant for both timeouts. Finally, it would be nice if we could override these values on a per-board basis. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de> Tested-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
| * Reset i2c slave devices during init on mpc5xxx cpusEric Millbrandt2009-09-06-0/+57
| | | | | | | | | | | | | | | | | | | | | | Reset any i2c devices that may have been interrupted during a system reset. Normally this would be accomplished by clocking the line until SCL and SDA are released and then sending a start condtiion (From an Atmel datasheet). There is no direct access to the i2c pins so instead create start commands through the i2c interface. Send a start command then delay for the SDA Hold time, repeat this by disabling/enabling the bus a total of 9 times. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-09-07-45/+2911
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| * ARM: DaVinci: Adding Support for DaVinci DM365 EVMSandeep Paulraj2009-09-05-0/+308
| | | | | | | | | | | | | | This patch adds support for the DM365 EVM. It has been tested on a DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM: DaVinci: DaVinci DM365 SOC specific codeSandeep Paulraj2009-09-05-0/+36
| | | | | | | | | | | | This patch adds support for DaVinci DM365 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DM9000 init for pm9261Ilko Iliev2009-09-05-0/+7
| | | | | | | | Signed-off-by: Ilko Iliev <iliev@ronetix.at>
| * Add support for the DevKit8000 boardFrederik Kriewitz2009-09-05-0/+921
| | | | | | | | | | | | This patch adds support for the DevKit8000 board. Signed-off-by: Frederik Kriewitz <frederik@kriewitz.eu>
| * omap3: move the other boards to board/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-2/+2
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: move Logicpd's boards to board/logicpd/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-3/+3
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * omap: move TI's boards to board/ti/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-7/+7
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * Support for the Calao TNY-A9260/TNY-A9G20 boardsAlbin Tonnerre2009-09-01-1/+403
| | | | | | | | | | | | | | | | | | | | | | | | The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by Calao Systems <http://www.calao-systems.com>. Their components are very similar to the AT91SAM9260EK board, so their configuration is based on the configuration of this board. There are however some differences: different clocks, no LCD, no ethernet. They also can use SPI EEPROM to store the environment. Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: Kirkwood: add SYSRSTn Duration Counter SupportPrafulla Wadaskar2009-09-01-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This feature can be used to trigger special command "sysrstcmd" using reset key long press event and environment variable "sysrstdelay" is set (useful for reset to factory or manufacturing mode execution) Kirkwood SoC implements a hardware-based SYSRSTn duration counter. When SYSRSTn is asserted low, a SYSRSTn duration counter is running. The counter value is stored in the SYSRSTn Length Counter Register The counter is based on the 25-MHz reference clock (40ns) It is a 29-bit counter, yielding a maximum counting duration of 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value, it remains at this value until counter reset is triggered by setting bit 31 of KW_REG_SYSRST_CNT Implementation: Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be executed if pre-defined in environment variables. This feature will be disabled if "sysrstdelay" variable is unset. for-ex. setenv sysrst_cmd "echo starting factory reset; nand erase 0xa0000 0x20000; echo finish ed sysrst command;" will erase particular nand sector if triggered by this event Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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