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| * | ot1200: add ot1200_spl_defconfig fileChristian Gmeiner2015-01-22-0/+4
| | | | | | | | | | | | | | | Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>#
| * | ot1200: add basic SPL supportChristian Gmeiner2015-01-22-0/+166
| | | | | | | | | | | | | | | | | | Currently we only support the Micron MT41K128M16JT-125 ddr3 chip. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | ot1200: add SPL configurationChristian Gmeiner2015-01-22-0/+10
| | | | | | | | | | | | | | | | | | | | | We will only support loading u-boot.img from SPI flash stored at the offset of 64k. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | ot1200: enable spi clock directly in ccgr_init(..)Christian Gmeiner2015-01-22-4/+1
| | | | | | | | | | | | Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | ot1200: move ccgr and gpr init to c functionsChristian Gmeiner2015-01-22-14/+28
| | | | | | | | | | | | | | | | | | We need this way for SPL boot. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | ot1200: make use of imx_ddr_size(..)Christian Gmeiner2015-01-22-2/+2
| | | | | | | | | | | | | | | | | | | | | To support different ddr3 memory sizes we should start using imx_ddr_size(..) instead of the define PHYS_SDRAM_SIZE. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | ot1200: select SUPPORT_SPLChristian Gmeiner2015-01-22-0/+1
| | | | | | | | | | | | Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | mx6: fix warning in platinum boardStefano Babic2015-01-22-0/+1
| | | | | | | | | | | | | | | | | | | | | Fix warning due to missing prototype for writel Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Stefan Roese <sr@denx.de>
| * | imx: mx6: Change ENV offset to 512K bytes for larger u-boot imageYe.Li2015-01-22-2/+2
| | | | | | | | | | | | | | | | | | | | | To align with other mx6 boards, change ENV offset from 384KB to 512KB position to fit a larger u-boot image. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx:mx6sxsabresd board spl supportPeng Fan2015-01-22-0/+169
| | | | | | | | | | | | | | | | | | Add board level spl support for mx6sxsabresd board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6 add mx6sx in imx spl header filePeng Fan2015-01-22-0/+8
| | | | | | | | | | | | | | | | | | | | | Since mx6sx's memory space is different to mx6dq, redefine the SPL related macro for mx6sx chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6sx add dram io configure for mx6sxPeng Fan2015-01-22-14/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define two structure mx6sx_iomux_ddr_regs and mx6sx_iomux_grp_regs. Add a new function mx6sx_dram_iocfg to configure dram io. Since mx6sx only have one channel mmdc0, define a new empty macro MMDC1 to replace mmdc1->entry=value for mx6sx. And to other mx6 soc, MMDC1 effects as "mmdc1->entry=value". Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6sxsabresd spl support in header filePeng Fan2015-01-22-0/+6
| | | | | | | | | | | | | | | | | | Add SPL support in mx6sxsabresd header file. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6sxsabresd select SUPPORT_SPLPeng Fan2015-01-22-0/+1
| | | | | | | | | | | | | | | | | | select SUPPORT_SPL for mx6sxsabresd. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6sxsabresd add spl config filePeng Fan2015-01-22-0/+4
| | | | | | | | | | | | | | | | | | Add a SPL default configuration file for mx6sxsabresd board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | mxsboot : Support of 224-bytes OOB area lengthAlexandre Coffignal2015-01-19-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the NAND Flash chip with page size of 4096+224-bytes OOB area length For example Micron MT29F4G08 NAND flash device defines a OOB area which is 224 bytes long (oobsize). Signed-off-by: Alexandre Coffignal <acoffignal@geral.com>
| * | arm: mx6: Add Barco platinum-picon and platinum-titaniumStefan Roese2015-01-19-0/+1590
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the new Barco platinum platform. It currently includes those two boards: platinum-titanium ----------------- This is the same board as the titanium that is already supported in mainline U-Boot. But its now moved to this new platform to support multiple "flavors" of imx6 boards in one directory. Its also moved to support SPL booting. And with this we use the run-time DDR configuration of this SPL support. The board is equipped with the Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR related registers tuples from the imximage.cfg file. As all this is done in the SPL at run-time. platinum-picon -------------- This board is new and based on the MX6DL with 1GiB DDR using the Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND chips (each 512MiB). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Pieter Ronsijn <pieter.ronsijn@barco.com>
| * | mx6sxsabresd: Remove unneeded board_late_init()Fabio Estevam2015-01-19-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | Since commit 1f98e31bc0b2c37a ("imx: mx6sxsabresd: Use the pfuze common init function") board_late_init() became empty, so we can safely remove this unneeded function. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | wandboard: Use 32bit color depth for Fusion LCDOtavio Salvador2015-01-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The Fusion LCD needs the 32bit color depth to properly work; the default is different on the 3.10.17 kernels and it is better to ensure it work out of box using proper default color setting. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* | | Merge branch 'microblaze' of git://git.denx.de/u-boot-microblazeTom Rini2015-02-09-429/+371
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| * | | microblaze: spl: Add LISTS to linker scriptMichal Simek2015-02-09-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This is required for driver model. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: spl: Do not call mem_malloc_init and use early allocMichal Simek2015-02-09-22/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has some parts connected together: - Use _gd in bss section which is automatically cleared Location at SPL_MALLOC_END wasn't cleared at all - Use MALLOC_F_LEN(early alloc) instead of FULL MALLOC (mem_malloc_init is not called at all) - Simplify malloc and stack init. At the end of SPL addr is malloc area and below is stack Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Add support for CONFIG_SYS_MALLOC_F_LENMichal Simek2015-02-09-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Create space for dm_init where calloc is called and malloc_base has to be initialized. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Do not use CONFIG_SYS_GENERIC_GLOBAL_DATAMichal Simek2015-02-09-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because it is not compatible with DM where malloc_base has to be available early and init has to be done in ASM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | bdinfo: Show information about fdt blob via bdinfoMichal Simek2015-02-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze target supports both OF and !OF cases and from log is not clear which version is running. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Speedup code copyMichal Simek2015-02-09-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove one instruction in the loop which speedup code copying. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Move architecture to use generic board initMichal Simek2015-02-09-272/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Compile code with -fPIC to get GOT. Do not build SPL with fPIC because it increasing SPL size for nothing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Enable SPL_NOR support when FLASH_BASE is setupMichal Simek2015-02-09-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | Simplify SPL NOR init. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Fix gd_t address which is placed at the end of BRAMMichal Simek2015-02-09-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup gd from ASM to be availalbe for board_init_r. Setting it up in spl_board_init is too late when MALLOC is used. Space for gd is located behind MALLOC area at the end of BRAM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Remove unused asm labelMichal Simek2015-02-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | It is not used at all that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Use standard interrupt_init() functionMichal Simek2015-02-09-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | Do not use microblaze specific interrupt init function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Remove unneeded data section adding from DTBMichal Simek2015-02-09-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DTB is added to rodata section: [ 2] .rodata PROGBITS 84c5b60c 05c60c 00c618 00 A 0 0 4 [ 3] .dtb.init.rodata PROGBITS 84c67c30 068c30 003c80 00 A 0 0 16 [ 4] .rela.dyn RELA 84c6b8b0 06c8b0 000534 0c A 0 0 4 [ 5] .data PROGBITS 84c6bde4 06cde4 001536 00 WA 0 0 16 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Add debug message about enabling interruptsMichal Simek2015-02-09-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add one more debug message about enabling global interrupts. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Fix coding styleMichal Simek2015-02-09-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | No functional changes just to pass checkpatch.pl. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Remove DEBUG_INT macro and use debug() insteadMichal Simek2015-02-09-32/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not use specific macros for debugging. Also remove compilation warning: w+../arch/microblaze/cpu/interrupts.c: In function 'interrupt_handler': w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'void (*)(void *)' [-Wformat] w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'void *' [-Wformat] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Fix coding style in exception.cMichal Simek2015-02-09-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | Just coding style cleanup - no functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Show return address from exceptionMichal Simek2015-02-09-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Show also return address from exception which should suggest where the problem is. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | microblaze: Fix stack usage in interrupt handlerMichal Simek2015-02-09-61/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not save registers below r1 stack pointer because it is not checked by stack undeflow is not able to detect it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | common/board_r: manual relocation for cmd tableAndreas Bießmann2015-02-09-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required for architectures still need manual relocation like avr32, mk68 and others. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Michal Simek <michal.simek@xilinx.com>
| * | | common: Move dram_init() declaration to common locationMichal Simek2015-02-09-9/+1
| | |/ | |/| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge git://git.denx.de/u-boot-arcTom Rini2015-02-09-167/+639
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| * | | arc: build libgcc in U-BootAlexey Brodkin2015-02-09-0/+528
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we may have very limited set of functions implemented so we save some space. Also it allows us to build U-Boot for any ARC core with the same one toolchain because we don't rely on pre-built libgcc. For example: * we may use little-endian toolchain but build U-Boot for ether endianess * we may use non-multilibbed uClibc toolchain but build U-Boot for whatever ARC CPU flavour that current GCC supports Private libgcc built from generic C implementation contributes only 144 bytes to .text section so we don't see significant degradation of size: --->8--- $ arc-linux-size u-boot.libgcc-prebuilt text data bss dec hex filename 222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt $ arc-linux-size u-boot.libgcc-private text data bss dec hex filename 222361 24912 214820 462093 70d0d u-boot.libgcc-private --->8--- Also I don't notice visible performance degradation compared to pre-built libgcc (where at least "*div*" functions are had-written in assembly) on typical operations of downloading 10Mb uImage over TFTP and bootm. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: move CPU flags selection to the main "config.mk"Alexey Brodkin2015-02-09-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation to ARCv2 port submission we're moving CPU slection flags to a common location. Also it will allow us to have more flexible CPU specification, not only ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: move SYS_MONITOR_BASE setup in KonfigAlexey Brodkin2015-02-09-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Following SPARK ARC now has SYS_MONITOR_BASE setup via Kconfig. This makes "include/configs/*.h" cleaner and more flexible. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.hAlexey Brodkin2015-02-09-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards so there's no sense in separate per-board definitions. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INITAlexey Brodkin2015-02-09-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there's nothing related to really low-level init on ARC so CONFIG_SKIP_LOWLEVEL_INIT definition makes no sense. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.hAlexey Brodkin2015-02-09-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There're no other options for ARC except "generic board" so ther's no point to define CONFIG_SYS_GENERIC_BOARD per board. We now have it set fo all ARC boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: add selection of endianess in KconfigAlexey Brodkin2015-02-09-104/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: select cache settings via menuconfigAlexey Brodkin2015-02-09-17/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | | arc: define and use PTAG AUX regs for MMUv3 onlyAlexey Brodkin2015-02-09-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | DC_PTAG and IC_PTAG registers only exist in MMUv3. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
generated by cgit v1.1 at 2024-10-04 17:15:42 +0000