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* config_distro_bootcmd: Run 'scsi scan' before trying scsi disksHans de Goede2014-09-24-2/+15
| | | | | | | | | | Scsi disks need to be probed before we try to access them, otherwise all accesses fail with: ** Bad device size - scsi 0 **. Reported-by: Karsten Merker <merker@debian.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Karsten Merker <merker@debian.org>
* MAINTAINERS: comment out blank M: fieldMasahiro Yamada2014-09-24-106/+106
| | | | | | | | | | | | | | | | | | Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4 (patman: RunPipe() should not pipe stdout/stderr unless asked), Patman spits lots of "Invalid MAINTAINERS address: '-'" error messages for patches with global changes. It takes too long for Patman to process them. Anyway, "M: -" does not carry any important information. Rather, it is just like a place holder in case of assigning a new board maintainer. Let's comment out. This commit can be reproduced by the following command: find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* MAINTAINERS: comment out invalid maintainersMasahiro Yamada2014-09-24-50/+50
| | | | | | | | | | | | | | | | | | | | | | | | The "S: Orphan" in MAINTAINERS means that the maintainer in the "M:" field is unreachable (i.e. the email address is not working). (Refer to the definition of "Orphan" adopted in U-Boot in the log of commit 31f1b654b2f395b69faa5d0d3c1eb0803923bd3b, "boards.cfg: move boards with invalid emails to Orphan") For patch files adding global changes, scripts/get_maintainer.pl adds bunch of such invalid email addresses, which results in tons of annoying bounce emails. This commit can be reproduced by the following command: find . -name MAINTAINERS | xargs sed -i -e ' /^M:[[:blank:]]/ { N /S:[[:blank:]]Orphan/s/^/#/ } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* tools/genboardscfg.py: pick up also commented maitainersMasahiro Yamada2014-09-24-0/+3
| | | | | | | | | | | | | | | | | | We are still keeping invalid email addressed in MAINTAINERS because they carry information. The problem is that scripts/get_maintainer.pl adds emails in the "M:" field including invalid ones. We want to comment out invalid email addresses in MAINTAINERS to prevent scripts/get_maintainer.pl from picking them up. On the other hand, we want to collect them for boards.cfg to know the last known maintainer of each board. This commit adjusts tools/genboardscfg.py to parse also the commented "M:" fields, which is useful for the next commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* test: Add a test for command repeatSimon Glass2014-09-24-17/+52
| | | | | | | This performs a command, then repeats it, and checks that the repeat happens. Signed-off-by: Simon Glass <sjg@chromium.org>
* test: Remove tabs from trace testSimon Glass2014-09-24-11/+11
| | | | | | | These cause U-Boot to print a list of available commands. It doesn't break the test, but it is best to remove them from the output. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Disable Ctrl-CSimon Glass2014-09-24-0/+3
| | | | | | | | This is not supported properly on sandbox, and interferes with running tests, since when a test script is piped in, some commands will call ctrlc() which will drop characters from the test script. Signed-off-by: Simon Glass <sjg@chromium.org>
* Reactivate the tracing featureSimon Glass2014-09-24-0/+4
| | | | | | | | | | | | | | | | | | | This was lost sometime in the Kbuild conversion. Add it back. Check that the trace test now passes: $ ./test/trace/test-trace.sh Simple trace test / sanity check using sandbox /tmp/filemHKPGw Build sandbox O=sandbox FTRACE=1 GEN /home/sjg/c/src/third_party/u-boot/files/sandbox/Makefile Configuring for sandbox board... Check results Test passed Signed-off-by: Simon Glass <sjg@chromium.org>
* cleanup disk/part.c whitespacePavel Machek2014-09-24-4/+5
| | | | | | Cleanup disk/part.c Signed-off-by: Pavel Machek <pavel@denx.de>
* mpc8xx: move common linker scripts into the CPU directoryMasahiro Yamada2014-09-24-578/+0
| | | | | | | | | | | | | | | | Each CPU of PowerPC has its default linker script under the CPU directory, except mpc8xx. Every mpc8xx board has its own linker script under the board directory, resulting in lots of duplication of linker scripts. I notice eight mpc8xx boards have the same linker script. We can decrease the number of linker scripts by putting a single default linker script, arch/powerpc/cpu/mpc8xx/u-boot.lds. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* e1000: fix no nvm buildMarcel Ziswiler2014-09-24-0/+2
| | | | | | | | | | | Fix the following build error in case CONFIG_E1000_NO_NVM is enabled: CC drivers/net/e1000.o drivers/net/e1000.c: In function ‘e1000_initialize’: drivers/net/e1000.c:5365:5: error: ‘struct e1000_hw’ has no member named ‘eeprom_semaphore_present’ make[1]: *** [drivers/net/e1000.o] Error 1 make: *** [drivers/net] Error 2 Acked-by: Marek Vasut <marex@denx.de>
* tools/env: change stripping strategy to allow no-strippingThomas Petazzoni2014-09-24-6/+8
| | | | | | | | | | | | | | | | | | | | | When building the U-Boot tools for non-ELF platforms (such as Blackfin FLAT), since commit 79fc0c5f498c3982aa4740c273ab1a9255063d9c ("tools/env: cross-compile fw_printenv without setting HOSTCC"), the build fails because it tries to strip a FLAT binary, which does not make sense. This commit solves this by changing the stripping logic in tools/env/Makefile to be similar to the one in tools/Makefile. This logic continues to apply strip to the final binary, but does not abort the build if it fails, and does the stripping in place on the final binary. This allows the logic to work fine if stripping doesn't work, as it leaves the final binary untouched. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.zhang@analog.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Sonic Zhang <sonic.zhang@analog.com>
* usb/gadget: fastboot: implement sparse formatSteve Rae2014-09-24-10/+23
| | | | | | | - add capability to "fastboot flash" with sparse format images Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* usb/gadget: fastboot: minor cleanupSteve Rae2014-09-24-8/+14
| | | | | | | | | | - update static function - additional debugging statements - update "fastboot command" information - add missing include file - update spelling Signed-off-by: Steve Rae <srae@broadcom.com>
* usb/gadget: fastboot: add support for flash commandSteve Rae2014-09-24-2/+44
| | | | | | | | - implement 'fastboot flash' for eMMC devices Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Reviewed-by: Marek Vasut <marex@denx.de>
* usb/gadget: fastboot: add eMMC support for flash commandSteve Rae2014-09-24-0/+93
| | | | | | - add support for 'fastboot flash' command for eMMC devices Signed-off-by: Steve Rae <srae@broadcom.com>
* powerpc/t104xrdb: Enable SPI flash Extend address supportZhiqiang Hou2014-09-25-0/+1
| | | | | | | Enable the Extend address to support SPI flash more than 16MB. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* spi: kirkwood_spi.c: cosmetic: Fix minor coding style issuesStefan Roese2014-09-24-8/+6
| | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: kirkwood_spi.c: Make global variable staticStefan Roese2014-09-24-1/+1
| | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: kirkwood_spi.c: Some fixes and cleanupStefan Roese2014-09-24-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the clrsetbits_le32() accessor functions in the kirkwood SPI driver. Note that it also includes a fix: - writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl); + writel(KWSPI_SMEMRDY, &spireg->ctrl); Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead 0xfffffffe is written into this control register. This is the main reason to use the clrsetbits() functions now. As they make clearing bits much less error prone. Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and spi_cs_deactivate() any more. Its the wrong macro but has the same value as the correct one (KWSPI_CSN_ACT). This is in preparation for use of this driver on the Marvell Armada XP platform as well. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* arm: kirkwood: spi.h: Add some missing parenthesisStefan Roese2014-09-24-4/+4
| | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add M25PX64 SPI NOR flash IDStefan Roese2014-09-24-0/+1
| | | | | | | | | | Add ID for this Numonix / STMicro chip. Tested on Marvell DB-78460-BP board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*Nikita Kiryanov2014-09-24-35/+17
| | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in SPL. These #defines do not allow the user to select SPI mode for the SPI flash (there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in spi_spl_load.c), and duplicate information already provided by CONFIG_SF_DEFAULT_* #defines. Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Hannes Petermaier <hannes.petermaier@br-automation.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: mxc: fix sf probe when using mxc_spiNikita Kiryanov2014-09-24-33/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* mtd: spi: add support for M25PE16 and M25PX16Nikita Kiryanov2014-09-24-0/+2
| | | | | | | | | Add support for M25PE16 and M25PX16 Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2014-09-23-7/+11
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| * dm: avoid dev->req_seq overflowRobert Baldyga2014-09-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Since dev->req_seq value is initialized from "reg" property of fdt node, there is posibility, that address value contained in fdt is greater than INT_MAX, and then value in dev->req_seq is negative which led to probe() fail. This patch fix this problem by ensuring that req_seq is positive, unless it's one of errno codes. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: serial: Don't require device tree to configure a consoleSimon Glass2014-09-23-1/+2
| | | | | | | | | | | | Allow serial_find_console_or_panic() to work without a device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Allow device_bind() to used without CONFIG_OF_CONTROLSimon Glass2014-09-23-2/+5
| | | | | | | | | | | | | | | | The sequence number support in driver model requires device tree control. It should be skipped if CONFIG_OF_CONTROL is not defined, and should not require functions from fdtdec. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sf: Add an empty entry to the parameter listSimon Glass2014-09-23-0/+1
| | | | | | | | | | | | | | | | The list is supposed to be terminated with a NULL name, but is not. If a board probes a chip which does not appear in the table, U-Boot will crash (at least on sandbox). Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Fix repeated comment in READMESimon Glass2014-09-23-4/+1
| | | | | | | | | | | | A merge error ended up repeating a similar sentence twice. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'misc' of git://git.denx.de/u-boot-x86Tom Rini2014-09-23-12/+19
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| * patman: Add a -m option to avoid copying the maintainersSimon Glass2014-09-21-5/+12
| | | | | | | | | | | | | | | | | | The get_maintainers script is a useful default, but sometimes is copies too many people, or takes a long time to run. Add an option to disable it and update the README. Signed-off-by: Simon Glass <sjg@chromium.org>
| * buildman: Fix the logic for the bloat commandSimon Glass2014-09-21-3/+3
| | | | | | | | | | | | | | This check should now be done whatever mode buildman is running in, since we may be displaying information while building. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sandbox: Update minor documentation changesJagannadha Sutradharudu Teki2014-09-21-4/+4
| | | | | | | | | | | | | | | | - Use _defconfig instead of _config, but still _config is working. - Corrected README.sandbox path in ./README Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-09-21-13/+102
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| * | am335x_evm: Add boot script support to am335x_evmGuillaume GARDET2014-09-17-11/+18
| | | | | | | | | | | | | | | | | | | | | This patch adds boot script support to am335x_evm Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com>
| * | OMAP4: Use generic 'load' command instead of 'fatload' for 'loadbootscript' ↵Guillaume GARDET2014-09-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and 'loadbootenv' as already done for 'loadimage' and 'loaduimage'. This patch uses generic 'load' command instead of 'fatload' for 'loadbootscript' and 'loadbootenv' as already done for 'loadimage' and 'loaduimage' for OMAP4 boards. This allows to use EXT partition instead of FAT, while keeping FAT compatibility. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com>
| * | ARM: keystone: ddr3: workaround for ddr3a/3b memory issueMurali Karicheri2014-09-17-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a workaround to fix DDR3 memory issue. The code for workaround detects PGSR0 errors and then preps for and executes a software-controlled hard reset.In board_early_init, where logic has been added to identify whether or not the previous reset was a PORz. PLL initialization is skipped in the case of a software-controlled hard reset. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Keegan Garcia <kgarcia@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | | ARM: at91sam9rlek: convert to generic board supportWu, Josh2014-09-19-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: at91sam9n12ek: convert to generic board supportWu, Josh2014-09-19-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECCBoris BREZILLON2014-09-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable subpage write when using PMECC to prevent buggy partial page write. This fix has been taken from linux sources (see commit 90445ff6241e2a13445310803e2efa606c61f276) Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | USB: ehci-atmel: use pcr to enable or disable clockBo Shen2014-09-19-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | If the SoC has pcr, we use pcr (peripheral control register) to enable or disable clock. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | USB: ohci-at91: use pcr to enable or disable clockBo Shen2014-09-19-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | If the SoC has pcr, we use pcr (peripheral control register) to enable or disable clock. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: add pcr related definitionBo Shen2014-09-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Using CPU_HAS_PCR micro to present the SoC has pcr (peripheral control register). Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: use pcr to enable or disable peripheral clockBo Shen2014-09-19-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | When use pcr (peripheral control register), then we won't need to care about the peripheral ID. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: sama5d3: add timings registerBo Shen2014-09-19-1/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: sama5d3xek: enable NOR flash supportBo Shen2014-09-19-1/+12
| | | | | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: sama5d3xek: add nor flash init functionBo Shen2014-09-19-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add NOR flash hardware init function, including SMC and PIO configuration. Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | mtd: atmel-nand: use pmecc_readl(b)/pmecc_writel to access the pmecc registerWu, Josh2014-09-19-10/+14
| |/ |/| | | | | | | | | | | | | | | | | We defined the macro pmecc_readl(b)/pmecc_writel for pmecc register access. But in the driver we also use the readl(b)/writel. To keep consistent, this patch make all use pmecc_readl(b)/pmecc_writel. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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